diff --git a/posix/include/sof/lib/cpu.h b/posix/include/sof/lib/cpu.h
index b6e0fadb22c0..2eabb77cae09 100644
--- a/posix/include/sof/lib/cpu.h
+++ b/posix/include/sof/lib/cpu.h
@@ -54,7 +54,11 @@ static inline bool cpu_is_primary(int id)
 
 static inline bool cpu_is_me(int id)
 {
+#if CONFIG_LIBRARY
+	return true;
+#else
 	return id == cpu_get_id();
+#endif
 }
 #endif
 
diff --git a/src/arch/host/CMakeLists.txt b/src/arch/host/CMakeLists.txt
index 75314f00f556..d52bd13b8d69 100644
--- a/src/arch/host/CMakeLists.txt
+++ b/src/arch/host/CMakeLists.txt
@@ -22,6 +22,12 @@ target_compile_options(sof_options INTERFACE -g -O3 -fPIC -DPIC -std=c99 -std=gn
   -Wall -Werror -Wmissing-prototypes ${implicit_fallthrough} -Wno-pointer-to-int-cast
   -Wno-int-to-pointer-cast -Wpointer-arith
   -DCONFIG_LIBRARY "-imacros${CONFIG_H_PATH}")
+if(CMAKE_C_COMPILER MATCHES "xt-|xtensa-")
+	target_compile_options(sof_options INTERFACE
+		-U__INT32_TYPE__ -D__INT32_TYPE__=int
+		-U__UINT32_TYPE__ "-D__UINT32_TYPE__=unsigned int"
+		-Wno-format)
+endif()
 
 if(NOT BUILD_UNIT_TESTS_HOST)
 	add_subdirectory(lib)
diff --git a/src/arch/host/configs/library_defconfig b/src/arch/host/configs/library_defconfig
index 3a72dc85c79a..61e0567d5626 100644
--- a/src/arch/host/configs/library_defconfig
+++ b/src/arch/host/configs/library_defconfig
@@ -19,6 +19,7 @@ CONFIG_COMP_RTNR=y
 CONFIG_COMP_SEL=y
 CONFIG_COMP_SOUND_DOSE=y
 CONFIG_COMP_SRC=y
+CONFIG_COMP_SRC_LITE=y
 CONFIG_COMP_SRC_IPC4_FULL_MATRIX=y
 CONFIG_COMP_STFT_PROCESS=y
 CONFIG_COMP_STUBS=y
@@ -27,10 +28,15 @@ CONFIG_COMP_TONE=y
 CONFIG_COMP_VOLUME=y
 CONFIG_COMP_VOLUME_LINEAR_RAMP=y
 CONFIG_COMP_VOLUME_WINDOWS_FADE=y
+CONFIG_CORE_COUNT=8
+CONFIG_CROSS_CORE_STREAM=y
 CONFIG_DEBUG_MEMORY_USAGE_SCAN=n
 CONFIG_IPC_MAJOR_3=n
 CONFIG_IPC_MAJOR_4=y
 CONFIG_LIBRARY=y
 CONFIG_MATH_IIR_DF2T=y
+CONFIG_MP_MAX_NUM_CPUS=8
+CONFIG_PIPELINE_2_0=y
 CONFIG_TRACEV=y
 CONFIG_XT_RUN=y
+CONFIG_ZEPHYR_DP_SCHEDULER=y
diff --git a/src/arch/host/include/arch/lib/cpu.h b/src/arch/host/include/arch/lib/cpu.h
index e2cfb76260b7..6284eaa75bdc 100644
--- a/src/arch/host/include/arch/lib/cpu.h
+++ b/src/arch/host/include/arch/lib/cpu.h
@@ -10,29 +10,56 @@
 #ifndef __ARCH_LIB_CPU_H__
 #define __ARCH_LIB_CPU_H__
 
+int __attribute__((weak)) host_cpu_num_cores(void);
+int __attribute__((weak)) host_cpu_enable_core(int id);
+void __attribute__((weak)) host_cpu_disable_core(int id);
+int __attribute__((weak)) host_cpu_is_core_enabled(int id);
+int __attribute__((weak)) host_cpu_enabled_cores(void);
+
+static inline int arch_cpu_num_cores(void)
+{
+	if (host_cpu_num_cores)
+		return host_cpu_num_cores();
+#ifdef CONFIG_CORE_COUNT
+	return CONFIG_CORE_COUNT;
+#else
+	return 1;
+#endif
+}
+
 static inline int arch_cpu_enable_core(int id)
 {
+	if (host_cpu_enable_core)
+		return host_cpu_enable_core(id);
 	return 0;
 }
 
 static inline void arch_cpu_disable_core(int id)
 {
+	if (host_cpu_disable_core)
+		host_cpu_disable_core(id);
 }
 
 static inline int arch_cpu_is_core_enabled(int id)
 {
-	return 0;
+	if (host_cpu_is_core_enabled)
+		return host_cpu_is_core_enabled(id);
+	return 1;
 }
 
 static inline int arch_cpu_enabled_cores(void)
 {
+	if (host_cpu_enabled_cores)
+		return host_cpu_enabled_cores();
+#ifdef CONFIG_CORE_COUNT
+	return (1 << CONFIG_CORE_COUNT) - 1;
+#else
 	return 1;
+#endif
 }
 
-static inline int arch_cpu_get_id(void)
-{
-	return 0;
-}
+int arch_cpu_get_id(void);
+void host_cpu_set_id(int id);
 
 static inline int arch_cpu_restore_secondary_cores(void)
 {
diff --git a/src/audio/CMakeLists.txt b/src/audio/CMakeLists.txt
index 0dd1b1694381..c2c227a0c14e 100644
--- a/src/audio/CMakeLists.txt
+++ b/src/audio/CMakeLists.txt
@@ -157,7 +157,9 @@ if(CONFIG_ZEPHYR_NATIVE_DRIVERS)
 	sof_list_append_ifdef(CONFIG_COMP_DAI base_files dai-zephyr.c)
 else()
 	list(APPEND base_files host-legacy.c)
-	sof_list_append_ifdef(CONFIG_COMP_DAI base_files dai-legacy.c)
+	if(CONFIG_COMP_DAI AND NOT CONFIG_LIBRARY)
+		list(APPEND base_files dai-legacy.c)
+	endif()
 endif()
 
 ### Common files
@@ -180,7 +182,7 @@ else() ### library, e.g. testbench ###
 		${base_files}
 	)
 
-	if(CONFIG_COMP_DAI)
+	if(CONFIG_COMP_DAI AND NOT CONFIG_LIBRARY)
 		add_local_sources(sof
 			dai-legacy.c
 		)
diff --git a/src/audio/buffers/comp_buffer.c b/src/audio/buffers/comp_buffer.c
index f2b3c1c05e96..81720c733cc3 100644
--- a/src/audio/buffers/comp_buffer.c
+++ b/src/audio/buffers/comp_buffer.c
@@ -31,11 +31,43 @@ SOF_DEFINE_REG_UUID(buffer);
 /* unused with Zephyr, generates no output */
 DECLARE_TR_CTX(buffer_tr, SOF_UUID(buffer_uuid), LOG_LEVEL_INFO);
 
+#if defined(CONFIG_LIBRARY) && !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR) && \
+	!defined(UNIT_TEST)
+static volatile int shared_comp_buf_lock;
+static __thread int shared_comp_buf_lock_depth;
+
+void comp_buffer_shared_lock(struct comp_buffer *buffer)
+{
+	if (buffer && audio_buffer_is_shared(&buffer->audio_buffer)) {
+		if (shared_comp_buf_lock_depth++ == 0) {
+			while (__atomic_test_and_set(&shared_comp_buf_lock, __ATOMIC_ACQUIRE))
+				;
+		}
+	}
+}
+
+void comp_buffer_shared_unlock(struct comp_buffer *buffer)
+{
+	if (buffer && audio_buffer_is_shared(&buffer->audio_buffer)) {
+		if (--shared_comp_buf_lock_depth == 0)
+			__atomic_clear(&shared_comp_buf_lock, __ATOMIC_RELEASE);
+	}
+}
+#endif
+
+#define shared_buf_lock(buffer)		comp_buffer_shared_lock(buffer)
+#define shared_buf_unlock(buffer)	comp_buffer_shared_unlock(buffer)
+
 static size_t comp_buffer_get_data_available(struct sof_source *source)
 {
 	struct comp_buffer *buffer = comp_buffer_get_from_source(source);
+	size_t avail;
+
+	shared_buf_lock(buffer);
+	avail = audio_stream_get_avail_bytes(&buffer->stream);
+	shared_buf_unlock(buffer);
 
-	return audio_stream_get_avail_bytes(&buffer->stream);
+	return avail;
 }
 
 static int comp_buffer_get_data(struct sof_source *source, size_t req_size,
@@ -44,8 +76,11 @@ static int comp_buffer_get_data(struct sof_source *source, size_t req_size,
 {
 	struct comp_buffer *buffer = comp_buffer_get_from_source(source);
 
-	if (req_size > audio_stream_get_avail_bytes(&buffer->stream))
+	shared_buf_lock(buffer);
+	if (req_size > audio_stream_get_avail_bytes(&buffer->stream)) {
+		shared_buf_unlock(buffer);
 		return -ENODATA;
+	}
 
 	buffer_stream_invalidate(buffer, req_size);
 
@@ -53,6 +88,7 @@ static int comp_buffer_get_data(struct sof_source *source, size_t req_size,
 	*data_ptr = buffer->stream.r_ptr;
 	*buffer_start = buffer->stream.addr;
 	*buffer_size = buffer->stream.size;
+	shared_buf_unlock(buffer);
 	return 0;
 }
 
@@ -60,8 +96,11 @@ static int comp_buffer_release_data(struct sof_source *source, size_t free_size)
 {
 	struct comp_buffer *buffer = comp_buffer_get_from_source(source);
 
-	if (free_size)
+	if (free_size) {
+		shared_buf_lock(buffer);
 		audio_stream_consume(&buffer->stream, free_size);
+		shared_buf_unlock(buffer);
+	}
 
 	return 0;
 }
@@ -69,8 +108,13 @@ static int comp_buffer_release_data(struct sof_source *source, size_t free_size)
 static size_t comp_buffer_get_free_size(struct sof_sink *sink)
 {
 	struct comp_buffer *buffer = comp_buffer_get_from_sink(sink);
+	size_t free_size;
+
+	shared_buf_lock(buffer);
+	free_size = audio_stream_get_free_bytes(&buffer->stream);
+	shared_buf_unlock(buffer);
 
-	return audio_stream_get_free_bytes(&buffer->stream);
+	return free_size;
 }
 
 static int comp_buffer_get_buffer(struct sof_sink *sink, size_t req_size,
@@ -78,13 +122,17 @@ static int comp_buffer_get_buffer(struct sof_sink *sink, size_t req_size,
 {
 	struct comp_buffer *buffer = comp_buffer_get_from_sink(sink);
 
-	if (req_size >  audio_stream_get_free_bytes(&buffer->stream))
+	shared_buf_lock(buffer);
+	if (req_size >  audio_stream_get_free_bytes(&buffer->stream)) {
+		shared_buf_unlock(buffer);
 		return -ENODATA;
+	}
 
 	/* get circular buffer parameters */
 	*data_ptr = buffer->stream.w_ptr;
 	*buffer_start = buffer->stream.addr;
 	*buffer_size = buffer->stream.size;
+	shared_buf_unlock(buffer);
 	return 0;
 }
 
@@ -93,8 +141,10 @@ static int comp_buffer_commit_buffer(struct sof_sink *sink, size_t commit_size)
 	struct comp_buffer *buffer = comp_buffer_get_from_sink(sink);
 
 	if (commit_size) {
+		shared_buf_lock(buffer);
 		buffer_stream_writeback(buffer, commit_size);
 		comp_update_buffer_produce(buffer, commit_size);
+		shared_buf_unlock(buffer);
 	}
 
 	return 0;
@@ -560,6 +610,8 @@ void comp_update_buffer_produce(struct comp_buffer *buffer, uint32_t bytes)
 		return;
 	}
 
+	shared_buf_lock(buffer);
+
 #if CONFIG_PROBE
 	void *produce_begin = audio_stream_get_wptr(&buffer->stream);
 #endif
@@ -589,6 +641,8 @@ void comp_update_buffer_produce(struct comp_buffer *buffer, uint32_t bytes)
 		((char *)audio_stream_get_wptr(&buffer->stream) -
 		 (char *)audio_stream_get_addr(&buffer->stream)));
 #endif
+
+	shared_buf_unlock(buffer);
 }
 
 void comp_update_buffer_consume(struct comp_buffer *buffer, uint32_t bytes)
@@ -610,6 +664,8 @@ void comp_update_buffer_consume(struct comp_buffer *buffer, uint32_t bytes)
 		return;
 	}
 
+	shared_buf_lock(buffer);
+
 	audio_stream_consume(&buffer->stream, bytes);
 
 #if CONFIG_SOF_LOG_DBG_BUFFER
@@ -622,6 +678,8 @@ void comp_update_buffer_consume(struct comp_buffer *buffer, uint32_t bytes)
 		((char *)audio_stream_get_wptr(&buffer->stream) -
 		 (char *)audio_stream_get_addr(&buffer->stream)));
 #endif
+
+	shared_buf_unlock(buffer);
 }
 
 static inline struct list_item *buffer_comp_list(struct comp_buffer *buffer,
diff --git a/src/audio/buffers/ring_buffer.c b/src/audio/buffers/ring_buffer.c
index 3d32ec4af204..1a8dde39ac93 100644
--- a/src/audio/buffers/ring_buffer.c
+++ b/src/audio/buffers/ring_buffer.c
@@ -144,7 +144,13 @@ size_t ring_buffer_inc_offset(struct ring_buffer *ring_buffer, size_t offset, si
 static inline
 size_t _ring_buffer_get_data_available(struct ring_buffer *ring_buffer)
 {
+#if defined(CONFIG_LIBRARY) && !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+	int32_t w_off = __atomic_load_n(&ring_buffer->_write_offset, __ATOMIC_ACQUIRE);
+	int32_t r_off = __atomic_load_n(&ring_buffer->_read_offset, __ATOMIC_ACQUIRE);
+	int32_t avail_data = w_off - r_off;
+#else
 	int32_t avail_data =  ring_buffer->_write_offset - ring_buffer->_read_offset;
+#endif
 	/* wrap around ? 2*size because of "double area" */
 	if (avail_data < 0)
 		avail_data = 2 * ring_buffer->data_buffer_size + avail_data;
@@ -199,9 +205,17 @@ static int ring_buffer_commit_buffer(struct sof_sink *sink, size_t commit_size)
 					     commit_size);
 
 		/* move write pointer */
+#if defined(CONFIG_LIBRARY) && !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+		__atomic_store_n(&ring_buffer->_write_offset,
+				 ring_buffer_inc_offset(ring_buffer,
+							ring_buffer->_write_offset,
+							commit_size),
+				 __ATOMIC_RELEASE);
+#else
 		ring_buffer->_write_offset = ring_buffer_inc_offset(ring_buffer,
 								    ring_buffer->_write_offset,
 								    commit_size);
+#endif
 	}
 
 	return 0;
@@ -237,15 +251,23 @@ static int ring_buffer_release_data(struct sof_source *source, size_t free_size)
 	CORE_CHECK_STRUCT(&ring_buffer->audio_buffer);
 	if (free_size) {
 		/* data consumed, free buffer space, no need for any special cache operations */
+#if defined(CONFIG_LIBRARY) && !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+		__atomic_store_n(&ring_buffer->_read_offset,
+				 ring_buffer_inc_offset(ring_buffer,
+							ring_buffer->_read_offset,
+							free_size),
+				 __ATOMIC_RELEASE);
+#else
 		ring_buffer->_read_offset = ring_buffer_inc_offset(ring_buffer,
 								   ring_buffer->_read_offset,
 								   free_size);
+#endif
 	}
 
 	return 0;
 }
 
-int ring_buffer_module_unbind(struct sof_sink *sink)
+static int ring_buffer_module_unbind(struct sof_sink *sink)
 {
 	struct ring_buffer *ring_buffer = ring_buffer_from_sink(sink);
 
diff --git a/src/audio/component.c b/src/audio/component.c
index 9a1623099fef..62370ebd2d34 100644
--- a/src/audio/component.c
+++ b/src/audio/component.c
@@ -25,6 +25,10 @@
 #include <stddef.h>
 #include <stdint.h>
 
+#if CONFIG_LIBRARY && !defined(UNIT_TEST)
+#include <platform/lib/telemetry_sched.h>
+#endif
+
 #if defined(__XCC__)
 #include <xtensa/config/core-isa.h>
 # if XCHAL_HAVE_HIFI5
@@ -619,7 +623,13 @@ int comp_copy(struct comp_dev *dev)
 		if (comp_check_eos(dev))
 			return 0;
 
+#if CONFIG_LIBRARY && !defined(UNIT_TEST)
+		uint64_t telem_start = host_telem_mod_entry(dev, false);
+#endif
 		ret = dev->drv->ops.copy(dev);
+#if CONFIG_LIBRARY && !defined(UNIT_TEST)
+		host_telem_mod_exit(dev, false, telem_start, ret);
+#endif
 
 #ifdef CONFIG_SOF_TELEMETRY_PERFORMANCE_MEASUREMENTS
 		const uint32_t cycles_consumed = (uint32_t)telemetry_timestamp() - begin_stamp;
diff --git a/src/audio/copier/CMakeLists.txt b/src/audio/copier/CMakeLists.txt
index 7cead10dabe0..ee23f22fa10f 100644
--- a/src/audio/copier/CMakeLists.txt
+++ b/src/audio/copier/CMakeLists.txt
@@ -1,4 +1,7 @@
-add_local_sources(sof copier.c copier_hifi.c copier_generic.c copier_host.c copier_dai.c)
+add_local_sources(sof copier.c copier_hifi.c copier_generic.c copier_host.c)
+if(NOT CONFIG_LIBRARY)
+	add_local_sources(sof copier_dai.c)
+endif()
 if(CONFIG_IPC4_GATEWAY)
 	add_local_sources(sof
 		copier_ipcgtw.c
diff --git a/src/audio/copier/dai_copier.h b/src/audio/copier/dai_copier.h
index eb540efb86c4..9bf9e50bc055 100644
--- a/src/audio/copier/dai_copier.h
+++ b/src/audio/copier/dai_copier.h
@@ -17,6 +17,123 @@
 struct ipc_config_dai;
 struct comp_dev;
 struct dai_data;
+struct ipc4_copier_module_cfg;
+struct copier_data;
+
+#if CONFIG_LIBRARY
+static inline int dai_common_new(struct dai_data *dd, struct comp_dev *dev,
+				 const struct ipc_config_dai *dai_cfg)
+{
+	return 0;
+}
+
+static inline void dai_common_free(struct dai_data *dd) {}
+
+static inline int dai_common_config_prepare(struct dai_data *dd, struct comp_dev *dev)
+{
+	return 0;
+}
+
+static inline int dai_common_prepare(struct dai_data *dd, struct comp_dev *dev)
+{
+	return 0;
+}
+
+static inline void dai_common_reset(struct dai_data *dd, struct comp_dev *dev) {}
+
+static inline int dai_common_trigger(struct dai_data *dd, struct comp_dev *dev, int cmd)
+{
+	return 0;
+}
+
+static inline int dai_common_position(struct dai_data *dd, struct comp_dev *dev,
+				      struct sof_ipc_stream_posn *posn)
+{
+	return 0;
+}
+
+static inline int dai_common_params(struct dai_data *dd, struct comp_dev *dev,
+				    struct sof_ipc_stream_params *params)
+{
+	return 0;
+}
+
+static inline int dai_common_copy(struct dai_data *dd, struct comp_dev *dev,
+				  pcm_converter_func *converter)
+{
+	return 0;
+}
+
+static inline int dai_common_ts_config_op(struct dai_data *dd, struct comp_dev *dev)
+{
+	return 0;
+}
+
+static inline int dai_common_ts_start(struct dai_data *dd, struct comp_dev *dev)
+{
+	return 0;
+}
+
+static inline int dai_common_ts_stop(struct dai_data *dd, struct comp_dev *dev)
+{
+	return 0;
+}
+
+static inline int dai_common_ts_get(struct dai_data *dd, struct comp_dev *dev,
+				    struct timestamp_data *tsd)
+{
+	return 0;
+}
+
+static inline int dai_common_get_hw_params(struct dai_data *dd, struct comp_dev *dev,
+					   struct sof_ipc_stream_params *params, int dir)
+{
+	return 0;
+}
+
+static inline int dai_zephyr_multi_endpoint_copy(struct dai_data **dd, struct comp_dev *dev,
+						 struct comp_buffer *multi_endpoint_buffer,
+						 int num_endpoints)
+{
+	return 0;
+}
+
+static inline int dai_zephyr_unbind(struct dai_data *dd, struct comp_dev *dev, const void *data)
+{
+	return 0;
+}
+
+static inline int copier_dai_create(struct comp_dev *dev, struct copier_data *cd,
+				    const struct ipc4_copier_module_cfg *copier,
+				    struct pipeline *pipeline)
+{
+	return 0;
+}
+
+static inline void copier_dai_free(struct processing_module *mod) {}
+
+static inline int copier_dai_prepare(struct comp_dev *dev, struct copier_data *cd)
+{
+	return 0;
+}
+
+static inline void copier_dai_adjust_params(const struct copier_data *cd,
+					    struct ipc4_audio_format *in_fmt,
+					    struct ipc4_audio_format *out_fmt) {}
+
+static inline int copier_dai_params(struct copier_data *cd, struct comp_dev *dev,
+				    struct sof_ipc_stream_params *params, int dai_index)
+{
+	return 0;
+}
+
+static inline void copier_dai_reset(struct copier_data *cd, struct comp_dev *dev) {}
+
+static inline int copier_dai_trigger(struct copier_data *cd, struct comp_dev *dev, int cmd)
+{
+	return 0;
+}
+#else
 int dai_common_new(struct dai_data *dd, struct comp_dev *dev,
 		   const struct ipc_config_dai *dai_cfg);
 
@@ -53,29 +170,12 @@ int dai_common_ts_get(struct dai_data *dd, struct comp_dev *dev, struct timestam
 int dai_common_get_hw_params(struct dai_data *dd, struct comp_dev *dev,
 			     struct sof_ipc_stream_params *params, int dir);
 
-#if CONFIG_LIBRARY
-static inline int dai_zephyr_multi_endpoint_copy(struct dai_data **dd, struct comp_dev *dev,
-						 struct comp_buffer *multi_endpoint_buffer,
-						 int num_endpoints)
-{
-	return 0;
-}
-
-static inline int dai_zephyr_unbind(struct dai_data *dd, struct comp_dev *dev, const void *data)
-{
-	return 0;
-}
-#else
 int dai_zephyr_multi_endpoint_copy(struct dai_data **dd, struct comp_dev *dev,
 				   struct comp_buffer *multi_endpoint_buffer,
 				   int num_endpoints);
 int dai_zephyr_unbind(struct dai_data *dd, struct comp_dev *dev,
 		      const struct bind_info *unbind_data);
-#endif
-
 
-struct ipc4_copier_module_cfg;
-struct copier_data;
 int copier_dai_create(struct comp_dev *dev, struct copier_data *cd,
 		      const struct ipc4_copier_module_cfg *copier,
 		      struct pipeline *pipeline);
@@ -94,4 +194,5 @@ int copier_dai_params(struct copier_data *cd, struct comp_dev *dev,
 void copier_dai_reset(struct copier_data *cd, struct comp_dev *dev);
 
 int copier_dai_trigger(struct copier_data *cd, struct comp_dev *dev, int cmd);
+#endif
 #endif /* __SOF_LIB_DAI_COPIER_H__ */
diff --git a/src/audio/google/Kconfig b/src/audio/google/Kconfig
index 61d1608b6891..692eef1c2d44 100644
--- a/src/audio/google/Kconfig
+++ b/src/audio/google/Kconfig
@@ -86,7 +86,7 @@ config COMP_GOOGLE_CTC_AUDIO_PROCESSING
 	select COMP_BLOB
 	select GOOGLE_CTC_AUDIO_PROCESSING_MOCK if COMP_STUBS
 	select STATIC_INIT_GNU if ZEPHYR_SOF_MODULE
-	depends on ZEPHYR_SOF_MODULE
+	depends on ZEPHYR_SOF_MODULE || LIBRARY
 	help
 	  Select for Google crosstalk cancellation audio processing. It
 	  uses the Google real-time audio processing library to perform
diff --git a/src/audio/google/google_ctc_audio_processing.c b/src/audio/google/google_ctc_audio_processing.c
index d7d7f389a9bc..1c7ad2344ce9 100644
--- a/src/audio/google/google_ctc_audio_processing.c
+++ b/src/audio/google/google_ctc_audio_processing.c
@@ -380,7 +380,7 @@ static int ctc_prepare(struct processing_module *mod,
 	struct sof_source *source;
 	unsigned int num_channels;
 	uint8_t *config;
-	int config_size;
+	size_t config_size;
 
 	comp_info(mod->dev, "entry");
 
@@ -422,7 +422,7 @@ static int ctc_prepare(struct processing_module *mod,
 	config = comp_get_data_blob(cd->tuning_handler, &config_size, NULL);
 
 	if (config_size != CTC_BLOB_CONFIG_SIZE) {
-		comp_info(mod->dev, "config_size not expected: %d", config_size);
+		comp_info(mod->dev, "config_size not expected: %zu", config_size);
 		config = NULL;
 		config_size = 0;
 	}
diff --git a/src/audio/google/google_ctc_audio_processing_ipc4.c b/src/audio/google/google_ctc_audio_processing_ipc4.c
index fa5f265e9d0f..25835a22a70a 100644
--- a/src/audio/google/google_ctc_audio_processing_ipc4.c
+++ b/src/audio/google/google_ctc_audio_processing_ipc4.c
@@ -29,7 +29,7 @@ int ctc_set_config(struct processing_module *mod, uint32_t param_id,
 	struct google_ctc_audio_processing_comp_data *cd = module_get_private_data(mod);
 	int ret;
 	struct google_ctc_config *config;
-	int size;
+	size_t size;
 
 	switch (param_id) {
 	case 0:
@@ -58,7 +58,7 @@ int ctc_set_config(struct processing_module *mod, uint32_t param_id,
 		config = comp_get_data_blob(cd->tuning_handler, &size, NULL);
 		if (size != CTC_BLOB_CONFIG_SIZE) {
 			comp_err(mod->dev,
-				 "Invalid config size = %d",
+				 "Invalid config size = %zu",
 				 size);
 			return -EINVAL;
 		}
diff --git a/src/audio/module_adapter/module_adapter.c b/src/audio/module_adapter/module_adapter.c
index 3ccae18cbe09..5f37fff58c8c 100644
--- a/src/audio/module_adapter/module_adapter.c
+++ b/src/audio/module_adapter/module_adapter.c
@@ -1074,6 +1074,9 @@ static int module_adapter_audio_stream_copy_1to1(struct comp_dev *dev)
 	uint32_t frames;
 	int ret;
 
+	comp_buffer_shared_lock(mod->source_comp_buffer);
+	comp_buffer_shared_lock(mod->sink_comp_buffer);
+
 	frames = audio_stream_avail_frames_aligned(&mod->source_comp_buffer->stream,
 						   &mod->sink_comp_buffer->stream);
 	mod->input_buffers[0].size = frames;
@@ -1102,8 +1105,8 @@ static int module_adapter_audio_stream_copy_1to1(struct comp_dev *dev)
 	/* consume from the input buffer */
 	mod->total_data_consumed += mod->input_buffers[0].consumed;
 	if (mod->input_buffers[0].consumed)
-		audio_stream_consume(&mod->source_comp_buffer->stream,
-				     mod->input_buffers[0].consumed);
+		comp_update_buffer_consume(mod->source_comp_buffer,
+					   mod->input_buffers[0].consumed);
 
 	/* produce data into the output buffer */
 	mod->total_data_produced += mod->output_buffers[0].size;
@@ -1113,6 +1116,9 @@ static int module_adapter_audio_stream_copy_1to1(struct comp_dev *dev)
 	if (mod->output_buffers[0].size)
 		comp_update_buffer_produce(mod->sink_comp_buffer, mod->output_buffers[0].size);
 
+	comp_buffer_shared_unlock(mod->sink_comp_buffer);
+	comp_buffer_shared_unlock(mod->source_comp_buffer);
+
 	return ret;
 }
 
@@ -1124,6 +1130,7 @@ static int module_adapter_audio_stream_type_copy(struct comp_dev *dev)
 	struct comp_buffer *source;
 	struct processing_module *mod = comp_mod(dev);
 	uint32_t num_input_buffers, num_output_buffers;
+	uint32_t locked_inputs, locked_outputs;
 	int ret, i;
 
 	/* handle special case of HOST/DAI type components */
@@ -1152,6 +1159,13 @@ static int module_adapter_audio_stream_type_copy(struct comp_dev *dev)
 		return -EINVAL;
 	}
 
+	locked_inputs = num_input_buffers;
+	locked_outputs = num_output_buffers;
+	for (i = 0; i < locked_inputs; i++)
+		comp_buffer_shared_lock(sources[i]);
+	for (i = 0; i < locked_outputs; i++)
+		comp_buffer_shared_lock(sinks[i]);
+
 	/* setup active input/output buffers for processing */
 	if (num_output_buffers == 1) {
 		module_single_sink_setup(dev, sources, sinks);
@@ -1184,7 +1198,7 @@ static int module_adapter_audio_stream_type_copy(struct comp_dev *dev)
 			container_of(mod->input_buffers[i].data, struct comp_buffer, stream);
 
 		if (mod->input_buffers[i].consumed)
-			audio_stream_consume(&src->stream, mod->input_buffers[i].consumed);
+			comp_update_buffer_consume(src, mod->input_buffers[i].consumed);
 	}
 
 	/* compute data consumed based on pin 0 since it is processed with base config
@@ -1216,6 +1230,11 @@ static int module_adapter_audio_stream_type_copy(struct comp_dev *dev)
 		mod->output_buffers[i].size = 0;
 	}
 
+	for (i = 0; i < locked_outputs; i++)
+		comp_buffer_shared_unlock(sinks[i]);
+	for (i = 0; i < locked_inputs; i++)
+		comp_buffer_shared_unlock(sources[i]);
+
 	return 0;
 out:
 	for (i = 0; i < num_output_buffers; i++) {
@@ -1227,6 +1246,11 @@ static int module_adapter_audio_stream_type_copy(struct comp_dev *dev)
 		mod->input_buffers[i].consumed = 0;
 	}
 
+	for (i = 0; i < locked_outputs; i++)
+		comp_buffer_shared_unlock(sinks[i]);
+	for (i = 0; i < locked_inputs; i++)
+		comp_buffer_shared_unlock(sources[i]);
+
 	return ret;
 }
 
diff --git a/src/audio/pipeline/pipeline-schedule.c b/src/audio/pipeline/pipeline-schedule.c
index fc8daad6e378..b33cf9aa4661 100644
--- a/src/audio/pipeline/pipeline-schedule.c
+++ b/src/audio/pipeline/pipeline-schedule.c
@@ -31,6 +31,10 @@
 #include <stdint.h>
 #include <sof/audio/module_adapter/module/generic.h>
 
+#if CONFIG_LIBRARY && !defined(UNIT_TEST)
+#include <platform/lib/telemetry_sched.h>
+#endif
+
 LOG_MODULE_DECLARE(pipe, CONFIG_SOF_LOG_LEVEL);
 
 SOF_DEFINE_REG_UUID(pipe_task);
@@ -577,9 +581,23 @@ void pipeline_comp_ll_task_free(struct pipeline *p)
 static enum task_state dp_task_run(void *data)
 {
 	struct processing_module *mod = data;
+#if CONFIG_LIBRARY
+	uint32_t i;
+	uint64_t telem_start;
+
+	for (i = 0; i < mod->num_of_sources; i++)
+		source_reset_num_of_processed_bytes(mod->sources[i]);
+	for (i = 0; i < mod->num_of_sinks; i++)
+		sink_reset_num_of_processed_bytes(mod->sinks[i]);
+
+	telem_start = host_telem_mod_entry(mod->dev, true);
+#endif
 
 	int ret = module_process_sink_src(mod, mod->sources, mod->num_of_sources,
 					  mod->sinks, mod->num_of_sinks);
+#if CONFIG_LIBRARY
+	host_telem_mod_exit(mod->dev, true, telem_start, ret);
+#endif
 	if (ret)
 		pipeline_comp_copy_error_notify(mod->dev, ret);
 
@@ -602,8 +620,10 @@ int pipeline_comp_dp_task_init(struct comp_dev *comp)
 
 #if CONFIG_SOF_USERSPACE_PROXY
 	unsigned int flags = mod->user_ctx ? K_USER : 0;
+#elif CONFIG_USERSPACE
+	unsigned int flags = K_USER;
 #else
-	unsigned int flags = IS_ENABLED(CONFIG_USERSPACE) ? K_USER : 0;
+	unsigned int flags = 0;
 #endif
 
 	if (mod->priv.cfg.ext_data && mod->priv.cfg.ext_data->dp_data &&
diff --git a/src/audio/pipeline/pipeline-stream.c b/src/audio/pipeline/pipeline-stream.c
index 4bdd0c93b9c9..c8adbe0bb780 100644
--- a/src/audio/pipeline/pipeline-stream.c
+++ b/src/audio/pipeline/pipeline-stream.c
@@ -35,6 +35,10 @@
 
 #include "../audio/copier/copier.h"
 
+#if CONFIG_LIBRARY && !defined(UNIT_TEST)
+#include <platform/lib/telemetry_sched.h>
+#endif
+
 LOG_MODULE_DECLARE(pipe, CONFIG_SOF_LOG_LEVEL);
 
 /*
@@ -176,6 +180,9 @@ int pipeline_copy(struct pipeline *p)
 	struct comp_dev *start;
 	uint32_t dir;
 	int ret;
+#if CONFIG_LIBRARY && !defined(UNIT_TEST)
+	uint64_t telem_start = host_telem_pipe_begin(p);
+#endif
 
 	PPL_LOCK(p->core);
 
@@ -197,6 +204,10 @@ int pipeline_copy(struct pipeline *p)
 
 	PPL_UNLOCK();
 
+#if CONFIG_LIBRARY && !defined(UNIT_TEST)
+	host_telem_pipe_end(p, telem_start, ret);
+#endif
+
 	return ret;
 }
 
diff --git a/src/include/kernel/tokens.h b/src/include/kernel/tokens.h
index 93c4754f831c..9183f2644e11 100644
--- a/src/include/kernel/tokens.h
+++ b/src/include/kernel/tokens.h
@@ -96,6 +96,11 @@
 #define SOF_TKN_COMP_OUTPUT_PIN_BINDING_WNAME   414
 #define SOF_TKN_COMP_NUM_INPUT_AUDIO_FORMATS    415
 #define SOF_TKN_COMP_NUM_OUTPUT_AUDIO_FORMATS   416
+#define SOF_TKN_COMP_NO_WNAME_IN_KCONTROL_NAME  417
+#define SOF_TKN_COMP_SCHED_DOMAIN               418
+#define SOF_TKN_COMP_DOMAIN_ID                  419
+#define SOF_TKN_COMP_STACK_BYTES                420
+#define SOF_TKN_COMP_HEAP_BYTES                 421
 
 /* SSP */
 #define SOF_TKN_INTEL_SSP_CLKS_CONTROL		500
diff --git a/src/include/sof/audio/buffer.h b/src/include/sof/audio/buffer.h
index 9f9f7df672b5..abcb7c6d1b4b 100644
--- a/src/include/sof/audio/buffer.h
+++ b/src/include/sof/audio/buffer.h
@@ -500,6 +500,22 @@ static inline void buffer_init_stream(struct comp_buffer *buffer, size_t size)
 	audio_stream_init(&buffer->stream, buffer->stream.addr, size);
 }
 
+#if defined(CONFIG_LIBRARY) && !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR) && \
+	!defined(UNIT_TEST)
+void comp_buffer_shared_lock(struct comp_buffer *buffer);
+void comp_buffer_shared_unlock(struct comp_buffer *buffer);
+#else
+static inline void comp_buffer_shared_lock(struct comp_buffer *buffer)
+{
+	(void)buffer;
+}
+
+static inline void comp_buffer_shared_unlock(struct comp_buffer *buffer)
+{
+	(void)buffer;
+}
+#endif
+
 /** @}*/
 
 #endif /* __SOF_AUDIO_BUFFER_H__ */
diff --git a/src/include/sof/schedule/dp_schedule.h b/src/include/sof/schedule/dp_schedule.h
index 1dac74b600ef..cfcc1b365599 100644
--- a/src/include/sof/schedule/dp_schedule.h
+++ b/src/include/sof/schedule/dp_schedule.h
@@ -91,6 +91,8 @@ __syscall void scheduler_dp_internal_free(struct task *task);
  */
 __syscall void scheduler_dp_ll_tick(void);
 #include <zephyr/syscalls/dp_schedule.h>
+#else
+void scheduler_dp_ll_tick(void);
 #endif
 
 /**
diff --git a/src/ipc/ipc4/helper.c b/src/ipc/ipc4/helper.c
index c135f43a4e97..8f6d972d02a4 100644
--- a/src/ipc/ipc4/helper.c
+++ b/src/ipc/ipc4/helper.c
@@ -124,10 +124,17 @@ __cold static int ipc4_comp_new_config(struct comp_ipc_config *ipc_config,
 		return -EEXIST;
 	}
 
+#if CONFIG_LIBRARY
+	if (module_init->extension.r.core_id >= (uint32_t)arch_cpu_num_cores()) {
+#else
 	if (module_init->extension.r.core_id >= CONFIG_CORE_COUNT) {
+#endif
 		tr_err(&ipc_tr, "ipc: comp->core = %u", (uint32_t)module_init->extension.r.core_id);
 		return -EINVAL;
 	}
+#if CONFIG_LIBRARY
+	cpu_enable_core(module_init->extension.r.core_id);
+#endif
 
 	memset(ipc_config, 0, sizeof(*ipc_config));
 	ipc_config->id = comp_id;
@@ -541,11 +548,18 @@ __cold int ipc_pipeline_new(struct ipc *ipc, ipc_pipe_new *_pipe_desc)
 
 	tr_dbg(&ipc_tr, "ipc: pipeline id = %u", (uint32_t)pipe_desc->primary.r.instance_id);
 
+#if CONFIG_LIBRARY
+	if (pipe_desc->extension.r.core_id >= (uint32_t)arch_cpu_num_cores()) {
+#else
 	if (pipe_desc->extension.r.core_id >= CONFIG_CORE_COUNT) {
+#endif
 		tr_err(&ipc_tr, "invalid pipeline core ID: %u",
 		       (uint32_t)pipe_desc->extension.r.core_id);
 		return IPC4_INVALID_CORE_ID;
 	}
+#if CONFIG_LIBRARY
+	cpu_enable_core(pipe_desc->extension.r.core_id);
+#endif
 
 	/* pass IPC to target core */
 	if (!cpu_is_me(pipe_desc->extension.r.core_id))
@@ -697,7 +711,8 @@ __cold static struct comp_buffer *ipc4_create_buffer(struct comp_dev *src, bool
 	 * is privileged and so avoided here.
 	 */
 	ipc_buf.comp.core = is_shared ? PLATFORM_PRIMARY_CORE_ID : src->ipc_config.core;
-	assert(IS_ENABLED(CONFIG_SOF_USERSPACE_LL) || ipc_buf.comp.core == cpu_get_id());
+	assert(IS_ENABLED(CONFIG_SOF_USERSPACE_LL) || IS_ENABLED(CONFIG_LIBRARY) ||
+	       ipc_buf.comp.core == cpu_get_id());
 
 	return buffer_new(alloc, &ipc_buf, is_shared);
 }
@@ -721,6 +736,9 @@ __cold static struct comp_buffer *ipc4_create_buffer(struct comp_dev *src, bool
 
 #if CONFIG_SOF_USERSPACE_LL
 #error "CONFIG_SOF_USERSPACE_LL not compatible with cross-core streams"
+#elif CONFIG_LIBRARY
+#define ll_block(src_core, dst_core, flags)	irq_local_disable(flags)
+#define ll_unblock(src_core, dst_core, flags)	irq_local_enable(flags)
 #else
 #define ll_block(src_core, dst_core, flags) \
 	do { \
diff --git a/src/platform/Kconfig b/src/platform/Kconfig
index 46758df1c1dd..19bbef664123 100644
--- a/src/platform/Kconfig
+++ b/src/platform/Kconfig
@@ -233,6 +233,7 @@ if !ZEPHYR_SOF_MODULE
 
 config MP_MAX_NUM_CPUS
 	int
+	default 8 if LIBRARY
 	default 1
 	help
 	  Maximum number of cores per configuration
diff --git a/src/platform/library/include/platform/lib/memory.h b/src/platform/library/include/platform/lib/memory.h
index 4fe40783573c..f9b6a9179122 100644
--- a/src/platform/library/include/platform/lib/memory.h
+++ b/src/platform/library/include/platform/lib/memory.h
@@ -28,7 +28,7 @@ uint8_t *get_library_mailbox(void);
 
 #define MAILBOX_BASE	get_library_mailbox()
 
-#define PLATFORM_HEAP_SYSTEM		2
+#define PLATFORM_HEAP_SYSTEM		CONFIG_CORE_COUNT
 #define PLATFORM_HEAP_SYSTEM_RUNTIME	CONFIG_CORE_COUNT
 #define PLATFORM_HEAP_RUNTIME		1
 #define PLATFORM_HEAP_BUFFER		2
diff --git a/src/platform/library/include/platform/lib/telemetry_sched.h b/src/platform/library/include/platform/lib/telemetry_sched.h
new file mode 100644
index 000000000000..60941de80050
--- /dev/null
+++ b/src/platform/library/include/platform/lib/telemetry_sched.h
@@ -0,0 +1,425 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2026 Intel Corporation. All rights reserved.
+ *
+ * Per-Core, Per-Pipeline, and Per-Module (LL + DP) Scheduling & Buffer Telemetry
+ * for SOF Testbench (Host Pthread and Xtensa Simulator).
+ */
+
+#ifndef __PLATFORM_LIB_TELEMETRY_SCHED_H__
+#define __PLATFORM_LIB_TELEMETRY_SCHED_H__
+
+#include <sof/common.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#ifndef CONFIG_CORE_COUNT
+#define CONFIG_CORE_COUNT 4
+#endif
+
+#define TB_TELEM_MAX_CORES	CONFIG_CORE_COUNT
+#define TB_TELEM_MAX_PIPES	32
+#define TB_TELEM_MAX_MODS	128
+#define TB_TELEM_MAX_PINS	4
+#define TB_TELEM_MAX_OVERRIDES	64
+#define TB_MOD_TAP_SAMPLES	64
+#define TB_TELEM_TRACE_CAPACITY	4096
+#define TB_DSP_NOMINAL_HZ	400000000ULL	/* 400 MHz nominal DSP clock */
+
+/* Per-iteration module scheduling timeline event type */
+enum host_sched_event_type {
+	HOST_SCHED_EVT_LL_COPY		= 0,	/* LL module comp_copy() execution */
+	HOST_SCHED_EVT_DP_SYNC		= 1,	/* DP module LL-tick ring buffer sync */
+	HOST_SCHED_EVT_DP_RUN		= 2,	/* DP worker thread dp_task_run() execution */
+};
+
+/* Per-iteration LL/DP module scheduling timeline trace event */
+struct host_sched_trace_event {
+	uint32_t seq_id;		/* 1-based monotonic sequence ID */
+	uint32_t ll_tick_nr;		/* 1-based 1ms LL tick number */
+	uint32_t mod_iter_nr;		/* 1-based iteration count for this module */
+	uint32_t comp_id;		/* IPC4 component ID ((inst << 16) | mod_id) */
+	uint16_t pipeline_id;
+	uint8_t  core_id;		/* DSP core ID (0..7) */
+	uint8_t  event_type;		/* enum host_sched_event_type */
+	uint8_t  mem_domain;		/* HOST_MEM_DOMAIN_SRAM (0) or DRAM (1) */
+	uint8_t  cpc_violation;		/* 1 if duration_cycles > cpc_budget */
+	uint16_t period_us;		/* Module scheduling period in us */
+	uint64_t start_cycles;		/* Virtual DSP cycle count at module start */
+	uint64_t complete_cycles;	/* Virtual DSP cycle count at module completion */
+	uint32_t duration_cycles;	/* Execution cycles (complete_cycles - start_cycles) */
+	uint32_t cpc_budget;		/* Effective CPC budget */
+	uint64_t start_ns;		/* Virtual DSP timeline start time (ns from t=0) */
+	uint64_t complete_ns;		/* Virtual DSP timeline completion time (ns from t=0) */
+	uint64_t deadline_ns;		/* Scheduling deadline timestamp (ns from t=0) */
+	uint64_t wall_start_ns;		/* Host monotonic start timestamp (ns from run start) */
+	uint64_t wall_complete_ns;	/* Host monotonic completion timestamp (ns from run start) */
+	uint32_t bytes_in;		/* Total bytes consumed across input pins */
+	uint32_t bytes_out;		/* Total bytes produced across output pins */
+	int32_t  ret_status;		/* Return code from module processing */
+};
+
+struct pipeline;
+struct comp_dev;
+
+/* Workload execution time simulation mode */
+enum host_workload_sim_mode {
+	HOST_WORKLOAD_SIM_OFF		= 0,	/* Measure host CPU thread time */
+	HOST_WORKLOAD_SIM_VIRTUAL	= 1,	/* Simulate cycles & exec time from CPC/freq/mem */
+	HOST_WORKLOAD_SIM_REALTIME	= 2,	/* Simulate cycles & pace wall-clock execution */
+};
+
+/* Memory execution domain (SRAM vs DRAM residency) */
+enum host_mem_exec_domain {
+	HOST_MEM_DOMAIN_SRAM		= 0,	/* L2 HPSRAM/LPSRAM (1.00x base CPC) */
+	HOST_MEM_DOMAIN_DRAM		= 1,	/* L3/System DRAM (cache/bus stall penalty) */
+	HOST_MEM_DOMAIN_AUTO		= 0xFF,	/* Inherit global/pipeline default */
+};
+
+/* Per-module CPC and memory domain override entry */
+struct host_workload_mod_override {
+	bool active;
+	uint32_t comp_id;
+	uint32_t cpc_override;			/* 0 = use topology/default CPC */
+	uint32_t mem_domain_override;		/* HOST_MEM_DOMAIN_SRAM, DRAM, or AUTO */
+};
+
+/* Global workload execution time simulation configuration */
+struct host_workload_sim_cfg {
+	uint32_t mode;				/* enum host_workload_sim_mode */
+	uint32_t default_mem_domain;		/* HOST_MEM_DOMAIN_SRAM (0) or DRAM (1) */
+	uint32_t sram_factor_x100;		/* Default 100 (1.00x) */
+	uint32_t dram_factor_x100;		/* Default 160 (1.60x cache/bus stall factor) */
+	uint32_t dram_cycles_per_word;		/* Default 2 cycles per 32-bit word in DRAM */
+	uint32_t core_freq_hz[TB_TELEM_MAX_CORES]; /* Target clock frequency in Hz per core */
+	uint32_t num_overrides;
+	struct host_workload_mod_override overrides[TB_TELEM_MAX_OVERRIDES];
+};
+
+/* Per-core LL and DP scheduler telemetry */
+struct host_core_telem {
+	bool active;
+	uint32_t freq_hz;			/* Active target core clock frequency in Hz */
+	uint32_t ll_budget_cycles;		/* Available cycles per 1ms LL tick (freq_hz/1000) */
+	uint32_t ll_deadline_violations;	/* Count of LL ticks exceeding ll_budget_cycles */
+
+	uint32_t ll_tick_count;
+	uint32_t ll_active_tasks;
+	uint64_t ll_last_cycles;
+	uint64_t ll_avg_cycles;
+	uint64_t ll_peak_cycles;
+	uint64_t ll_total_cycles;
+	uint32_t ll_avg_kcps;
+	uint32_t ll_peak_kcps;
+	uint64_t ll_last_exec_ns;		/* Execution time in ns at target core freq */
+	uint64_t ll_avg_exec_ns;
+	uint64_t ll_peak_exec_ns;
+	uint64_t ll_total_exec_ns;
+
+	uint32_t dp_run_count;
+	uint32_t dp_active_threads;
+	uint64_t dp_last_cycles;
+	uint64_t dp_avg_cycles;
+	uint64_t dp_peak_cycles;
+	uint64_t dp_total_cycles;
+	uint32_t dp_avg_kcps;
+	uint32_t dp_peak_kcps;
+	uint64_t dp_last_exec_ns;		/* Execution time in ns at target core freq */
+	uint64_t dp_avg_exec_ns;
+	uint64_t dp_peak_exec_ns;
+	uint64_t dp_total_exec_ns;
+
+	uint32_t total_util_x100;	/* Combined LL+DP utilization vs freq_hz (0.01% units) */
+
+	/* Internal scratch accumulators for workload simulation & timeline cursors */
+	uint64_t _sim_ll_tick_cycles;
+	uint64_t _sim_dp_run_cycles;
+	uint64_t _tick_ll_offset_cycles;
+	uint64_t _dp_cursor_cycles;
+};
+
+/* Per-pipeline scheduling telemetry */
+struct host_pipe_telem {
+	bool active;
+	uint32_t pipeline_id;
+	uint32_t comp_id;
+	uint32_t core_id;
+	uint32_t priority;
+	uint32_t period_us;
+	uint32_t direction;
+	uint32_t status;
+	uint32_t mem_domain;		/* HOST_MEM_DOMAIN_SRAM (0) or DRAM (1) */
+	uint64_t copy_iterations;
+	uint64_t last_cycles;
+	uint64_t avg_cycles;
+	uint64_t peak_cycles;
+	uint64_t total_cycles;
+	uint32_t avg_kcps;
+	uint32_t peak_kcps;
+	uint64_t last_exec_ns;		/* Pipeline execution time in ns at core freq */
+	uint64_t avg_exec_ns;
+	uint64_t peak_exec_ns;
+	uint64_t total_exec_ns;
+	uint32_t xrun_count;
+	uint32_t num_ll_modules;
+	uint32_t num_dp_modules;
+
+	/* Internal scratch accumulator for workload simulation */
+	uint64_t _sim_tick_cycles;
+};
+
+/* Per-pin buffer telemetry captured on module entry and exit */
+struct host_mod_pin_telem {
+	bool active;
+	uint32_t buf_id;
+	uint32_t peer_comp_id;		/* Upstream producer or downstream consumer ID */
+	uint32_t buf_size;		/* Total primary buffer capacity in bytes */
+	uint32_t rate;
+	uint16_t channels;
+	uint16_t frame_fmt;
+
+	/* Primary LL comp_buffer levels (bytes) */
+	uint32_t entry_avail_bytes;
+	uint32_t entry_free_bytes;
+	uint32_t exit_avail_bytes;
+	uint32_t exit_free_bytes;
+
+	/* Secondary DP ring_buffer levels (bytes, non-zero for DP connections) */
+	uint32_t dp_ring_size;
+	uint32_t dp_ring_entry_avail;
+	uint32_t dp_ring_exit_avail;
+	uint32_t dp_ring_entry_free;
+	uint32_t dp_ring_exit_free;
+
+	/* Bytes consumed (input pin) or produced (output pin) */
+	uint32_t last_bytes_transferred;
+	uint64_t total_bytes_transferred;
+	uint32_t xrun_count;
+
+	/* Signal level telemetry on entry and exit (0.01 dBFS, e.g. -301 = -3.01 dBFS) */
+	int16_t entry_rms_dbfs_x100;
+	int16_t entry_peak_dbfs_x100;
+	int16_t exit_rms_dbfs_x100;
+	int16_t exit_peak_dbfs_x100;
+
+	/* Rolling S16-normalized sample snapshots at module entry and exit */
+	uint16_t entry_num_samples;
+	uint16_t exit_num_samples;
+	int16_t entry_samples[TB_MOD_TAP_SAMPLES];
+	int16_t exit_samples[TB_MOD_TAP_SAMPLES];
+
+	/* Internal scratch pointers saved at entry for exit delta calculation */
+	uintptr_t _entry_ptr;
+	uint32_t _entry_avail;
+	uint32_t _dp_entry_woff;
+};
+
+/* Per-module (LL or DP) scheduling and buffer telemetry */
+struct host_mod_telem {
+	bool active;
+	uint32_t comp_id;
+	uint32_t pipeline_id;
+	uint32_t core_id;
+	uint32_t proc_domain;		/* COMP_PROCESSING_DOMAIN_LL (0) or DP (1) */
+	uint32_t type;			/* enum sof_comp_type */
+	uint32_t period_us;
+	uint32_t ibs;
+	uint32_t obs;
+	uint32_t cpc;			/* Cycles Per Chunk budget from topology */
+	uint32_t effective_cpc;		/* Effective base CPC (override -> topology -> default) */
+	uint32_t mem_domain;		/* Effective memory domain: SRAM (0) or DRAM (1) */
+
+	/* Processing execution telemetry (comp_copy for LL, dp_task_run for DP) */
+	uint64_t iterations;
+	uint64_t last_cycles;
+	uint64_t avg_cycles;
+	uint64_t peak_cycles;
+	uint64_t total_cycles;
+	uint32_t avg_kcps;
+	uint32_t peak_kcps;
+	uint64_t last_exec_ns;		/* Execution time in ns at core's target frequency */
+	uint64_t avg_exec_ns;
+	uint64_t peak_exec_ns;
+	uint64_t total_exec_ns;
+	uint64_t last_start_cycles;	/* Virtual DSP start cycle of most recent iteration */
+	uint64_t last_complete_cycles;	/* Virtual DSP completion cycle of most recent iteration */
+	uint64_t last_start_ns;		/* Virtual DSP start time (ns) of most recent iteration */
+	uint64_t last_complete_ns;	/* Virtual DSP completion time (ns) of most recent iter */
+	uint64_t last_deadline_ns;	/* Scheduling deadline (ns) of most recent iteration */
+	uint64_t last_wall_start_ns;	/* Host monotonic start time (ns) of most recent iter */
+	uint64_t last_wall_complete_ns;	/* Host monotonic completion time (ns) of most recent iter */
+	uint32_t cpc_violations;
+	uint32_t error_count;
+
+	/* Internal entry wall-clock scratch timestamps */
+	uint64_t _ll_entry_wall_ns;
+	uint64_t _dp_entry_wall_ns;
+
+	/* For DP modules: LL tick ring-buffer synchronization stats */
+	uint64_t ll_ring_sync_iterations;
+	uint64_t ll_ring_sync_last_cycles;
+	uint64_t ll_ring_sync_total_cycles;
+
+	/* Input (producer) and Output (consumer) pin buffer telemetry */
+	uint32_t num_in_pins;
+	uint32_t num_out_pins;
+	struct host_mod_pin_telem in_pins[TB_TELEM_MAX_PINS];
+	struct host_mod_pin_telem out_pins[TB_TELEM_MAX_PINS];
+};
+
+/* Hardware platform preset descriptor */
+struct host_platform_preset {
+	const char *name;
+	const char *aliases;
+	const char *desc;
+	uint32_t hw_ip_version;		/* 2=cAVS2.5, 4=ACE1.5, 5=ACE2.0, 6=ACE3.0, 7=ACE4.0 */
+	uint32_t num_cores;
+	uint32_t freq_hz;
+	size_t hpsram_size_bytes;
+	size_t lpsram_size_bytes;
+	size_t dram_size_bytes;
+};
+
+/* Runtime hardware platform configuration & live memory allocation state */
+struct host_platform_hw_cfg {
+	char platform_name[32];
+	char arch_desc[48];
+	uint32_t hw_ip_version;
+	uint32_t num_cores;		/* Active platform core count (1..TB_TELEM_MAX_CORES) */
+	uint32_t enabled_cores_mask;	/* Bitmask of enabled cores */
+	uint32_t default_freq_hz;	/* Nominal DSP core clock frequency in Hz */
+	size_t hpsram_size_bytes;	/* Total L2 HPSRAM capacity in bytes */
+	size_t lpsram_size_bytes;	/* Total L2 LPSRAM capacity in bytes */
+	size_t dram_size_bytes;		/* Total L3 IMR/DRAM capacity in bytes */
+	uint32_t sram_bank_size;	/* SRAM EBB bank size in bytes (65536) */
+	bool enforce_mem_limit;		/* Reject allocations exceeding configured capacity */
+
+	/* Live heap allocation tracking across rmalloc/rzalloc/rballoc/sof_heap_alloc */
+	size_t hpsram_used_bytes;
+	size_t hpsram_peak_bytes;
+	size_t lpsram_used_bytes;
+	size_t lpsram_peak_bytes;
+	size_t dram_used_bytes;
+	size_t dram_peak_bytes;
+	uint64_t total_alloc_calls;
+	uint64_t total_free_calls;
+	uint32_t alloc_failures;
+};
+
+/* Global testbench scheduling and buffer telemetry state */
+struct host_sched_telemetry {
+	bool enabled;
+	uint32_t num_cores;
+	uint32_t num_pipes;
+	uint32_t num_mods;
+	uint32_t current_ll_tick;
+	uint64_t run_start_wall_ns;
+	uint32_t trace_head;
+	uint32_t trace_count;
+	uint32_t trace_total_events;
+	struct host_platform_hw_cfg hw_cfg;
+	struct host_workload_sim_cfg sim_cfg;
+	struct host_core_telem cores[TB_TELEM_MAX_CORES];
+	struct host_pipe_telem pipes[TB_TELEM_MAX_PIPES];
+	struct host_mod_telem mods[TB_TELEM_MAX_MODS];
+	struct host_sched_trace_event trace_events[TB_TELEM_TRACE_CAPACITY];
+};
+
+/* Reset all telemetry counters (preserves workload simulation & platform configuration) */
+void host_telem_reset(void);
+
+/* Enable or disable telemetry collection (enabled by default) */
+void host_telem_set_enabled(bool enabled);
+
+/* Retrieve pointer to global telemetry structure */
+struct host_sched_telemetry *host_telem_get(void);
+
+/* Hardware platform configuration & preset APIs */
+const struct host_platform_preset *host_platform_get_presets(size_t *out_count);
+const struct host_platform_preset *host_platform_find_preset(const char *name);
+int host_platform_apply_preset(const char *name);
+int host_platform_set_core_count(uint32_t num_cores);
+uint32_t host_platform_get_core_count(void);
+void host_platform_set_memory(size_t hpsram_bytes, size_t lpsram_bytes,
+			      size_t dram_bytes, bool enforce_limit);
+size_t host_platform_get_hpsram_size(void);
+size_t host_platform_get_lpsram_size(void);
+size_t host_platform_get_dram_size(void);
+void host_platform_reset_mem_stats(void);
+bool host_platform_account_alloc(const void *ptr, uint32_t flags, size_t bytes);
+void host_platform_account_free(const void *ptr, size_t bytes);
+
+/* Host arch_cpu_* runtime backing functions */
+int host_cpu_num_cores(void);
+int host_cpu_enable_core(int id);
+void host_cpu_disable_core(int id);
+int host_cpu_is_core_enabled(int id);
+int host_cpu_enabled_cores(void);
+
+/* Workload execution time simulation configuration APIs */
+void host_workload_sim_set_mode(uint32_t mode);
+uint32_t host_workload_sim_get_mode(void);
+void host_workload_sim_set_core_freq(int core, uint32_t freq_hz);
+uint32_t host_workload_sim_get_core_freq(int core);
+void host_workload_sim_set_mem_domain(uint32_t mem_domain, uint32_t dram_factor_x100,
+				      uint32_t dram_cycles_per_word);
+int host_workload_sim_set_mod_override(uint32_t comp_id, uint32_t cpc_override,
+				       uint32_t mem_domain_override);
+void host_workload_sim_clear_overrides(void);
+
+/* Read current thread/CPU execution timestamp in nominal DSP cycles */
+uint64_t host_telem_timestamp_cycles(void);
+
+/* Core LL and DP scheduler hooks */
+void host_telem_ll_tick_begin(void);
+void host_telem_core_ll_tick(int core, uint32_t tasks_run, uint64_t cycles);
+void host_telem_core_dp_run(int core, uint32_t active_dp_threads, uint64_t cycles);
+
+/* Per-iteration scheduling timeline trace ring buffer APIs */
+void host_telem_trace_clear(void);
+uint32_t host_telem_trace_read(struct host_sched_trace_event *out_events,
+			       uint32_t max_events, uint32_t since_seq_id,
+			       int core_filter, int pipe_filter,
+			       int comp_filter, int domain_filter);
+
+#ifdef UNIT_TEST
+static inline uint64_t host_telem_pipe_begin(struct pipeline *p)
+{
+	(void)p;
+	return 0;
+}
+
+static inline void host_telem_pipe_end(struct pipeline *p, uint64_t start_cycles, int ret)
+{
+	(void)p;
+	(void)start_cycles;
+	(void)ret;
+}
+
+static inline uint64_t host_telem_mod_entry(struct comp_dev *dev, bool is_dp_thread)
+{
+	(void)dev;
+	(void)is_dp_thread;
+	return 0;
+}
+
+static inline void host_telem_mod_exit(struct comp_dev *dev, bool is_dp_thread,
+				       uint64_t start_cycles, int ret)
+{
+	(void)dev;
+	(void)is_dp_thread;
+	(void)start_cycles;
+	(void)ret;
+}
+#else
+/* Pipeline copy entry/exit hooks */
+uint64_t host_telem_pipe_begin(struct pipeline *p);
+void host_telem_pipe_end(struct pipeline *p, uint64_t start_cycles, int ret);
+
+/* Module processing entry/exit hooks (is_dp_thread = false in comp_copy, true in dp_task_run) */
+uint64_t host_telem_mod_entry(struct comp_dev *dev, bool is_dp_thread);
+void host_telem_mod_exit(struct comp_dev *dev, bool is_dp_thread, uint64_t start_cycles, int ret);
+#endif
+
+#endif /* __PLATFORM_LIB_TELEMETRY_SCHED_H__ */
diff --git a/src/platform/library/lib/CMakeLists.txt b/src/platform/library/lib/CMakeLists.txt
index 05965cd482ee..fa8c4532599c 100644
--- a/src/platform/library/lib/CMakeLists.txt
+++ b/src/platform/library/lib/CMakeLists.txt
@@ -6,6 +6,7 @@ add_local_sources(sof
 	dai.c
 	pm_runtime.c
 	memory.c
+	telemetry_sched.c
 )
 
 if (CONFIG_TRACE)
diff --git a/src/platform/library/lib/alloc.c b/src/platform/library/lib/alloc.c
index 953267ab5265..ba339ca14865 100644
--- a/src/platform/library/lib/alloc.c
+++ b/src/platform/library/lib/alloc.c
@@ -13,44 +13,87 @@
 #include <malloc.h>
 #include <rtos/alloc.h>
 #include <sof/lib/mm_heap.h>
+#include <platform/lib/telemetry_sched.h>
+
+bool __attribute__((weak)) host_platform_account_alloc(const void *ptr, uint32_t flags,
+						       size_t bytes);
+void __attribute__((weak)) host_platform_account_free(const void *ptr, size_t bytes);
 
 /* testbench mem alloc definition */
 
+static void *tb_tracked_alloc(uint32_t flags, size_t bytes, bool zero_init)
+{
+	void *ptr;
+	size_t actual;
+
+	if (bytes == 0)
+		bytes = 1;
+
+	ptr = zero_init ? calloc(bytes, 1) : malloc(bytes);
+	if (!ptr)
+		return NULL;
+
+	actual = malloc_usable_size(ptr);
+	if (actual < bytes)
+		actual = bytes;
+
+	if (host_platform_account_alloc && !host_platform_account_alloc(ptr, flags, actual)) {
+		free(ptr);
+		return NULL;
+	}
+
+	return ptr;
+}
+
+static void tb_tracked_free(void *ptr)
+{
+	if (!ptr)
+		return;
+	if (host_platform_account_free)
+		host_platform_account_free(ptr, malloc_usable_size(ptr));
+	free(ptr);
+}
+
 void *rmalloc_align(uint32_t flags, size_t bytes, uint32_t alignment)
 {
-	return malloc(bytes);
+	(void)alignment;
+	return tb_tracked_alloc(flags, bytes, false);
 }
 
 void *rmalloc(uint32_t flags, size_t bytes)
 {
-	return malloc(bytes);
+	return tb_tracked_alloc(flags, bytes, false);
 }
 
 void *rzalloc(uint32_t flags, size_t bytes)
 {
-	return calloc(bytes, 1);
+	return tb_tracked_alloc(flags, bytes, true);
 }
 
 void rfree(void *ptr)
 {
-	free(ptr);
+	tb_tracked_free(ptr);
 }
 
 void *rballoc_align(uint32_t flags, size_t bytes,
 		    uint32_t alignment)
 {
-	return malloc(bytes);
+	(void)alignment;
+	return tb_tracked_alloc(flags, bytes, false);
 }
 
 void *sof_heap_alloc(struct k_heap *heap, uint32_t flags, size_t bytes,
 		     size_t alignment)
 {
-	return malloc(bytes);
+	(void)heap;
+	(void)alignment;
+	return tb_tracked_alloc(flags, bytes, false);
 }
 
 void sof_heap_free(struct k_heap *heap, void *addr)
 {
-	free(addr);
+	(void)heap;
+	tb_tracked_free(addr);
 }
 
 void heap_trace(struct mm_heap *heap, int size)
diff --git a/src/platform/library/lib/clk.c b/src/platform/library/lib/clk.c
index aa7c86cd2f91..5a9cd20299e3 100644
--- a/src/platform/library/lib/clk.c
+++ b/src/platform/library/lib/clk.c
@@ -1,18 +1,34 @@
 // SPDX-License-Identifier: BSD-3-Clause
 
 #include <rtos/clk.h>
+#include <sof/lib/cpu.h>
+#include <platform/lib/telemetry_sched.h>
+
+uint32_t __attribute__((weak)) host_workload_sim_get_core_freq(int core);
+
+static uint64_t get_active_core_freq_hz(int clock)
+{
+	(void)clock;
+	if (host_workload_sim_get_core_freq) {
+		uint32_t hz = host_workload_sim_get_core_freq(cpu_get_id());
+
+		if (hz > 0)
+			return (uint64_t)hz;
+	}
+	return TB_DSP_NOMINAL_HZ;
+}
 
 uint64_t clock_ms_to_ticks(int clock, uint64_t ms)
 {
-	return 0;
+	return (get_active_core_freq_hz(clock) * ms) / 1000ULL;
 }
 
 uint64_t clock_us_to_ticks(int clock, uint64_t us)
 {
-	return 0;
+	return (get_active_core_freq_hz(clock) * us) / 1000000ULL;
 }
 
 uint64_t clock_ns_to_ticks(int clock, uint64_t ns)
 {
-	return 0;
+	return (get_active_core_freq_hz(clock) * ns) / 1000000000ULL;
 }
diff --git a/src/platform/library/lib/memory.c b/src/platform/library/lib/memory.c
index 3f92c62889d7..be83fbb4c757 100644
--- a/src/platform/library/lib/memory.c
+++ b/src/platform/library/lib/memory.c
@@ -130,14 +130,31 @@ static struct block_map lp_buf_heap_map[] = {
 
 static struct mm memmap;
 
+size_t __attribute__((weak)) host_platform_get_hpsram_size(void);
+size_t __attribute__((weak)) host_platform_get_lpsram_size(void);
+
 void platform_init_memmap(struct sof *sof)
 {
-	uint32_t heap_buffer_size = SOF_FW_END - HEAP_BUFFER_BASE;
+	uint32_t hp_sram_total = HP_SRAM_SIZE;
+	uint32_t lp_buffer_size = HEAP_LP_BUFFER_SIZE;
+	uint32_t heap_buffer_size;
 	uint32_t buffer_count;
 	int i;
 
+	if (host_platform_get_hpsram_size && host_platform_get_hpsram_size() >= 0x40000U)
+		hp_sram_total = (uint32_t)host_platform_get_hpsram_size();
+	if (host_platform_get_lpsram_size && host_platform_get_lpsram_size() >= 0x1000U)
+		lp_buffer_size = (uint32_t)host_platform_get_lpsram_size();
+
+	if (hp_sram_total > (HEAP_BUFFER_BASE - HP_SRAM_BASE))
+		heap_buffer_size = hp_sram_total - (HEAP_BUFFER_BASE - HP_SRAM_BASE);
+	else
+		heap_buffer_size = hp_sram_total / 2;
+
 	/* calculate the buffer heap size */
 	buffer_count = heap_buffer_size / HEAP_BUFFER_BLOCK_SIZE;
+	if (buffer_count > HEAP_BUFFER_COUNT_MAX)
+		buffer_count = HEAP_BUFFER_COUNT_MAX;
 	heap_buffer_size = buffer_count * HEAP_BUFFER_BLOCK_SIZE;
 
 	for (i = 0; i < ARRAY_SIZE(buf_heap_map); i++) {
@@ -172,10 +189,20 @@ void platform_init_memmap(struct sof *sof)
 
 	/* .system and .system_runtime secondary core initialization */
 	for (i = 1; i < CONFIG_CORE_COUNT; i++) {
+#if CONFIG_CORE_COUNT > 1
+		sys_rt_heap_map[i][0] = (struct block_map)
+			BLOCK_DEF(64, HEAP_SYS_RT_X_COUNT64,
+				  uncached_block_hdr(sys_rt_x_block64[i - 1]));
+		sys_rt_heap_map[i][1] = (struct block_map)
+			BLOCK_DEF(512, HEAP_SYS_RT_X_COUNT512,
+				  uncached_block_hdr(sys_rt_x_block512[i - 1]));
+		sys_rt_heap_map[i][2] = (struct block_map)
+			BLOCK_DEF(1024, HEAP_SYS_RT_X_COUNT1024,
+				  uncached_block_hdr(sys_rt_x_block1024[i - 1]));
+#endif
 		/* .system init */
 		sof->memory_map->system[i].heap =
-				(unsigned long)malloc(HEAP_SYSTEM_S_SIZE) +
-			((i - 1) * SOF_CORE_S_SIZE);
+				(unsigned long)malloc(HEAP_SYSTEM_S_SIZE);
 		sof->memory_map->system[i].size = HEAP_SYSTEM_S_SIZE;
 		sof->memory_map->system[i].info.free = HEAP_SYSTEM_S_SIZE;
 		sof->memory_map->system[i].caps = SOF_MEM_CAPS_RAM |
@@ -187,8 +214,7 @@ void platform_init_memmap(struct sof *sof)
 		sof->memory_map->system_runtime[i].map =
 			uncached_block_map(sys_rt_heap_map[i]);
 		sof->memory_map->system_runtime[i].heap =
-			(unsigned long)malloc(HEAP_SYS_RUNTIME_S_SIZE) +
-			((i - 1) * SOF_CORE_S_SIZE) + HEAP_SYSTEM_S_SIZE;
+			(unsigned long)malloc(HEAP_SYS_RUNTIME_S_SIZE);
 		sof->memory_map->system_runtime[i].size =
 			HEAP_SYS_RUNTIME_S_SIZE;
 		sof->memory_map->system_runtime[i].info.free =
@@ -240,15 +266,15 @@ void platform_init_memmap(struct sof *sof)
 	/* heap lp buffer init */
 	sof->memory_map->buffer[1].blocks = ARRAY_SIZE(lp_buf_heap_map);
 	sof->memory_map->buffer[1].map = uncached_block_map(lp_buf_heap_map);
-	sof->memory_map->buffer[1].heap = (unsigned long)malloc(HEAP_LP_BUFFER_SIZE);
-	sof->memory_map->buffer[1].size = HEAP_LP_BUFFER_SIZE;
-	sof->memory_map->buffer[1].info.free = HEAP_LP_BUFFER_SIZE;
+	sof->memory_map->buffer[1].heap = (unsigned long)malloc(lp_buffer_size);
+	sof->memory_map->buffer[1].size = lp_buffer_size;
+	sof->memory_map->buffer[1].info.free = lp_buffer_size;
 	sof->memory_map->buffer[1].caps = SOF_MEM_CAPS_RAM | SOF_MEM_CAPS_LP |
 		SOF_MEM_CAPS_CACHE | SOF_MEM_CAPS_DMA;
 
 	/* .total init */
 	sof->memory_map->total.free = HEAP_SYSTEM_T_SIZE +
 		HEAP_SYS_RUNTIME_T_SIZE + HEAP_RUNTIME_SIZE + heap_buffer_size +
-		HEAP_LP_BUFFER_SIZE;
+		lp_buffer_size;
 
 }
diff --git a/src/platform/library/lib/telemetry_sched.c b/src/platform/library/lib/telemetry_sched.c
new file mode 100644
index 000000000000..1aa8471ac5f8
--- /dev/null
+++ b/src/platform/library/lib/telemetry_sched.c
@@ -0,0 +1,2050 @@
+// SPDX-License-Identifier: BSD-3-Clause
+//
+// Copyright(c) 2026 Intel Corporation. All rights reserved.
+//
+// Per-Core, Per-Pipeline, and Per-Module (LL + DP) Scheduling & Buffer Telemetry
+// for SOF Testbench (Host Pthread and Xtensa Simulator).
+
+#ifndef _GNU_SOURCE
+#define _GNU_SOURCE
+#endif
+
+#include <platform/lib/telemetry_sched.h>
+#include <sof/audio/component.h>
+#include <sof/audio/buffer.h>
+#include <sof/audio/audio_stream.h>
+#include <sof/audio/audio_buffer.h>
+#include <sof/audio/ring_buffer.h>
+#include <sof/audio/source_api.h>
+#include <sof/audio/sink_api.h>
+#include <sof/audio/pipeline.h>
+#include <sof/audio/module_adapter/module/generic.h>
+#include <rtos/alloc.h>
+#include <stdio.h>
+#include <string.h>
+#include <strings.h>
+
+#include <time.h>
+
+#if !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+static volatile char g_telem_lock;
+#define TELEM_LOCK() \
+	do { \
+		while (__atomic_test_and_set(&g_telem_lock, __ATOMIC_ACQUIRE)) { \
+		} \
+	} while (0)
+#define TELEM_UNLOCK()	__atomic_clear(&g_telem_lock, __ATOMIC_RELEASE)
+#else
+#define TELEM_LOCK()	do {} while (0)
+#define TELEM_UNLOCK()	do {} while (0)
+#endif
+
+static const struct host_platform_preset g_platform_presets[] = {
+	{
+		.name              = "tgl",
+		.aliases           = "cavs25,adl,rpl,tigerlake,alderlake,raptorlake",
+		.desc              = "Intel Tiger Lake / Alder Lake cAVS 2.5 (Xtensa LX6)",
+		.hw_ip_version     = 2,
+		.num_cores         = 4,
+		.freq_hz           = 400000000U,
+		.hpsram_size_bytes = 2944UL * 1024UL,	/* 46 x 64 KB EBB banks */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 1 x 64 KB EBB bank */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB IMR */
+	},
+	{
+		.name              = "tgl-h",
+		.aliases           = "cavs25_tgph,tgph",
+		.desc              = "Intel Tiger Lake-H cAVS 2.5 (Xtensa LX6, 2-Core)",
+		.hw_ip_version     = 2,
+		.num_cores         = 2,
+		.freq_hz           = 400000000U,
+		.hpsram_size_bytes = 2944UL * 1024UL,
+		.lpsram_size_bytes = 64UL * 1024UL,
+		.dram_size_bytes   = 16384UL * 1024UL,
+	},
+	{
+		.name              = "mtl",
+		.aliases           = "arl,arls,ace15,ace15_mtpm,meteorlake,arrowlake",
+		.desc              = "Intel Meteor Lake / Arrow Lake ACE 1.5 (Xtensa LX7)",
+		.hw_ip_version     = 4,
+		.num_cores         = 3,
+		.freq_hz           = 393216000U,
+		.hpsram_size_bytes = 2816UL * 1024UL,	/* 44 x 64 KB EBB banks */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 1 x 64 KB EBB bank */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB IMR */
+	},
+	{
+		.name              = "lnl",
+		.aliases           = "ace20,ace20_lnl,lunarlake",
+		.desc              = "Intel Lunar Lake ACE 2.0 (Xtensa LX7)",
+		.hw_ip_version     = 5,
+		.num_cores         = 5,
+		.freq_hz           = 393216000U,
+		.hpsram_size_bytes = 2816UL * 1024UL,	/* 44 x 64 KB EBB banks */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 1 x 64 KB EBB bank */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB IMR */
+	},
+	{
+		.name              = "ptl",
+		.aliases           = "ace30,ace30_ptl,pantherlake",
+		.desc              = "Intel Panther Lake ACE 3.0 (Xtensa LX7)",
+		.hw_ip_version     = 6,
+		.num_cores         = 5,
+		.freq_hz           = 442368000U,
+		.hpsram_size_bytes = 4608UL * 1024UL,	/* 72 x 64 KB EBB banks */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 1 x 64 KB EBB bank */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB IMR */
+	},
+	{
+		.name              = "wcl",
+		.aliases           = "ace30_wcl,wildcatlake",
+		.desc              = "Intel Wildcat Lake ACE 3.0 (Xtensa LX7)",
+		.hw_ip_version     = 6,
+		.num_cores         = 3,
+		.freq_hz           = 614400000U,
+		.hpsram_size_bytes = 3456UL * 1024UL,	/* 54 x 64 KB EBB banks */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 1 x 64 KB EBB bank */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB IMR */
+	},
+	{
+		.name              = "nvl",
+		.aliases           = "ace40,ace40_nvl,novalake",
+		.desc              = "Intel Nova Lake ACE 4.0 (Xtensa LX7)",
+		.hw_ip_version     = 7,
+		.num_cores         = 4,
+		.freq_hz           = 614400000U,
+		.hpsram_size_bytes = 4608UL * 1024UL,	/* 72 x 64 KB EBB banks */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 1 x 64 KB EBB bank */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB IMR */
+	},
+	{
+		.name              = "nvl-s",
+		.aliases           = "ace40_nvls,nvls",
+		.desc              = "Intel Nova Lake-S ACE 4.0 (Xtensa LX7, 2-Core)",
+		.hw_ip_version     = 7,
+		.num_cores         = 2,
+		.freq_hz           = 438857000U,
+		.hpsram_size_bytes = 4608UL * 1024UL,	/* 72 x 64 KB EBB banks */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 1 x 64 KB EBB bank */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB IMR */
+	},
+	{
+		.name              = "default",
+		.aliases           = "host,sof-testbench4,generic",
+		.desc              = "SOF Host Testbench Default (8-Core Virtual DSP)",
+		.hw_ip_version     = 4,
+		.num_cores         = TB_TELEM_MAX_CORES,
+		.freq_hz           = (uint32_t)TB_DSP_NOMINAL_HZ,
+		.hpsram_size_bytes = 47UL * 65536UL,	/* 3008 KB (47 x 64 KB) */
+		.lpsram_size_bytes = 64UL * 1024UL,	/* 64 KB */
+		.dram_size_bytes   = 16384UL * 1024UL,	/* 16 MB */
+	},
+};
+
+static struct host_sched_telemetry g_sched_telem = {
+	.enabled = true,
+	.num_cores = TB_TELEM_MAX_CORES,
+	.hw_cfg = {
+		.platform_name      = "sof-testbench4",
+		.arch_desc          = "SOF Host Testbench Default (8-Core Virtual DSP)",
+		.hw_ip_version      = 4,
+		.num_cores          = TB_TELEM_MAX_CORES,
+		.enabled_cores_mask = (1U << TB_TELEM_MAX_CORES) - 1U,
+		.default_freq_hz    = (uint32_t)TB_DSP_NOMINAL_HZ,
+		.hpsram_size_bytes  = 47UL * 65536UL,
+		.lpsram_size_bytes  = 64UL * 1024UL,
+		.dram_size_bytes    = 16384UL * 1024UL,
+		.sram_bank_size     = 65536U,
+		.enforce_mem_limit  = false,
+	},
+	.sim_cfg = {
+		.mode = HOST_WORKLOAD_SIM_OFF,
+		.default_mem_domain = HOST_MEM_DOMAIN_SRAM,
+		.sram_factor_x100 = 100,
+		.dram_factor_x100 = 160,
+		.dram_cycles_per_word = 2,
+	},
+};
+
+static void ensure_sim_cfg_defaults(void)
+{
+	uint32_t max_mask;
+	int c;
+
+	if (g_sched_telem.hw_cfg.num_cores == 0 ||
+	    g_sched_telem.hw_cfg.num_cores > TB_TELEM_MAX_CORES)
+		g_sched_telem.hw_cfg.num_cores = TB_TELEM_MAX_CORES;
+	g_sched_telem.num_cores = g_sched_telem.hw_cfg.num_cores;
+
+	max_mask = (1U << g_sched_telem.hw_cfg.num_cores) - 1U;
+	if ((g_sched_telem.hw_cfg.enabled_cores_mask & max_mask) == 0)
+		g_sched_telem.hw_cfg.enabled_cores_mask = max_mask;
+	else
+		g_sched_telem.hw_cfg.enabled_cores_mask &= max_mask;
+	g_sched_telem.hw_cfg.enabled_cores_mask |= 1U; /* Core 0 is always enabled */
+
+	if (g_sched_telem.hw_cfg.default_freq_hz == 0)
+		g_sched_telem.hw_cfg.default_freq_hz = (uint32_t)TB_DSP_NOMINAL_HZ;
+	if (g_sched_telem.hw_cfg.hpsram_size_bytes == 0)
+		g_sched_telem.hw_cfg.hpsram_size_bytes = 47UL * 65536UL;
+	if (g_sched_telem.hw_cfg.lpsram_size_bytes == 0)
+		g_sched_telem.hw_cfg.lpsram_size_bytes = 64UL * 1024UL;
+	if (g_sched_telem.hw_cfg.dram_size_bytes == 0)
+		g_sched_telem.hw_cfg.dram_size_bytes = 16384UL * 1024UL;
+	if (g_sched_telem.hw_cfg.sram_bank_size == 0)
+		g_sched_telem.hw_cfg.sram_bank_size = 65536U;
+	if (g_sched_telem.hw_cfg.platform_name[0] == '\0')
+		snprintf(g_sched_telem.hw_cfg.platform_name,
+			 sizeof(g_sched_telem.hw_cfg.platform_name), "sof-testbench4");
+
+	if (g_sched_telem.sim_cfg.sram_factor_x100 == 0)
+		g_sched_telem.sim_cfg.sram_factor_x100 = 100;
+	if (g_sched_telem.sim_cfg.dram_factor_x100 == 0)
+		g_sched_telem.sim_cfg.dram_factor_x100 = 160;
+	if (g_sched_telem.sim_cfg.dram_cycles_per_word == 0)
+		g_sched_telem.sim_cfg.dram_cycles_per_word = 2;
+
+	for (c = 0; c < TB_TELEM_MAX_CORES; c++) {
+		if (g_sched_telem.sim_cfg.core_freq_hz[c] == 0)
+			g_sched_telem.sim_cfg.core_freq_hz[c] =
+				g_sched_telem.hw_cfg.default_freq_hz;
+		g_sched_telem.cores[c].freq_hz = g_sched_telem.sim_cfg.core_freq_hz[c];
+		g_sched_telem.cores[c].ll_budget_cycles =
+			g_sched_telem.cores[c].freq_hz / 1000U;
+	}
+}
+
+void host_telem_reset(void)
+{
+	struct host_workload_sim_cfg saved_cfg;
+	struct host_platform_hw_cfg saved_hw;
+
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	saved_cfg = g_sched_telem.sim_cfg;
+	saved_hw = g_sched_telem.hw_cfg;
+	memset(&g_sched_telem, 0, sizeof(g_sched_telem));
+	g_sched_telem.enabled = true;
+	g_sched_telem.hw_cfg = saved_hw;
+	g_sched_telem.num_cores = saved_hw.num_cores;
+	g_sched_telem.sim_cfg = saved_cfg;
+	ensure_sim_cfg_defaults();
+	TELEM_UNLOCK();
+}
+
+const struct host_platform_preset *host_platform_get_presets(size_t *out_count)
+{
+	if (out_count)
+		*out_count = ARRAY_SIZE(g_platform_presets);
+	return g_platform_presets;
+}
+
+const struct host_platform_preset *host_platform_find_preset(const char *name)
+{
+	size_t i, nlen;
+
+	if (!name || !*name)
+		return NULL;
+	nlen = strlen(name);
+
+	for (i = 0; i < ARRAY_SIZE(g_platform_presets); i++) {
+		const struct host_platform_preset *p = &g_platform_presets[i];
+		const char *cur = p->aliases;
+
+		if (strcasecmp(p->name, name) == 0)
+			return p;
+
+		while (cur && *cur) {
+			const char *comma = strchr(cur, ',');
+			size_t alen = comma ? (size_t)(comma - cur) : strlen(cur);
+
+			if (alen == nlen && strncasecmp(cur, name, nlen) == 0)
+				return p;
+			cur = comma ? (comma + 1) : NULL;
+		}
+	}
+	return NULL;
+}
+
+int host_platform_apply_preset(const char *name)
+{
+	const struct host_platform_preset *p = host_platform_find_preset(name);
+	int c;
+
+	if (!p)
+		return -1;
+
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	snprintf(g_sched_telem.hw_cfg.platform_name,
+		 sizeof(g_sched_telem.hw_cfg.platform_name), "%s", p->name);
+	snprintf(g_sched_telem.hw_cfg.arch_desc,
+		 sizeof(g_sched_telem.hw_cfg.arch_desc), "%s", p->desc);
+	g_sched_telem.hw_cfg.hw_ip_version = p->hw_ip_version;
+	g_sched_telem.hw_cfg.num_cores =
+		(p->num_cores <= TB_TELEM_MAX_CORES) ? p->num_cores : TB_TELEM_MAX_CORES;
+	g_sched_telem.num_cores = g_sched_telem.hw_cfg.num_cores;
+	g_sched_telem.hw_cfg.enabled_cores_mask =
+		(1U << g_sched_telem.hw_cfg.num_cores) - 1U;
+	g_sched_telem.hw_cfg.default_freq_hz = p->freq_hz;
+	g_sched_telem.hw_cfg.hpsram_size_bytes = p->hpsram_size_bytes;
+	g_sched_telem.hw_cfg.lpsram_size_bytes = p->lpsram_size_bytes;
+	g_sched_telem.hw_cfg.dram_size_bytes = p->dram_size_bytes;
+	g_sched_telem.hw_cfg.sram_bank_size = 65536U;
+	g_sched_telem.hw_cfg.enforce_mem_limit =
+		(strcasecmp(p->name, "default") != 0);
+
+	for (c = 0; c < TB_TELEM_MAX_CORES; c++) {
+		g_sched_telem.sim_cfg.core_freq_hz[c] = p->freq_hz;
+		g_sched_telem.cores[c].freq_hz = p->freq_hz;
+		g_sched_telem.cores[c].ll_budget_cycles = p->freq_hz / 1000U;
+	}
+	TELEM_UNLOCK();
+	return 0;
+}
+
+int host_platform_set_core_count(uint32_t num_cores)
+{
+	if (num_cores == 0 || num_cores > TB_TELEM_MAX_CORES)
+		return -1;
+
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	g_sched_telem.hw_cfg.num_cores = num_cores;
+	g_sched_telem.num_cores = num_cores;
+	g_sched_telem.hw_cfg.enabled_cores_mask = (1U << num_cores) - 1U;
+	TELEM_UNLOCK();
+	return 0;
+}
+
+uint32_t host_platform_get_core_count(void)
+{
+	ensure_sim_cfg_defaults();
+	return g_sched_telem.hw_cfg.num_cores;
+}
+
+void host_platform_set_memory(size_t hpsram_bytes, size_t lpsram_bytes,
+			      size_t dram_bytes, bool enforce_limit)
+{
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	if (hpsram_bytes > 0)
+		g_sched_telem.hw_cfg.hpsram_size_bytes = hpsram_bytes;
+	if (lpsram_bytes > 0)
+		g_sched_telem.hw_cfg.lpsram_size_bytes = lpsram_bytes;
+	if (dram_bytes > 0)
+		g_sched_telem.hw_cfg.dram_size_bytes = dram_bytes;
+	g_sched_telem.hw_cfg.enforce_mem_limit = enforce_limit;
+	TELEM_UNLOCK();
+}
+
+size_t host_platform_get_hpsram_size(void)
+{
+	ensure_sim_cfg_defaults();
+	return g_sched_telem.hw_cfg.hpsram_size_bytes;
+}
+
+size_t host_platform_get_lpsram_size(void)
+{
+	ensure_sim_cfg_defaults();
+	return g_sched_telem.hw_cfg.lpsram_size_bytes;
+}
+
+size_t host_platform_get_dram_size(void)
+{
+	ensure_sim_cfg_defaults();
+	return g_sched_telem.hw_cfg.dram_size_bytes;
+}
+
+#define TB_ALLOC_TRACK_SLOTS	8192U
+
+enum host_alloc_pool {
+	HOST_ALLOC_POOL_NONE   = 0,
+	HOST_ALLOC_POOL_HPSRAM = 1,
+	HOST_ALLOC_POOL_LPSRAM = 2,
+	HOST_ALLOC_POOL_DRAM   = 3,
+};
+
+struct host_alloc_record {
+	const void *ptr;
+	size_t bytes;
+	uint8_t pool;
+};
+
+static struct host_alloc_record g_alloc_table[TB_ALLOC_TRACK_SLOTS];
+
+static void record_tracked_alloc_locked(const void *ptr, size_t bytes, uint8_t pool)
+{
+	uint32_t h, i;
+
+	if (!ptr || pool == HOST_ALLOC_POOL_NONE)
+		return;
+
+	h = (uint32_t)(((uintptr_t)ptr >> 4) ^ ((uintptr_t)ptr >> 16));
+	for (i = 0; i < TB_ALLOC_TRACK_SLOTS; i++) {
+		uint32_t idx = (h + i) & (TB_ALLOC_TRACK_SLOTS - 1U);
+
+		if (!g_alloc_table[idx].ptr || g_alloc_table[idx].ptr == ptr) {
+			g_alloc_table[idx].ptr = ptr;
+			g_alloc_table[idx].bytes = bytes;
+			g_alloc_table[idx].pool = pool;
+			return;
+		}
+	}
+}
+
+static bool pop_tracked_alloc_locked(const void *ptr, size_t *out_bytes, uint8_t *out_pool)
+{
+	uint32_t h, i;
+
+	if (!ptr)
+		return false;
+
+	h = (uint32_t)(((uintptr_t)ptr >> 4) ^ ((uintptr_t)ptr >> 16));
+	for (i = 0; i < TB_ALLOC_TRACK_SLOTS; i++) {
+		uint32_t idx = (h + i) & (TB_ALLOC_TRACK_SLOTS - 1U);
+
+		if (g_alloc_table[idx].ptr == ptr) {
+			*out_bytes = g_alloc_table[idx].bytes;
+			*out_pool = g_alloc_table[idx].pool;
+			g_alloc_table[idx].ptr = NULL;
+			g_alloc_table[idx].bytes = 0;
+			g_alloc_table[idx].pool = HOST_ALLOC_POOL_NONE;
+			return true;
+		}
+	}
+	return false;
+}
+
+void host_platform_reset_mem_stats(void)
+{
+	TELEM_LOCK();
+	g_sched_telem.hw_cfg.hpsram_used_bytes = 0;
+	g_sched_telem.hw_cfg.hpsram_peak_bytes = 0;
+	g_sched_telem.hw_cfg.lpsram_used_bytes = 0;
+	g_sched_telem.hw_cfg.lpsram_peak_bytes = 0;
+	g_sched_telem.hw_cfg.dram_used_bytes = 0;
+	g_sched_telem.hw_cfg.dram_peak_bytes = 0;
+	g_sched_telem.hw_cfg.total_alloc_calls = 0;
+	g_sched_telem.hw_cfg.total_free_calls = 0;
+	g_sched_telem.hw_cfg.alloc_failures = 0;
+	memset(g_alloc_table, 0, sizeof(g_alloc_table));
+	TELEM_UNLOCK();
+}
+
+bool host_platform_account_alloc(const void *ptr, uint32_t flags, size_t bytes)
+{
+	uint8_t pool = HOST_ALLOC_POOL_NONE;
+	bool ok = true;
+
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+
+	if ((flags & SOF_MEM_FLAG_LOW_POWER) != 0) {
+		if (g_sched_telem.hw_cfg.enforce_mem_limit &&
+		    g_sched_telem.hw_cfg.lpsram_used_bytes + bytes >
+		    g_sched_telem.hw_cfg.lpsram_size_bytes) {
+			g_sched_telem.hw_cfg.alloc_failures++;
+			ok = false;
+		} else {
+			g_sched_telem.hw_cfg.lpsram_used_bytes += bytes;
+			if (g_sched_telem.hw_cfg.lpsram_used_bytes >
+			    g_sched_telem.hw_cfg.lpsram_peak_bytes)
+				g_sched_telem.hw_cfg.lpsram_peak_bytes =
+					g_sched_telem.hw_cfg.lpsram_used_bytes;
+			g_sched_telem.hw_cfg.total_alloc_calls++;
+			pool = HOST_ALLOC_POOL_LPSRAM;
+		}
+	} else if ((flags & SOF_MEM_FLAG_L3) != 0 ||
+		   g_sched_telem.sim_cfg.default_mem_domain == HOST_MEM_DOMAIN_DRAM) {
+		if (g_sched_telem.hw_cfg.enforce_mem_limit &&
+		    g_sched_telem.hw_cfg.dram_used_bytes + bytes >
+		    g_sched_telem.hw_cfg.dram_size_bytes) {
+			g_sched_telem.hw_cfg.alloc_failures++;
+			ok = false;
+		} else {
+			g_sched_telem.hw_cfg.dram_used_bytes += bytes;
+			if (g_sched_telem.hw_cfg.dram_used_bytes >
+			    g_sched_telem.hw_cfg.dram_peak_bytes)
+				g_sched_telem.hw_cfg.dram_peak_bytes =
+					g_sched_telem.hw_cfg.dram_used_bytes;
+			/* Also mirror in HPSRAM peak if running from SRAM/DRAM unified pool */
+			g_sched_telem.hw_cfg.hpsram_used_bytes += bytes;
+			if (g_sched_telem.hw_cfg.hpsram_used_bytes >
+			    g_sched_telem.hw_cfg.hpsram_peak_bytes)
+				g_sched_telem.hw_cfg.hpsram_peak_bytes =
+					g_sched_telem.hw_cfg.hpsram_used_bytes;
+			g_sched_telem.hw_cfg.total_alloc_calls++;
+			pool = HOST_ALLOC_POOL_DRAM;
+		}
+	} else {
+		if (g_sched_telem.hw_cfg.enforce_mem_limit &&
+		    g_sched_telem.hw_cfg.hpsram_used_bytes + bytes >
+		    g_sched_telem.hw_cfg.hpsram_size_bytes) {
+			g_sched_telem.hw_cfg.alloc_failures++;
+			ok = false;
+		} else {
+			g_sched_telem.hw_cfg.hpsram_used_bytes += bytes;
+			if (g_sched_telem.hw_cfg.hpsram_used_bytes >
+			    g_sched_telem.hw_cfg.hpsram_peak_bytes)
+				g_sched_telem.hw_cfg.hpsram_peak_bytes =
+					g_sched_telem.hw_cfg.hpsram_used_bytes;
+			g_sched_telem.hw_cfg.total_alloc_calls++;
+			pool = HOST_ALLOC_POOL_HPSRAM;
+		}
+	}
+
+	if (ok)
+		record_tracked_alloc_locked(ptr, bytes, pool);
+	TELEM_UNLOCK();
+	return ok;
+}
+
+void host_platform_account_free(const void *ptr, size_t bytes)
+{
+	size_t tracked_bytes = bytes;
+	uint8_t pool = HOST_ALLOC_POOL_HPSRAM;
+
+	TELEM_LOCK();
+	(void)pop_tracked_alloc_locked(ptr, &tracked_bytes, &pool);
+
+	if (pool == HOST_ALLOC_POOL_LPSRAM) {
+		if (g_sched_telem.hw_cfg.lpsram_used_bytes >= tracked_bytes)
+			g_sched_telem.hw_cfg.lpsram_used_bytes -= tracked_bytes;
+		else
+			g_sched_telem.hw_cfg.lpsram_used_bytes = 0;
+	} else if (pool == HOST_ALLOC_POOL_DRAM) {
+		if (g_sched_telem.hw_cfg.dram_used_bytes >= tracked_bytes)
+			g_sched_telem.hw_cfg.dram_used_bytes -= tracked_bytes;
+		else
+			g_sched_telem.hw_cfg.dram_used_bytes = 0;
+
+		if (g_sched_telem.hw_cfg.hpsram_used_bytes >= tracked_bytes)
+			g_sched_telem.hw_cfg.hpsram_used_bytes -= tracked_bytes;
+		else
+			g_sched_telem.hw_cfg.hpsram_used_bytes = 0;
+	} else {
+		if (g_sched_telem.hw_cfg.hpsram_used_bytes >= tracked_bytes)
+			g_sched_telem.hw_cfg.hpsram_used_bytes -= tracked_bytes;
+		else
+			g_sched_telem.hw_cfg.hpsram_used_bytes = 0;
+	}
+
+	g_sched_telem.hw_cfg.total_free_calls++;
+	TELEM_UNLOCK();
+}
+
+int host_cpu_num_cores(void)
+{
+	ensure_sim_cfg_defaults();
+	return (int)g_sched_telem.hw_cfg.num_cores;
+}
+
+int host_cpu_enable_core(int id)
+{
+	ensure_sim_cfg_defaults();
+	if (id < 0 || (uint32_t)id >= g_sched_telem.hw_cfg.num_cores)
+		return -1;
+	g_sched_telem.hw_cfg.enabled_cores_mask |= (1U << id);
+	return 0;
+}
+
+void host_cpu_disable_core(int id)
+{
+	ensure_sim_cfg_defaults();
+	if (id <= 0 || (uint32_t)id >= g_sched_telem.hw_cfg.num_cores)
+		return;
+	g_sched_telem.hw_cfg.enabled_cores_mask &= ~(1U << id);
+}
+
+int host_cpu_is_core_enabled(int id)
+{
+	ensure_sim_cfg_defaults();
+	if (id < 0 || (uint32_t)id >= g_sched_telem.hw_cfg.num_cores)
+		return 0;
+	return (g_sched_telem.hw_cfg.enabled_cores_mask & (1U << id)) ? 1 : 0;
+}
+
+int host_cpu_enabled_cores(void)
+{
+	ensure_sim_cfg_defaults();
+	return (int)g_sched_telem.hw_cfg.enabled_cores_mask;
+}
+
+void host_telem_set_enabled(bool enabled)
+{
+	g_sched_telem.enabled = enabled;
+}
+
+struct host_sched_telemetry *host_telem_get(void)
+{
+	ensure_sim_cfg_defaults();
+	return &g_sched_telem;
+}
+
+void host_workload_sim_set_mode(uint32_t mode)
+{
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	if (mode > HOST_WORKLOAD_SIM_REALTIME)
+		mode = HOST_WORKLOAD_SIM_REALTIME;
+	g_sched_telem.sim_cfg.mode = mode;
+	TELEM_UNLOCK();
+}
+
+uint32_t host_workload_sim_get_mode(void)
+{
+	ensure_sim_cfg_defaults();
+	return g_sched_telem.sim_cfg.mode;
+}
+
+void host_workload_sim_set_core_freq(int core, uint32_t freq_hz)
+{
+	int c;
+
+	if (freq_hz < 1000000U)
+		freq_hz = (uint32_t)TB_DSP_NOMINAL_HZ;
+
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	if (core < 0) {
+		g_sched_telem.hw_cfg.default_freq_hz = freq_hz;
+		for (c = 0; c < TB_TELEM_MAX_CORES; c++) {
+			g_sched_telem.sim_cfg.core_freq_hz[c] = freq_hz;
+			g_sched_telem.cores[c].freq_hz = freq_hz;
+			g_sched_telem.cores[c].ll_budget_cycles = freq_hz / 1000U;
+		}
+	} else if (core < TB_TELEM_MAX_CORES) {
+		if (core == 0)
+			g_sched_telem.hw_cfg.default_freq_hz = freq_hz;
+		g_sched_telem.sim_cfg.core_freq_hz[core] = freq_hz;
+		g_sched_telem.cores[core].freq_hz = freq_hz;
+		g_sched_telem.cores[core].ll_budget_cycles = freq_hz / 1000U;
+	}
+	TELEM_UNLOCK();
+}
+
+uint32_t host_workload_sim_get_core_freq(int core)
+{
+	ensure_sim_cfg_defaults();
+	if (core < 0 || core >= TB_TELEM_MAX_CORES)
+		core = 0;
+	return g_sched_telem.sim_cfg.core_freq_hz[core];
+}
+
+void host_workload_sim_set_mem_domain(uint32_t mem_domain, uint32_t dram_factor_x100,
+				      uint32_t dram_cycles_per_word)
+{
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	g_sched_telem.sim_cfg.default_mem_domain =
+		(mem_domain == HOST_MEM_DOMAIN_DRAM) ? HOST_MEM_DOMAIN_DRAM : HOST_MEM_DOMAIN_SRAM;
+	if (dram_factor_x100 >= 100U && dram_factor_x100 <= 1000U)
+		g_sched_telem.sim_cfg.dram_factor_x100 = dram_factor_x100;
+	if (dram_cycles_per_word <= 64U)
+		g_sched_telem.sim_cfg.dram_cycles_per_word = dram_cycles_per_word;
+	TELEM_UNLOCK();
+}
+
+int host_workload_sim_set_mod_override(uint32_t comp_id, uint32_t cpc_override,
+				       uint32_t mem_domain_override)
+{
+	uint32_t i;
+	int rc = -1;
+
+	TELEM_LOCK();
+	ensure_sim_cfg_defaults();
+	for (i = 0; i < g_sched_telem.sim_cfg.num_overrides; i++) {
+		if (g_sched_telem.sim_cfg.overrides[i].active &&
+		    g_sched_telem.sim_cfg.overrides[i].comp_id == comp_id) {
+			g_sched_telem.sim_cfg.overrides[i].cpc_override = cpc_override;
+			g_sched_telem.sim_cfg.overrides[i].mem_domain_override =
+				mem_domain_override;
+			rc = 0;
+			break;
+		}
+	}
+	if (rc < 0 && g_sched_telem.sim_cfg.num_overrides < TB_TELEM_MAX_OVERRIDES) {
+		struct host_workload_mod_override *ov =
+			&g_sched_telem.sim_cfg.overrides[g_sched_telem.sim_cfg.num_overrides++];
+		ov->active = true;
+		ov->comp_id = comp_id;
+		ov->cpc_override = cpc_override;
+		ov->mem_domain_override = mem_domain_override;
+		rc = 0;
+	}
+	TELEM_UNLOCK();
+	return rc;
+}
+
+void host_workload_sim_clear_overrides(void)
+{
+	TELEM_LOCK();
+	g_sched_telem.sim_cfg.num_overrides = 0;
+	memset(g_sched_telem.sim_cfg.overrides, 0, sizeof(g_sched_telem.sim_cfg.overrides));
+	TELEM_UNLOCK();
+}
+
+static uint32_t get_core_freq_hz(uint32_t core)
+{
+	ensure_sim_cfg_defaults();
+	if (core >= TB_TELEM_MAX_CORES)
+		core = 0;
+	return g_sched_telem.sim_cfg.core_freq_hz[core];
+}
+
+static uint64_t cycles_to_ns(uint64_t cycles, uint32_t freq_hz)
+{
+	uint64_t f_khz = (freq_hz >= 1000U) ? (freq_hz / 1000U) : (TB_DSP_NOMINAL_HZ / 1000ULL);
+
+	return (cycles * 1000000ULL) / f_khz;
+}
+
+static void pace_execution_ns(uint64_t delay_ns)
+{
+#if !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+	struct timespec t0, now, req;
+	uint64_t start_ns, target_ns, cur_ns;
+
+	if (delay_ns == 0)
+		return;
+	if (delay_ns > 50000000ULL)
+		delay_ns = 50000000ULL; /* Cap single-step sleep at 50 ms */
+
+	if (clock_gettime(CLOCK_MONOTONIC, &t0) != 0)
+		return;
+	start_ns = (uint64_t)t0.tv_sec * 1000000000ULL + (uint64_t)t0.tv_nsec;
+	target_ns = start_ns + delay_ns;
+
+	if (delay_ns >= 80000ULL) {
+		uint64_t sleep_ns = delay_ns - 40000ULL;
+
+		req.tv_sec = (time_t)(sleep_ns / 1000000000ULL);
+		req.tv_nsec = (long)(sleep_ns % 1000000000ULL);
+		nanosleep(&req, NULL);
+	}
+
+	do {
+		if (clock_gettime(CLOCK_MONOTONIC, &now) != 0)
+			break;
+		cur_ns = (uint64_t)now.tv_sec * 1000000000ULL + (uint64_t)now.tv_nsec;
+	} while (cur_ns < target_ns);
+#else
+	(void)delay_ns;
+#endif
+}
+
+uint64_t host_telem_timestamp_cycles(void)
+{
+#if defined(__XTENSA__)
+	uint32_t ccount = 0;
+
+	__asm__ __volatile__("rsr.ccount %0" : "=a"(ccount));
+	return (uint64_t)ccount;
+#elif defined(CONFIG_XT_SIMULATOR)
+	clock_t c = clock();
+
+	return (uint64_t)c * ((TB_DSP_NOMINAL_HZ / (uint64_t)CLOCKS_PER_SEC));
+#else
+	struct timespec ts;
+	uint64_t ns;
+
+	if (clock_gettime(CLOCK_THREAD_CPUTIME_ID, &ts) != 0)
+		clock_gettime(CLOCK_MONOTONIC, &ts);
+
+	ns = (uint64_t)ts.tv_sec * 1000000000ULL + (uint64_t)ts.tv_nsec;
+	/* Convert nanoseconds to nominal 400 MHz DSP cycles (0.4 cycles/ns) */
+	return (ns * (TB_DSP_NOMINAL_HZ / 1000000ULL)) / 1000ULL;
+#endif
+}
+
+static uint64_t host_telem_wall_ns(void)
+{
+#if !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+	struct timespec ts;
+	uint64_t now_ns;
+
+	if (clock_gettime(CLOCK_MONOTONIC, &ts) != 0)
+		return 0;
+	now_ns = (uint64_t)ts.tv_sec * 1000000000ULL + (uint64_t)ts.tv_nsec;
+	if (g_sched_telem.run_start_wall_ns == 0)
+		g_sched_telem.run_start_wall_ns = now_ns;
+	return (now_ns >= g_sched_telem.run_start_wall_ns) ?
+	       (now_ns - g_sched_telem.run_start_wall_ns) : 0;
+#else
+	return 0;
+#endif
+}
+
+void host_telem_ll_tick_begin(void)
+{
+	int c;
+
+	if (!g_sched_telem.enabled)
+		return;
+
+	TELEM_LOCK();
+	if (g_sched_telem.run_start_wall_ns == 0)
+		(void)host_telem_wall_ns();
+	g_sched_telem.current_ll_tick++;
+	for (c = 0; c < TB_TELEM_MAX_CORES; c++)
+		g_sched_telem.cores[c]._tick_ll_offset_cycles = 0;
+	TELEM_UNLOCK();
+}
+
+void host_telem_trace_clear(void)
+{
+	TELEM_LOCK();
+	g_sched_telem.trace_head = 0;
+	g_sched_telem.trace_count = 0;
+	g_sched_telem.trace_total_events = 0;
+	memset(g_sched_telem.trace_events, 0, sizeof(g_sched_telem.trace_events));
+	TELEM_UNLOCK();
+}
+
+uint32_t host_telem_trace_read(struct host_sched_trace_event *out_events,
+			       uint32_t max_events, uint32_t since_seq_id,
+			       int core_filter, int pipe_filter,
+			       int comp_filter, int domain_filter)
+{
+	uint32_t count, start_idx, i, copied = 0;
+
+	if (!out_events || max_events == 0)
+		return 0;
+
+	TELEM_LOCK();
+	count = g_sched_telem.trace_count;
+	if (count > TB_TELEM_TRACE_CAPACITY)
+		count = TB_TELEM_TRACE_CAPACITY;
+	start_idx = (g_sched_telem.trace_head + TB_TELEM_TRACE_CAPACITY - count) %
+		    TB_TELEM_TRACE_CAPACITY;
+
+	for (i = 0; i < count && copied < max_events; i++) {
+		const struct host_sched_trace_event *ev =
+			&g_sched_telem.trace_events[(start_idx + i) % TB_TELEM_TRACE_CAPACITY];
+
+		if (since_seq_id > 0 && ev->seq_id <= since_seq_id)
+			continue;
+		if (core_filter >= 0 && ev->core_id != (uint8_t)core_filter)
+			continue;
+		if (pipe_filter >= 0 && ev->pipeline_id != (uint16_t)pipe_filter)
+			continue;
+		if (comp_filter >= 0 && ev->comp_id != (uint32_t)comp_filter)
+			continue;
+		if (domain_filter >= 0 && ev->event_type != (uint8_t)domain_filter)
+			continue;
+
+		out_events[copied++] = *ev;
+	}
+	TELEM_UNLOCK();
+
+	return copied;
+}
+
+static void record_mod_sched_event(struct host_mod_telem *m, uint32_t core_id,
+				   uint32_t freq_hz, uint8_t event_type,
+				   uint32_t mod_iter_nr, uint64_t delta_cycles,
+				   uint32_t cpc_budget, uint32_t bytes_in,
+				   uint32_t bytes_out, uint64_t wall_start_ns,
+				   uint64_t wall_complete_ns, int ret_status)
+{
+	struct host_core_telem *c;
+	struct host_sched_trace_event *ev;
+	uint32_t tick_nr;
+	uint64_t tick_budget_cyc, tick_base_cyc, tick_base_ns;
+	uint64_t virt_start_cyc, virt_complete_cyc, virt_start_ns, virt_complete_ns, deadline_ns;
+	uint64_t exec_ns;
+
+	if (core_id >= TB_TELEM_MAX_CORES)
+		core_id = 0;
+
+	TELEM_LOCK();
+	c = &g_sched_telem.cores[core_id];
+	tick_nr = g_sched_telem.current_ll_tick ? g_sched_telem.current_ll_tick : 1U;
+	tick_budget_cyc = (freq_hz >= 1000U) ? (freq_hz / 1000U) : 400000ULL;
+	tick_base_cyc = (uint64_t)(tick_nr - 1U) * tick_budget_cyc;
+	tick_base_ns = (uint64_t)(tick_nr - 1U) * 1000000ULL;
+	exec_ns = cycles_to_ns(delta_cycles, freq_hz);
+
+	if (event_type != HOST_SCHED_EVT_DP_RUN) {
+		virt_start_cyc = tick_base_cyc + c->_tick_ll_offset_cycles;
+		virt_complete_cyc = virt_start_cyc + delta_cycles;
+		c->_tick_ll_offset_cycles += delta_cycles;
+		virt_start_ns = tick_base_ns +
+				cycles_to_ns(virt_start_cyc - tick_base_cyc, freq_hz);
+		virt_complete_ns = virt_start_ns + exec_ns;
+		deadline_ns = (uint64_t)tick_nr * 1000000ULL;
+	} else {
+		uint64_t ll_end_cyc = tick_base_cyc + c->_tick_ll_offset_cycles;
+		uint64_t dp_period_ns = (uint64_t)(m->period_us ? m->period_us : 1000U) * 1000ULL;
+
+		if (c->_dp_cursor_cycles < ll_end_cyc)
+			c->_dp_cursor_cycles = ll_end_cyc;
+		virt_start_cyc = c->_dp_cursor_cycles;
+		virt_complete_cyc = virt_start_cyc + delta_cycles;
+		c->_dp_cursor_cycles = virt_complete_cyc;
+		virt_start_ns = cycles_to_ns(virt_start_cyc, freq_hz);
+		virt_complete_ns = virt_start_ns + exec_ns;
+		deadline_ns = tick_base_ns + dp_period_ns;
+	}
+
+	if (event_type != HOST_SCHED_EVT_DP_SYNC) {
+		m->last_start_cycles = virt_start_cyc;
+		m->last_complete_cycles = virt_complete_cyc;
+		m->last_start_ns = virt_start_ns;
+		m->last_complete_ns = virt_complete_ns;
+		m->last_deadline_ns = deadline_ns;
+		m->last_wall_start_ns = wall_start_ns;
+		m->last_wall_complete_ns = wall_complete_ns;
+	}
+
+	ev = &g_sched_telem.trace_events[g_sched_telem.trace_head];
+	ev->seq_id = ++g_sched_telem.trace_total_events;
+	ev->ll_tick_nr = tick_nr;
+	ev->mod_iter_nr = mod_iter_nr;
+	ev->comp_id = m->comp_id;
+	ev->pipeline_id = (uint16_t)m->pipeline_id;
+	ev->core_id = (uint8_t)core_id;
+	ev->event_type = event_type;
+	ev->mem_domain = (uint8_t)m->mem_domain;
+	ev->cpc_violation = (cpc_budget > 0 && delta_cycles > cpc_budget) ? 1U : 0U;
+	ev->period_us = (uint16_t)(m->period_us ? m->period_us : 1000U);
+	ev->start_cycles = virt_start_cyc;
+	ev->complete_cycles = virt_complete_cyc;
+	ev->duration_cycles = (uint32_t)delta_cycles;
+	ev->cpc_budget = cpc_budget;
+	ev->start_ns = virt_start_ns;
+	ev->complete_ns = virt_complete_ns;
+	ev->deadline_ns = deadline_ns;
+	ev->wall_start_ns = wall_start_ns;
+	ev->wall_complete_ns = wall_complete_ns;
+	ev->bytes_in = bytes_in;
+	ev->bytes_out = bytes_out;
+	ev->ret_status = ret_status;
+
+	g_sched_telem.trace_head = (g_sched_telem.trace_head + 1U) % TB_TELEM_TRACE_CAPACITY;
+	if (g_sched_telem.trace_count < TB_TELEM_TRACE_CAPACITY)
+		g_sched_telem.trace_count++;
+
+	TELEM_UNLOCK();
+}
+
+/*
+ * Fast integer log2 in Q8 fixed-point (256 * log2(val)) for val > 0.
+ * Zero floating-point or libm dependency for Xtensa simulator compatibility.
+ */
+static int32_t fast_log2_q8(uint64_t val)
+{
+	int k = 0;
+	uint64_t tmp = val;
+	uint32_t m, frac_q8;
+
+	if (val == 0)
+		return 0;
+
+	while (tmp >>= 1)
+		k++;
+
+	if (k >= 8)
+		m = (uint32_t)((val >> (k - 8)) & 0xFFU);
+	else
+		m = (uint32_t)((val << (8 - k)) & 0xFFU);
+
+	/* Polynomial approximation log2(1 + f) ~= f + f*(1-f)*3/8 for f = m/256 */
+	frac_q8 = m + ((m * (256U - m)) >> 9) + ((m * (256U - m)) >> 10);
+	return (k << 8) + (int32_t)frac_q8;
+}
+
+/* Convert 16-bit peak amplitude [0..32768] to 0.01 dBFS [-12000..0] */
+static int16_t peak_s16_to_dbfs_x100(uint32_t peak)
+{
+	int32_t log2_q8, db_x100;
+
+	if (peak == 0)
+		return -12000;
+	if (peak >= 32768U)
+		return 0;
+
+	/* 20 * 100 * log10(2) ~= 602.06 */
+	log2_q8 = fast_log2_q8(peak) - (15 << 8);
+	db_x100 = (log2_q8 * 602) / 256;
+	if (db_x100 < -12000)
+		db_x100 = -12000;
+	if (db_x100 > 0)
+		db_x100 = 0;
+	return (int16_t)db_x100;
+}
+
+/* Convert 16-bit mean square [0..2^30] to 0.01 dBFS [-12000..0] */
+static int16_t ms_s16_to_dbfs_x100(uint64_t mean_sq)
+{
+	int32_t log2_q8, db_x100;
+
+	if (mean_sq == 0)
+		return -12000;
+	if (mean_sq >= (1ULL << 30))
+		return 0;
+
+	/* 10 * 100 * log10(2) ~= 301.03 */
+	log2_q8 = fast_log2_q8(mean_sq) - (30 << 8);
+	db_x100 = (log2_q8 * 301) / 256;
+	if (db_x100 < -12000)
+		db_x100 = -12000;
+	if (db_x100 > 0)
+		db_x100 = 0;
+	return (int16_t)db_x100;
+}
+
+/*
+ * Capture up to TB_MOD_TAP_SAMPLES normalized S16 samples from a circular buffer
+ * and compute RMS and Peak in 0.01 dBFS.
+ */
+static void capture_circular_samples(const void *base_addr, size_t buf_size,
+				     size_t start_offset, size_t avail_bytes,
+				     uint16_t frame_fmt,
+				     int16_t *out_samples, uint16_t *out_num_samples,
+				     int16_t *out_rms_dbfs_x100,
+				     int16_t *out_peak_dbfs_x100)
+{
+	const uint8_t *buf = (const uint8_t *)base_addr;
+	size_t bps = 2;
+	size_t n_avail, n_tap, i;
+	uint32_t peak = 0;
+	uint64_t sum_sq = 0;
+
+	if (!buf || buf_size == 0 || avail_bytes == 0) {
+		*out_num_samples = 0;
+		*out_rms_dbfs_x100 = -12000;
+		*out_peak_dbfs_x100 = -12000;
+		return;
+	}
+
+	switch (frame_fmt) {
+	case SOF_IPC_FRAME_S16_LE:
+		bps = 2;
+		break;
+	case SOF_IPC_FRAME_S24_4LE:
+	case SOF_IPC_FRAME_S32_LE:
+	case SOF_IPC_FRAME_FLOAT:
+		bps = 4;
+		break;
+	case SOF_IPC_FRAME_S24_3LE:
+		bps = 3;
+		break;
+	default:
+		bps = 2;
+		break;
+	}
+
+	if (avail_bytes > buf_size)
+		avail_bytes = buf_size;
+
+	n_avail = avail_bytes / bps;
+	n_tap = (n_avail < TB_MOD_TAP_SAMPLES) ? n_avail : TB_MOD_TAP_SAMPLES;
+	if (n_tap == 0) {
+		*out_num_samples = 0;
+		*out_rms_dbfs_x100 = -12000;
+		*out_peak_dbfs_x100 = -12000;
+		return;
+	}
+
+	for (i = 0; i < n_tap; i++) {
+		size_t off = (start_offset + i * bps) % buf_size;
+		int16_t s = 0;
+		uint32_t abs_s;
+
+		if (bps == 2 && off + 2 <= buf_size) {
+			s = (int16_t)((uint16_t)buf[off] | ((uint16_t)buf[off + 1] << 8));
+		} else if (bps == 4 && off + 4 <= buf_size) {
+			int32_t v = (int32_t)((uint32_t)buf[off] |
+					      ((uint32_t)buf[off + 1] << 8) |
+					      ((uint32_t)buf[off + 2] << 16) |
+					      ((uint32_t)buf[off + 3] << 24));
+			if (frame_fmt == SOF_IPC_FRAME_S24_4LE) {
+				v = (v << 8) >> 8;
+				s = (int16_t)(v >> 8);
+			} else {
+				s = (int16_t)(v >> 16);
+			}
+		} else if (bps == 3 && off + 3 <= buf_size) {
+			int32_t v = (int32_t)buf[off] |
+				    ((int32_t)buf[off + 1] << 8) |
+				    ((int32_t)(int8_t)buf[off + 2] << 16);
+			s = (int16_t)(v >> 8);
+		}
+
+		out_samples[i] = s;
+		abs_s = (s < 0) ? (uint32_t)(-(int32_t)s) : (uint32_t)s;
+		if (abs_s > peak)
+			peak = abs_s;
+		sum_sq += (uint64_t)abs_s * (uint64_t)abs_s;
+	}
+
+	*out_num_samples = (uint16_t)n_tap;
+	*out_peak_dbfs_x100 = peak_s16_to_dbfs_x100(peak);
+	*out_rms_dbfs_x100 = ms_s16_to_dbfs_x100(sum_sq / n_tap);
+}
+
+static void update_core_util(int core, struct host_core_telem *c)
+{
+	uint32_t freq_hz = get_core_freq_hz((uint32_t)core);
+	uint64_t total_kcps = (uint64_t)c->ll_avg_kcps + (uint64_t)c->dp_avg_kcps;
+	uint64_t max_kcps = freq_hz / 1000ULL;
+
+	c->freq_hz = freq_hz;
+	c->ll_budget_cycles = freq_hz / 1000U;
+
+	if (max_kcps > 0) {
+		uint64_t u = (total_kcps * 10000ULL) / max_kcps;
+
+		if (u == 0 && (c->ll_tick_count > 0 || c->dp_run_count > 0))
+			u = 1;
+		if (u > 10000ULL)
+			u = 10000ULL;
+		c->total_util_x100 = (uint32_t)u;
+	}
+}
+
+void host_telem_core_ll_tick(int core, uint32_t tasks_run, uint64_t cycles)
+{
+	struct host_core_telem *c;
+	uint32_t freq_hz;
+	uint64_t exec_ns;
+
+	if (!g_sched_telem.enabled || core < 0 || core >= TB_TELEM_MAX_CORES)
+		return;
+	if (tasks_run == 0)
+		return;
+
+	TELEM_LOCK();
+	c = &g_sched_telem.cores[core];
+	if (g_sched_telem.sim_cfg.mode != HOST_WORKLOAD_SIM_OFF && c->_sim_ll_tick_cycles > 0) {
+		cycles = c->_sim_ll_tick_cycles;
+		c->_sim_ll_tick_cycles = 0;
+	}
+
+	if (cycles == 0)
+		cycles = 1;
+
+	freq_hz = get_core_freq_hz((uint32_t)core);
+	exec_ns = cycles_to_ns(cycles, freq_hz);
+
+	c->active = true;
+	c->freq_hz = freq_hz;
+	c->ll_budget_cycles = freq_hz / 1000U;
+	c->ll_tick_count++;
+	c->ll_active_tasks = tasks_run;
+	c->ll_last_cycles = cycles;
+	c->ll_total_cycles += cycles;
+	c->ll_avg_cycles = c->ll_total_cycles / c->ll_tick_count;
+	if (cycles > c->ll_peak_cycles)
+		c->ll_peak_cycles = cycles;
+
+	c->ll_last_exec_ns = exec_ns;
+	c->ll_total_exec_ns += exec_ns;
+	c->ll_avg_exec_ns = c->ll_total_exec_ns / c->ll_tick_count;
+	if (exec_ns > c->ll_peak_exec_ns)
+		c->ll_peak_exec_ns = exec_ns;
+
+	if (c->ll_budget_cycles > 0 && cycles > c->ll_budget_cycles)
+		c->ll_deadline_violations++;
+
+	/* Assume 1 ms nominal LL tick period -> 1000 ticks/sec -> KCPS = cycles */
+	c->ll_avg_kcps = (uint32_t)c->ll_avg_cycles;
+	c->ll_peak_kcps = (uint32_t)c->ll_peak_cycles;
+	update_core_util(core, c);
+	TELEM_UNLOCK();
+}
+
+void host_telem_core_dp_run(int core, uint32_t active_dp_threads, uint64_t cycles)
+{
+	struct host_core_telem *c;
+	uint32_t freq_hz, i, dp_avg_k = 0, dp_peak_k = 0;
+	uint64_t exec_ns;
+
+	if (!g_sched_telem.enabled || core < 0 || core >= TB_TELEM_MAX_CORES)
+		return;
+
+	TELEM_LOCK();
+	c = &g_sched_telem.cores[core];
+	if (g_sched_telem.sim_cfg.mode != HOST_WORKLOAD_SIM_OFF && c->_sim_dp_run_cycles > 0) {
+		cycles = c->_sim_dp_run_cycles;
+		c->_sim_dp_run_cycles = 0;
+	}
+
+	if (cycles == 0)
+		cycles = 1;
+
+	freq_hz = get_core_freq_hz((uint32_t)core);
+	exec_ns = cycles_to_ns(cycles, freq_hz);
+
+	c->active = true;
+	c->freq_hz = freq_hz;
+	c->ll_budget_cycles = freq_hz / 1000U;
+	c->dp_run_count++;
+	if (active_dp_threads > 0)
+		c->dp_active_threads = active_dp_threads;
+	c->dp_last_cycles = cycles;
+	c->dp_total_cycles += cycles;
+	c->dp_avg_cycles = c->dp_total_cycles / c->dp_run_count;
+	if (cycles > c->dp_peak_cycles)
+		c->dp_peak_cycles = cycles;
+
+	c->dp_last_exec_ns = exec_ns;
+	c->dp_total_exec_ns += exec_ns;
+	c->dp_avg_exec_ns = c->dp_total_exec_ns / c->dp_run_count;
+	if (exec_ns > c->dp_peak_exec_ns)
+		c->dp_peak_exec_ns = exec_ns;
+
+	/* Sum amortized KCPS across active DP modules on this core */
+	for (i = 0; i < g_sched_telem.num_mods; i++) {
+		if (g_sched_telem.mods[i].active &&
+		    g_sched_telem.mods[i].core_id == (uint32_t)core &&
+		    g_sched_telem.mods[i].proc_domain == COMP_PROCESSING_DOMAIN_DP) {
+			dp_avg_k += g_sched_telem.mods[i].avg_kcps;
+			dp_peak_k += g_sched_telem.mods[i].peak_kcps;
+		}
+	}
+	c->dp_avg_kcps = dp_avg_k ? dp_avg_k : (uint32_t)c->dp_avg_cycles;
+	c->dp_peak_kcps = dp_peak_k ? dp_peak_k : (uint32_t)c->dp_peak_cycles;
+	update_core_util(core, c);
+	TELEM_UNLOCK();
+}
+
+static struct host_pipe_telem *find_or_alloc_pipe(uint32_t pipeline_id)
+{
+	uint32_t i;
+	struct host_pipe_telem *p = NULL;
+
+	for (i = 0; i < g_sched_telem.num_pipes; i++) {
+		if (g_sched_telem.pipes[i].active &&
+		    g_sched_telem.pipes[i].pipeline_id == pipeline_id)
+			return &g_sched_telem.pipes[i];
+	}
+
+	TELEM_LOCK();
+	for (i = 0; i < g_sched_telem.num_pipes; i++) {
+		if (g_sched_telem.pipes[i].active &&
+		    g_sched_telem.pipes[i].pipeline_id == pipeline_id) {
+			p = &g_sched_telem.pipes[i];
+			break;
+		}
+	}
+	if (!p && g_sched_telem.num_pipes < TB_TELEM_MAX_PIPES) {
+		p = &g_sched_telem.pipes[g_sched_telem.num_pipes++];
+		memset(p, 0, sizeof(*p));
+		p->pipeline_id = pipeline_id;
+		p->active = true;
+	}
+	TELEM_UNLOCK();
+
+	return p;
+}
+
+static struct host_mod_telem *find_or_alloc_mod(uint32_t comp_id)
+{
+	uint32_t i;
+	struct host_mod_telem *m = NULL;
+
+	for (i = 0; i < g_sched_telem.num_mods; i++) {
+		if (g_sched_telem.mods[i].active &&
+		    g_sched_telem.mods[i].comp_id == comp_id)
+			return &g_sched_telem.mods[i];
+	}
+
+	TELEM_LOCK();
+	for (i = 0; i < g_sched_telem.num_mods; i++) {
+		if (g_sched_telem.mods[i].active &&
+		    g_sched_telem.mods[i].comp_id == comp_id) {
+			m = &g_sched_telem.mods[i];
+			break;
+		}
+	}
+	if (!m && g_sched_telem.num_mods < TB_TELEM_MAX_MODS) {
+		m = &g_sched_telem.mods[g_sched_telem.num_mods++];
+		memset(m, 0, sizeof(*m));
+		m->comp_id = comp_id;
+		m->active = true;
+	}
+	TELEM_UNLOCK();
+
+	return m;
+}
+
+static uint32_t default_cpc_for_comp_type(uint32_t comp_type, uint32_t proc_domain,
+					  uint32_t period_us, uint32_t ibs, uint32_t obs)
+{
+	uint32_t base_cpc;
+	uint32_t chunk_bytes = ibs ? ibs : obs;
+
+	switch (comp_type) {
+	case SOF_COMP_HOST:
+	case SOF_COMP_DAI:
+	case SOF_COMP_SG_HOST:
+	case SOF_COMP_SG_DAI:
+	case SOF_COMP_FILEREAD:
+	case SOF_COMP_FILEWRITE:
+		base_cpc = 1647;
+		break;
+	case SOF_COMP_VOLUME:
+		base_cpc = 10183;
+		break;
+	case SOF_COMP_MIXER:
+		base_cpc = 2950;
+		break;
+	case SOF_COMP_MUX:
+	case SOF_COMP_DEMUX:
+	case SOF_COMP_SELECTOR:
+		base_cpc = 2900;
+		break;
+	case SOF_COMP_SRC:
+		base_cpc = 24000;
+		break;
+	case SOF_COMP_ASRC:
+		base_cpc = 32000;
+		break;
+	case SOF_COMP_TONE:
+		base_cpc = 4200;
+		break;
+	case SOF_COMP_BUFFER:
+		base_cpc = 400;
+		break;
+	case SOF_COMP_EQ_IIR:
+		base_cpc = 18500;
+		break;
+	case SOF_COMP_EQ_FIR:
+		base_cpc = 26000;
+		break;
+	case SOF_COMP_KEYWORD_DETECT:
+		base_cpc = 45000;
+		break;
+	case SOF_COMP_KPB:
+		base_cpc = 3500;
+		break;
+	case SOF_COMP_DCBLOCK:
+		base_cpc = 6400;
+		break;
+	case SOF_COMP_SMART_AMP:
+		base_cpc = 38000;
+		break;
+	default:
+		base_cpc = (proc_domain == COMP_PROCESSING_DOMAIN_DP) ? 48000 : 12000;
+		break;
+	}
+
+	if (proc_domain == COMP_PROCESSING_DOMAIN_DP && period_us > 1000)
+		base_cpc = base_cpc * (period_us / 1000U);
+	else if (chunk_bytes > 384U)
+		base_cpc = (uint32_t)(((uint64_t)base_cpc * chunk_bytes) / 384ULL);
+
+	return base_cpc;
+}
+
+static void resolve_mod_sim_params(struct host_mod_telem *m)
+{
+	uint32_t i;
+	uint32_t cpc_ov = 0;
+	uint32_t mem_ov = HOST_MEM_DOMAIN_AUTO;
+
+	ensure_sim_cfg_defaults();
+
+	for (i = 0; i < g_sched_telem.sim_cfg.num_overrides; i++) {
+		const struct host_workload_mod_override *ov =
+			&g_sched_telem.sim_cfg.overrides[i];
+
+		if (!ov->active)
+			continue;
+		if (ov->comp_id == m->comp_id ||
+		    ((ov->comp_id & 0xFFFF0000U) == 0xFFFF0000U &&
+		     (ov->comp_id & 0xFFFFU) == (m->comp_id & 0xFFFFU))) {
+			if (ov->cpc_override > 0)
+				cpc_ov = ov->cpc_override;
+			if (ov->mem_domain_override != HOST_MEM_DOMAIN_AUTO)
+				mem_ov = ov->mem_domain_override;
+			break;
+		}
+	}
+
+	if (mem_ov != HOST_MEM_DOMAIN_AUTO)
+		m->mem_domain = (mem_ov == HOST_MEM_DOMAIN_DRAM) ?
+				HOST_MEM_DOMAIN_DRAM : HOST_MEM_DOMAIN_SRAM;
+	else
+		m->mem_domain = g_sched_telem.sim_cfg.default_mem_domain;
+
+	if (cpc_ov > 0) {
+		m->effective_cpc = cpc_ov;
+	} else if (m->cpc > 0) {
+		m->effective_cpc = m->cpc;
+	} else {
+		m->effective_cpc = default_cpc_for_comp_type(m->type, m->proc_domain,
+							     m->period_us, m->ibs, m->obs);
+	}
+	if (m->cpc == 0)
+		m->cpc = m->effective_cpc;
+}
+
+static uint64_t compute_simulated_mod_cycles(const struct host_mod_telem *m,
+					     uint32_t bytes_in, uint32_t bytes_out)
+{
+	uint64_t base = m->effective_cpc ? m->effective_cpc : 2000ULL;
+	uint64_t cycles;
+
+	/* If module has connected pins but transferred 0 bytes on this tick, charge idle check */
+	if (bytes_in == 0 && bytes_out == 0 && (m->num_in_pins > 0 || m->num_out_pins > 0))
+		base = 64ULL;
+
+	if (m->mem_domain == HOST_MEM_DOMAIN_DRAM) {
+		uint32_t factor = g_sched_telem.sim_cfg.dram_factor_x100 ?
+				  g_sched_telem.sim_cfg.dram_factor_x100 : 160U;
+		uint32_t c_per_word = g_sched_telem.sim_cfg.dram_cycles_per_word;
+		uint64_t xfer_words = (uint64_t)(bytes_in + bytes_out) / 4ULL;
+
+		cycles = (base * (uint64_t)factor) / 100ULL + xfer_words * (uint64_t)c_per_word;
+	} else {
+		uint32_t factor = g_sched_telem.sim_cfg.sram_factor_x100 ?
+				  g_sched_telem.sim_cfg.sram_factor_x100 : 100U;
+
+		cycles = (base * (uint64_t)factor) / 100ULL;
+	}
+
+	return cycles ? cycles : 1ULL;
+}
+
+uint64_t host_telem_pipe_begin(struct pipeline *p)
+{
+	struct host_pipe_telem *pt;
+	uint32_t core;
+
+	if (!g_sched_telem.enabled || !p)
+		return 0;
+
+	pt = find_or_alloc_pipe(p->pipeline_id);
+	if (pt) {
+		uint64_t overhead;
+
+		TELEM_LOCK();
+		/* Base LL pipeline dispatch overhead (120 cycles in SRAM, scaled in DRAM) */
+		uint32_t factor = (g_sched_telem.sim_cfg.default_mem_domain ==
+				   HOST_MEM_DOMAIN_DRAM) ?
+				  g_sched_telem.sim_cfg.dram_factor_x100 :
+				  g_sched_telem.sim_cfg.sram_factor_x100;
+		if (!factor)
+			factor = 100U;
+		overhead = (120ULL * factor) / 100ULL;
+		pt->_sim_tick_cycles = overhead;
+		core = (p->core < TB_TELEM_MAX_CORES) ? p->core : 0;
+		g_sched_telem.cores[core]._sim_ll_tick_cycles += overhead;
+		g_sched_telem.cores[core]._tick_ll_offset_cycles += overhead;
+		TELEM_UNLOCK();
+	}
+
+	return host_telem_timestamp_cycles();
+}
+
+void host_telem_pipe_end(struct pipeline *p, uint64_t start_cycles, int ret)
+{
+	struct host_pipe_telem *pt;
+	uint64_t end_cycles, delta, exec_ns;
+	uint32_t period_us, freq_hz, i, ll_cnt = 0, dp_cnt = 0;
+
+	if (!g_sched_telem.enabled || !p)
+		return;
+
+	end_cycles = host_telem_timestamp_cycles();
+	delta = (end_cycles > start_cycles) ? (end_cycles - start_cycles) : 1;
+
+	pt = find_or_alloc_pipe(p->pipeline_id);
+	if (!pt)
+		return;
+
+	TELEM_LOCK();
+	if (g_sched_telem.sim_cfg.mode != HOST_WORKLOAD_SIM_OFF && pt->_sim_tick_cycles > 0) {
+		delta = pt->_sim_tick_cycles;
+		pt->_sim_tick_cycles = 0;
+	}
+
+	pt->comp_id = p->comp_id;
+	pt->core_id = p->core;
+	pt->priority = p->priority;
+	pt->period_us = p->period ? p->period : 1000;
+	pt->status = p->status;
+	pt->mem_domain = g_sched_telem.sim_cfg.default_mem_domain;
+	if (p->sched_comp)
+		pt->direction = p->sched_comp->direction;
+
+	freq_hz = get_core_freq_hz(pt->core_id);
+	exec_ns = cycles_to_ns(delta, freq_hz);
+
+	pt->copy_iterations++;
+	pt->last_cycles = delta;
+	pt->total_cycles += delta;
+	pt->avg_cycles = pt->total_cycles / pt->copy_iterations;
+	if (delta > pt->peak_cycles)
+		pt->peak_cycles = delta;
+
+	pt->last_exec_ns = exec_ns;
+	pt->total_exec_ns += exec_ns;
+	pt->avg_exec_ns = pt->total_exec_ns / pt->copy_iterations;
+	if (exec_ns > pt->peak_exec_ns)
+		pt->peak_exec_ns = exec_ns;
+
+	period_us = pt->period_us ? pt->period_us : 1000;
+	pt->avg_kcps = (uint32_t)((pt->avg_cycles * 1000ULL) / period_us);
+	pt->peak_kcps = (uint32_t)((pt->peak_cycles * 1000ULL) / period_us);
+
+	if (ret < 0 || p->xrun_bytes != 0)
+		pt->xrun_count++;
+
+	for (i = 0; i < g_sched_telem.num_mods; i++) {
+		if (g_sched_telem.mods[i].active &&
+		    g_sched_telem.mods[i].pipeline_id == p->pipeline_id) {
+			if (g_sched_telem.mods[i].proc_domain == COMP_PROCESSING_DOMAIN_DP)
+				dp_cnt++;
+			else
+				ll_cnt++;
+		}
+	}
+	pt->num_ll_modules = ll_cnt;
+	pt->num_dp_modules = dp_cnt;
+	TELEM_UNLOCK();
+}
+
+uint64_t host_telem_mod_entry(struct comp_dev *dev, bool is_dp_thread)
+{
+	struct host_mod_telem *m;
+	struct comp_buffer *buffer;
+	uint32_t idx;
+
+	if (!g_sched_telem.enabled || !dev)
+		return 0;
+
+	m = find_or_alloc_mod(dev->ipc_config.id);
+	if (!m)
+		return host_telem_timestamp_cycles();
+
+	m->pipeline_id = dev->ipc_config.pipeline_id;
+	m->core_id = dev->ipc_config.core;
+	m->proc_domain = dev->ipc_config.proc_domain;
+	m->type = dev->ipc_config.type;
+	m->period_us = dev->period ? dev->period :
+		       (dev->pipeline && dev->pipeline->period ? dev->pipeline->period : 1000);
+	m->ibs = (uint32_t)dev->ibs;
+	m->obs = (uint32_t)dev->obs;
+	m->cpc = (uint32_t)dev->cpc;
+
+#if CONFIG_IPC_MAJOR_4
+	if (dev->mod) {
+		if (!m->ibs)
+			m->ibs = dev->mod->priv.cfg.base_cfg.ibs;
+		if (!m->obs)
+			m->obs = dev->mod->priv.cfg.base_cfg.obs;
+		if (!m->cpc)
+			m->cpc = dev->mod->priv.cfg.base_cfg.cpc;
+	}
+#endif
+
+	if (!is_dp_thread) {
+		m->_ll_entry_wall_ns = host_telem_wall_ns();
+		/* LL tick path (comp_copy) */
+		idx = 0;
+		comp_dev_for_each_producer(dev, buffer) {
+			struct host_mod_pin_telem *pin;
+			struct comp_dev *prod;
+			uintptr_t base, rptr;
+			uint32_t avail_b, free_b;
+
+			if (idx >= TB_TELEM_MAX_PINS)
+				break;
+			pin = &m->in_pins[idx++];
+			pin->active = true;
+			pin->buf_id = buf_get_id(buffer);
+			prod = comp_buffer_get_source_component(buffer);
+			pin->peer_comp_id = prod ? prod->ipc_config.id : 0xFFFFFFFFU;
+			pin->buf_size = (uint32_t)audio_stream_get_size(&buffer->stream);
+			pin->rate = audio_stream_get_rate(&buffer->stream);
+			pin->channels = audio_stream_get_channels(&buffer->stream);
+			pin->frame_fmt = audio_stream_get_frm_fmt(&buffer->stream);
+
+			avail_b = (uint32_t)audio_stream_get_avail_bytes(&buffer->stream);
+			free_b = (uint32_t)audio_stream_get_free_bytes(&buffer->stream);
+			pin->_entry_avail = avail_b;
+
+			base = (uintptr_t)audio_stream_get_addr(&buffer->stream);
+			rptr = (uintptr_t)audio_stream_get_rptr(&buffer->stream);
+			pin->_entry_ptr = rptr;
+
+			if (avail_b > 0 || pin->total_bytes_transferred == 0) {
+				pin->entry_avail_bytes = avail_b;
+				pin->entry_free_bytes = free_b;
+				if (dev->ipc_config.proc_domain == COMP_PROCESSING_DOMAIN_LL &&
+				    pin->buf_size > 0 && rptr >= base) {
+					capture_circular_samples((const void *)base, pin->buf_size,
+								 (size_t)(rptr - base),
+								 avail_b,
+								 pin->frame_fmt,
+								 pin->entry_samples,
+								 &pin->entry_num_samples,
+								 &pin->entry_rms_dbfs_x100,
+								 &pin->entry_peak_dbfs_x100);
+				}
+			}
+
+#if CONFIG_PIPELINE_2_0
+			if (buffer->audio_buffer.secondary_buffer_source) {
+				struct sof_audio_buffer *sec =
+					buffer->audio_buffer.secondary_buffer_source;
+				uint32_t avail = (uint32_t)source_get_data_available(
+					audio_buffer_get_source(sec));
+				uint32_t free_b = (uint32_t)sink_get_free_size(
+					audio_buffer_get_sink(sec));
+				pin->dp_ring_entry_avail = avail;
+				pin->dp_ring_entry_free = free_b;
+				pin->dp_ring_size = avail + free_b;
+			}
+#endif
+		}
+		if (idx > m->num_in_pins)
+			m->num_in_pins = idx;
+
+		idx = 0;
+		comp_dev_for_each_consumer(dev, buffer) {
+			struct host_mod_pin_telem *pin;
+			struct comp_dev *cons;
+			uintptr_t base, rptr, wptr;
+			uint32_t avail_b, free_b;
+
+			if (idx >= TB_TELEM_MAX_PINS)
+				break;
+			pin = &m->out_pins[idx++];
+			pin->active = true;
+			pin->buf_id = buf_get_id(buffer);
+			cons = comp_buffer_get_sink_component(buffer);
+			pin->peer_comp_id = cons ? cons->ipc_config.id : 0xFFFFFFFFU;
+			pin->buf_size = (uint32_t)audio_stream_get_size(&buffer->stream);
+			pin->rate = audio_stream_get_rate(&buffer->stream);
+			pin->channels = audio_stream_get_channels(&buffer->stream);
+			pin->frame_fmt = audio_stream_get_frm_fmt(&buffer->stream);
+
+			avail_b = (uint32_t)audio_stream_get_avail_bytes(&buffer->stream);
+			free_b = (uint32_t)audio_stream_get_free_bytes(&buffer->stream);
+			pin->_entry_avail = avail_b;
+
+			base = (uintptr_t)audio_stream_get_addr(&buffer->stream);
+			rptr = (uintptr_t)audio_stream_get_rptr(&buffer->stream);
+			wptr = (uintptr_t)audio_stream_get_wptr(&buffer->stream);
+			pin->_entry_ptr = wptr;
+
+			if (avail_b > 0 || pin->total_bytes_transferred == 0) {
+				pin->entry_avail_bytes = avail_b;
+				pin->entry_free_bytes = free_b;
+				if (dev->ipc_config.proc_domain == COMP_PROCESSING_DOMAIN_LL &&
+				    pin->buf_size > 0 && rptr >= base) {
+					capture_circular_samples((const void *)base, pin->buf_size,
+								 (size_t)(rptr - base),
+								 avail_b,
+								 pin->frame_fmt,
+								 pin->entry_samples,
+								 &pin->entry_num_samples,
+								 &pin->entry_rms_dbfs_x100,
+								 &pin->entry_peak_dbfs_x100);
+				}
+			}
+
+#if CONFIG_PIPELINE_2_0
+			if (buffer->audio_buffer.secondary_buffer_sink) {
+				struct sof_audio_buffer *sec =
+					buffer->audio_buffer.secondary_buffer_sink;
+				uint32_t avail = (uint32_t)source_get_data_available(
+					audio_buffer_get_source(sec));
+				uint32_t free_b = (uint32_t)sink_get_free_size(
+					audio_buffer_get_sink(sec));
+				pin->dp_ring_entry_avail = avail;
+				pin->dp_ring_entry_free = free_b;
+				pin->dp_ring_size = avail + free_b;
+			}
+#endif
+		}
+		if (idx > m->num_out_pins)
+			m->num_out_pins = idx;
+	} else if (dev->mod) {
+		/* DP worker thread path (dp_task_run) */
+		struct processing_module *mod = dev->mod;
+
+		m->_dp_entry_wall_ns = host_telem_wall_ns();
+
+		for (idx = 0; idx < mod->num_of_sources && idx < TB_TELEM_MAX_PINS; idx++) {
+			struct sof_source *src = mod->sources[idx];
+			struct sof_audio_buffer *ab;
+			struct ring_buffer *rb;
+			struct host_mod_pin_telem *pin = &m->in_pins[idx];
+			size_t roff;
+
+			if (!src)
+				continue;
+			ab = sof_audio_buffer_from_source(src);
+			rb = container_of(ab, struct ring_buffer, audio_buffer);
+			pin->active = true;
+			pin->rate = source_get_rate(src);
+			pin->channels = source_get_channels(src);
+			pin->frame_fmt = source_get_frm_fmt(src);
+			pin->dp_ring_size = (uint32_t)rb->data_buffer_size;
+			pin->dp_ring_entry_avail = (uint32_t)source_get_data_available(src);
+			pin->dp_ring_entry_free =
+				(pin->dp_ring_size >= pin->dp_ring_entry_avail) ?
+				(pin->dp_ring_size - pin->dp_ring_entry_avail) : 0;
+
+			roff = (rb->data_buffer_size > 0) ?
+			       (rb->_read_offset % rb->data_buffer_size) : 0;
+			capture_circular_samples((__sparse_force const void *)rb->_data_buffer,
+						 rb->data_buffer_size, roff,
+						 pin->dp_ring_entry_avail,
+						 pin->frame_fmt,
+						 pin->entry_samples,
+						 &pin->entry_num_samples,
+						 &pin->entry_rms_dbfs_x100,
+						 &pin->entry_peak_dbfs_x100);
+		}
+		if (idx > m->num_in_pins)
+			m->num_in_pins = idx;
+
+		for (idx = 0; idx < mod->num_of_sinks && idx < TB_TELEM_MAX_PINS; idx++) {
+			struct sof_sink *snk = mod->sinks[idx];
+			struct sof_audio_buffer *ab;
+			struct ring_buffer *rb;
+			struct host_mod_pin_telem *pin = &m->out_pins[idx];
+			size_t roff, woff;
+
+			if (!snk)
+				continue;
+			ab = sof_audio_buffer_from_sink(snk);
+			rb = container_of(ab, struct ring_buffer, audio_buffer);
+			pin->active = true;
+			pin->rate = sink_get_rate(snk);
+			pin->channels = sink_get_channels(snk);
+			pin->frame_fmt = sink_get_frm_fmt(snk);
+			pin->dp_ring_size = (uint32_t)rb->data_buffer_size;
+			pin->dp_ring_entry_free = (uint32_t)sink_get_free_size(snk);
+			pin->dp_ring_entry_avail =
+				(pin->dp_ring_size >= pin->dp_ring_entry_free) ?
+				(pin->dp_ring_size - pin->dp_ring_entry_free) : 0;
+
+			woff = (rb->data_buffer_size > 0) ?
+			       (rb->_write_offset % rb->data_buffer_size) : 0;
+			roff = (rb->data_buffer_size > 0) ?
+			       (rb->_read_offset % rb->data_buffer_size) : 0;
+			pin->_dp_entry_woff = (uint32_t)woff;
+
+			capture_circular_samples((__sparse_force const void *)rb->_data_buffer,
+						 rb->data_buffer_size, roff,
+						 pin->dp_ring_entry_avail,
+						 pin->frame_fmt,
+						 pin->entry_samples,
+						 &pin->entry_num_samples,
+						 &pin->entry_rms_dbfs_x100,
+						 &pin->entry_peak_dbfs_x100);
+		}
+		if (idx > m->num_out_pins)
+			m->num_out_pins = idx;
+	}
+
+	return host_telem_timestamp_cycles();
+}
+
+void host_telem_mod_exit(struct comp_dev *dev, bool is_dp_thread, uint64_t start_cycles, int ret)
+{
+	struct host_mod_telem *m;
+	struct host_pipe_telem *pt;
+	struct comp_buffer *buffer;
+	uint64_t end_cycles, delta, exec_ns;
+	uint32_t idx, period_us, freq_hz, core_id;
+	uint32_t total_in_bytes = 0, total_out_bytes = 0;
+
+	if (!g_sched_telem.enabled || !dev)
+		return;
+
+	end_cycles = host_telem_timestamp_cycles();
+	delta = (end_cycles > start_cycles) ? (end_cycles - start_cycles) : 1;
+
+	m = find_or_alloc_mod(dev->ipc_config.id);
+	if (!m)
+		return;
+
+	resolve_mod_sim_params(m);
+	core_id = (m->core_id < TB_TELEM_MAX_CORES) ? m->core_id : 0;
+
+	if (ret < 0)
+		m->error_count++;
+
+	if (!is_dp_thread && dev->ipc_config.proc_domain == COMP_PROCESSING_DOMAIN_DP) {
+		uint32_t sync_iter;
+
+		/* DP module during LL tick: only synced secondary ring buffers */
+		pt = find_or_alloc_pipe(m->pipeline_id);
+		TELEM_LOCK();
+		if (g_sched_telem.sim_cfg.mode != HOST_WORKLOAD_SIM_OFF) {
+			uint32_t factor = (m->mem_domain == HOST_MEM_DOMAIN_DRAM) ?
+					  g_sched_telem.sim_cfg.dram_factor_x100 :
+					  g_sched_telem.sim_cfg.sram_factor_x100;
+			if (!factor)
+				factor = 100U;
+			delta = (160ULL * factor) / 100ULL;
+			if (pt)
+				pt->_sim_tick_cycles += delta;
+			g_sched_telem.cores[core_id]._sim_ll_tick_cycles += delta;
+		}
+		m->ll_ring_sync_iterations++;
+		sync_iter = (uint32_t)m->ll_ring_sync_iterations;
+		m->ll_ring_sync_last_cycles = delta;
+		m->ll_ring_sync_total_cycles += delta;
+		TELEM_UNLOCK();
+
+		idx = 0;
+		comp_dev_for_each_producer(dev, buffer) {
+			if (idx >= TB_TELEM_MAX_PINS)
+				break;
+			m->in_pins[idx].exit_avail_bytes =
+				(uint32_t)audio_stream_get_avail_bytes(&buffer->stream);
+			m->in_pins[idx].exit_free_bytes =
+				(uint32_t)audio_stream_get_free_bytes(&buffer->stream);
+			idx++;
+		}
+
+		idx = 0;
+		comp_dev_for_each_consumer(dev, buffer) {
+			if (idx >= TB_TELEM_MAX_PINS)
+				break;
+			m->out_pins[idx].exit_avail_bytes =
+				(uint32_t)audio_stream_get_avail_bytes(&buffer->stream);
+			m->out_pins[idx].exit_free_bytes =
+				(uint32_t)audio_stream_get_free_bytes(&buffer->stream);
+			idx++;
+		}
+
+		freq_hz = get_core_freq_hz(core_id);
+		record_mod_sched_event(m, core_id, freq_hz, HOST_SCHED_EVT_DP_SYNC,
+				       sync_iter, delta, 0,
+				       0, 0, m->_ll_entry_wall_ns,
+				       host_telem_wall_ns(), ret);
+		return;
+	}
+
+	if (!is_dp_thread) {
+		/* LL module exit: inspect comp_buffer pointers and capture output samples */
+		idx = 0;
+		comp_dev_for_each_producer(dev, buffer) {
+			struct host_mod_pin_telem *pin;
+			uintptr_t base, exit_r;
+			uint32_t sz, exit_avail, exit_free, consumed = 0;
+
+			if (idx >= TB_TELEM_MAX_PINS)
+				break;
+			pin = &m->in_pins[idx++];
+			exit_avail = (uint32_t)audio_stream_get_avail_bytes(&buffer->stream);
+			exit_free = (uint32_t)audio_stream_get_free_bytes(&buffer->stream);
+
+			base = (uintptr_t)audio_stream_get_addr(&buffer->stream);
+			exit_r = (uintptr_t)audio_stream_get_rptr(&buffer->stream);
+			sz = pin->buf_size;
+
+			if (sz > 0 && pin->_entry_ptr >= base && exit_r >= base) {
+				consumed = (uint32_t)((exit_r + sz - pin->_entry_ptr) % sz);
+				if (consumed == 0 && pin->_entry_avail > exit_avail)
+					consumed = pin->_entry_avail - exit_avail;
+			}
+			total_in_bytes += consumed;
+
+			if (consumed > 0 || pin->total_bytes_transferred == 0) {
+				pin->exit_avail_bytes = exit_avail;
+				pin->exit_free_bytes = exit_free;
+				pin->last_bytes_transferred = consumed;
+				pin->total_bytes_transferred += consumed;
+
+				if (sz > 0 && exit_r >= base) {
+					size_t tap_off = (exit_avail > 0) ?
+							 (size_t)(exit_r - base) :
+							 (size_t)(pin->_entry_ptr - base);
+					size_t tap_bytes = (exit_avail > 0) ?
+							   exit_avail : consumed;
+					capture_circular_samples((const void *)base, sz,
+								 tap_off, tap_bytes,
+								 pin->frame_fmt,
+								 pin->exit_samples,
+								 &pin->exit_num_samples,
+								 &pin->exit_rms_dbfs_x100,
+								 &pin->exit_peak_dbfs_x100);
+				}
+			}
+		}
+
+		idx = 0;
+		comp_dev_for_each_consumer(dev, buffer) {
+			struct host_mod_pin_telem *pin;
+			uintptr_t base, exit_w, rptr;
+			uint32_t sz, exit_avail, exit_free, produced = 0;
+
+			if (idx >= TB_TELEM_MAX_PINS)
+				break;
+			pin = &m->out_pins[idx++];
+			exit_avail = (uint32_t)audio_stream_get_avail_bytes(&buffer->stream);
+			exit_free = (uint32_t)audio_stream_get_free_bytes(&buffer->stream);
+
+			base = (uintptr_t)audio_stream_get_addr(&buffer->stream);
+			exit_w = (uintptr_t)audio_stream_get_wptr(&buffer->stream);
+			rptr = (uintptr_t)audio_stream_get_rptr(&buffer->stream);
+			sz = pin->buf_size;
+
+			if (sz > 0 && pin->_entry_ptr >= base && exit_w >= base) {
+				produced = (uint32_t)((exit_w + sz - pin->_entry_ptr) % sz);
+				if (produced == 0 && exit_avail > pin->_entry_avail)
+					produced = exit_avail - pin->_entry_avail;
+			}
+			total_out_bytes += produced;
+
+			if (produced > 0 || pin->total_bytes_transferred == 0) {
+				pin->entry_avail_bytes = pin->_entry_avail;
+				pin->entry_free_bytes = (sz >= pin->_entry_avail) ?
+							(sz - pin->_entry_avail) : 0;
+				pin->exit_avail_bytes = exit_avail;
+				pin->exit_free_bytes = exit_free;
+				pin->last_bytes_transferred = produced;
+				pin->total_bytes_transferred += produced;
+
+				if (sz > 0 && pin->_entry_ptr >= base) {
+					size_t tap_off = (produced > 0) ?
+							 (size_t)(pin->_entry_ptr - base) :
+							 (size_t)(rptr - base);
+					size_t tap_bytes = (produced > 0) ?
+							   produced : exit_avail;
+					capture_circular_samples((const void *)base, sz,
+								 tap_off, tap_bytes,
+								 pin->frame_fmt,
+								 pin->exit_samples,
+								 &pin->exit_num_samples,
+								 &pin->exit_rms_dbfs_x100,
+								 &pin->exit_peak_dbfs_x100);
+				}
+			}
+		}
+	} else if (dev->mod) {
+		/* DP worker thread exit: inspect ring_buffer processed bytes and output samples */
+		struct processing_module *mod = dev->mod;
+
+		for (idx = 0; idx < mod->num_of_sources && idx < TB_TELEM_MAX_PINS; idx++) {
+			struct sof_source *src = mod->sources[idx];
+			struct sof_audio_buffer *ab;
+			struct ring_buffer *rb;
+			struct host_mod_pin_telem *pin = &m->in_pins[idx];
+			uint32_t consumed;
+			size_t roff;
+
+			if (!src)
+				continue;
+			ab = sof_audio_buffer_from_source(src);
+			rb = container_of(ab, struct ring_buffer, audio_buffer);
+			consumed = (uint32_t)source_get_num_of_processed_bytes(src);
+			total_in_bytes += consumed;
+			pin->last_bytes_transferred = consumed;
+			pin->total_bytes_transferred += consumed;
+			pin->dp_ring_exit_avail = (uint32_t)source_get_data_available(src);
+			pin->dp_ring_exit_free =
+				(pin->dp_ring_size >= pin->dp_ring_exit_avail) ?
+				(pin->dp_ring_size - pin->dp_ring_exit_avail) : 0;
+
+			roff = (rb->data_buffer_size > 0) ?
+			       (rb->_read_offset % rb->data_buffer_size) : 0;
+			capture_circular_samples((__sparse_force const void *)rb->_data_buffer,
+						 rb->data_buffer_size, roff,
+						 pin->dp_ring_exit_avail ?
+						 pin->dp_ring_exit_avail : consumed,
+						 pin->frame_fmt,
+						 pin->exit_samples,
+						 &pin->exit_num_samples,
+						 &pin->exit_rms_dbfs_x100,
+						 &pin->exit_peak_dbfs_x100);
+		}
+
+		for (idx = 0; idx < mod->num_of_sinks && idx < TB_TELEM_MAX_PINS; idx++) {
+			struct sof_sink *snk = mod->sinks[idx];
+			struct sof_audio_buffer *ab;
+			struct ring_buffer *rb;
+			struct host_mod_pin_telem *pin = &m->out_pins[idx];
+			uint32_t produced;
+
+			if (!snk)
+				continue;
+			ab = sof_audio_buffer_from_sink(snk);
+			rb = container_of(ab, struct ring_buffer, audio_buffer);
+			produced = (uint32_t)sink_get_num_of_processed_bytes(snk);
+			total_out_bytes += produced;
+			pin->last_bytes_transferred = produced;
+			pin->total_bytes_transferred += produced;
+			pin->dp_ring_exit_free = (uint32_t)sink_get_free_size(snk);
+			pin->dp_ring_exit_avail =
+				(pin->dp_ring_size >= pin->dp_ring_exit_free) ?
+				(pin->dp_ring_size - pin->dp_ring_exit_free) : 0;
+
+			capture_circular_samples((__sparse_force const void *)rb->_data_buffer,
+						 rb->data_buffer_size,
+						 pin->_dp_entry_woff,
+						 produced ? produced : pin->dp_ring_exit_avail,
+						 pin->frame_fmt,
+						 pin->exit_samples,
+						 &pin->exit_num_samples,
+						 &pin->exit_rms_dbfs_x100,
+						 &pin->exit_peak_dbfs_x100);
+		}
+	}
+
+	/* Apply accurate workload execution simulation when enabled */
+	pt = !is_dp_thread ? find_or_alloc_pipe(m->pipeline_id) : NULL;
+	if (g_sched_telem.sim_cfg.mode != HOST_WORKLOAD_SIM_OFF)
+		delta = compute_simulated_mod_cycles(m, total_in_bytes, total_out_bytes);
+
+	freq_hz = get_core_freq_hz(core_id);
+	exec_ns = cycles_to_ns(delta, freq_hz);
+
+	if (g_sched_telem.sim_cfg.mode == HOST_WORKLOAD_SIM_REALTIME)
+		pace_execution_ns(exec_ns);
+
+	TELEM_LOCK();
+	if (g_sched_telem.sim_cfg.mode != HOST_WORKLOAD_SIM_OFF) {
+		if (!is_dp_thread) {
+			if (pt)
+				pt->_sim_tick_cycles += delta;
+			g_sched_telem.cores[core_id]._sim_ll_tick_cycles += delta;
+		} else {
+			g_sched_telem.cores[core_id]._sim_dp_run_cycles += delta;
+		}
+	}
+
+	/* Record module processing execution cycles & simulated execution time */
+	m->iterations++;
+	uint32_t mod_iter_nr = (uint32_t)m->iterations;
+
+	m->last_cycles = delta;
+	m->total_cycles += delta;
+	m->avg_cycles = m->total_cycles / m->iterations;
+	if (delta > m->peak_cycles)
+		m->peak_cycles = delta;
+
+	m->last_exec_ns = exec_ns;
+	m->total_exec_ns += exec_ns;
+	m->avg_exec_ns = m->total_exec_ns / m->iterations;
+	if (exec_ns > m->peak_exec_ns)
+		m->peak_exec_ns = exec_ns;
+
+	period_us = m->period_us ? m->period_us : 1000;
+	m->avg_kcps = (uint32_t)((m->avg_cycles * 1000ULL) / period_us);
+	m->peak_kcps = (uint32_t)((m->peak_cycles * 1000ULL) / period_us);
+
+	if (m->effective_cpc > 0 && delta > m->effective_cpc)
+		m->cpc_violations++;
+	TELEM_UNLOCK();
+
+	record_mod_sched_event(m, core_id, freq_hz,
+			       is_dp_thread ? HOST_SCHED_EVT_DP_RUN : HOST_SCHED_EVT_LL_COPY,
+			       mod_iter_nr, delta, m->effective_cpc,
+			       total_in_bytes, total_out_bytes,
+			       is_dp_thread ? m->_dp_entry_wall_ns : m->_ll_entry_wall_ns,
+			       host_telem_wall_ns(), ret);
+}
diff --git a/src/platform/library/schedule/CMakeLists.txt b/src/platform/library/schedule/CMakeLists.txt
index 31d325038217..613bfadf659d 100644
--- a/src/platform/library/schedule/CMakeLists.txt
+++ b/src/platform/library/schedule/CMakeLists.txt
@@ -1,7 +1,18 @@
 # SPDX-License-Identifier: BSD-3-Clause
 
-add_local_sources(sof
-	schedule.c
-	ll_schedule.c
-	edf_schedule.c
-)
+if(TESTBENCH_XTENSA_SIM OR CMAKE_C_COMPILER MATCHES "xt-|xtensa-" OR DEFINED ENV{XTENSA_CORE})
+	target_compile_definitions(sof PRIVATE CONFIG_XT_SIMULATOR=1)
+	add_local_sources(sof
+		schedule.c
+		ll_schedule.c
+		dp_schedule.c
+		edf_schedule.c
+	)
+else()
+	add_local_sources(sof
+		schedule.c
+		ll_schedule_pthread.c
+		dp_schedule_pthread.c
+		edf_schedule.c
+	)
+endif()
diff --git a/src/platform/library/schedule/dp_schedule.c b/src/platform/library/schedule/dp_schedule.c
new file mode 100644
index 000000000000..28d984411c46
--- /dev/null
+++ b/src/platform/library/schedule/dp_schedule.c
@@ -0,0 +1,238 @@
+// SPDX-License-Identifier: BSD-3-Clause
+//
+// Copyright(c) 2026 Intel Corporation. All rights reserved.
+
+#include <sof/audio/component.h>
+#include <sof/audio/module_adapter/module/generic.h>
+#include <rtos/task.h>
+#include <sof/schedule/schedule.h>
+#include <sof/schedule/dp_schedule.h>
+#include <sof/schedule/ll_schedule_domain.h>
+#include <platform/lib/telemetry_sched.h>
+#include <sof/lib/cpu.h>
+#include <sof/lib/memory.h>
+#include <sof/list.h>
+#include <sof/trace/trace.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+/* Synchronous standard-C DP scheduler for Xtensa simulator (xt-run) */
+
+SOF_DEFINE_REG_UUID(dp_sched);
+
+DECLARE_TR_CTX(dp_tr, SOF_UUID(dp_sched_uuid), LOG_LEVEL_INFO);
+
+struct scheduler_dp_data {
+	struct list_item tasks;		/* list of active DP tasks */
+};
+
+struct task_dp_pdata {
+	struct processing_module *mod;
+	uint32_t ll_cycles_to_start;
+};
+
+void scheduler_dp_ll_tick(void)
+{
+	struct scheduler_dp_data *dp_sch = scheduler_get_data(SOF_SCHEDULE_DP);
+	struct list_item *tlist, *tlist_;
+	struct task *curr_task;
+	struct task_dp_pdata *pdata;
+	enum task_state state;
+
+	if (!dp_sch)
+		return;
+
+	list_for_item_safe(tlist, tlist_, &dp_sch->tasks) {
+		curr_task = container_of(tlist, struct task, list);
+		pdata = curr_task->priv_data;
+		struct processing_module *mod = pdata->mod;
+
+		/* decrease number of LL ticks/cycles left till the module reaches its deadline */
+		if (mod->dp_startup_delay && pdata->ll_cycles_to_start) {
+			pdata->ll_cycles_to_start--;
+			if (!pdata->ll_cycles_to_start)
+				mod->dp_startup_delay = false;
+		}
+
+		if (curr_task->state == SOF_TASK_STATE_QUEUED &&
+		    mod->dev->state == COMP_STATE_ACTIVE) {
+			bool mod_ready;
+
+			mod_ready = module_is_ready_to_process(mod, mod->sources,
+							       mod->num_of_sources,
+							       mod->sinks,
+							       mod->num_of_sinks);
+			if (mod_ready) {
+				curr_task->state = SOF_TASK_STATE_RUNNING;
+				if (mod->dp_startup_delay && !pdata->ll_cycles_to_start) {
+					pdata->ll_cycles_to_start =
+						module_get_lpt(pdata->mod) / LL_TIMER_PERIOD_US;
+					if (!pdata->ll_cycles_to_start)
+						pdata->ll_cycles_to_start = 1;
+				}
+
+				host_cpu_set_id(curr_task->core);
+				{
+					uint64_t t0 = host_telem_timestamp_cycles();
+					uint64_t t1;
+
+					state = task_run(curr_task);
+					t1 = host_telem_timestamp_cycles();
+					host_telem_core_dp_run(curr_task->core, 1,
+							       (t1 > t0) ? (t1 - t0) : 1);
+				}
+				host_cpu_set_id(0);
+
+				if (curr_task->state == SOF_TASK_STATE_RUNNING) {
+					curr_task->state = state;
+					switch (state) {
+					case SOF_TASK_STATE_RESCHEDULE:
+						curr_task->state = SOF_TASK_STATE_QUEUED;
+						break;
+					case SOF_TASK_STATE_COMPLETED:
+						list_item_del(&curr_task->list);
+						task_complete(curr_task);
+						break;
+					case SOF_TASK_STATE_CANCEL:
+						list_item_del(&curr_task->list);
+						break;
+					default:
+						list_item_del(&curr_task->list);
+						curr_task->state = SOF_TASK_STATE_CANCEL;
+						break;
+					}
+				}
+			}
+		}
+	}
+}
+
+static int scheduler_dp_task_stop(void *data, struct task *task)
+{
+	(void)data;
+
+	if (task->state == SOF_TASK_STATE_QUEUED ||
+	    task->state == SOF_TASK_STATE_RUNNING)
+		list_item_del(&task->list);
+
+	task->state = SOF_TASK_STATE_CANCEL;
+
+	return 0;
+}
+
+static int scheduler_dp_task_free(void *data, struct task *task)
+{
+	scheduler_dp_task_stop(data, task);
+	task->state = SOF_TASK_STATE_FREE;
+	rfree(task);
+
+	return 0;
+}
+
+static int scheduler_dp_task_shedule(void *data, struct task *task, uint64_t start,
+				     uint64_t period)
+{
+	struct scheduler_dp_data *dp_sch = data;
+	struct task_dp_pdata *pdata = task->priv_data;
+
+	(void)start;
+	(void)period;
+
+	if (task_is_active(task))
+		return 0;
+
+	if (task->state != SOF_TASK_STATE_INIT &&
+	    task->state != SOF_TASK_STATE_CANCEL &&
+	    task->state != SOF_TASK_STATE_COMPLETED)
+		return -EINVAL;
+
+	task->state = SOF_TASK_STATE_QUEUED;
+	list_item_prepend(&task->list, &dp_sch->tasks);
+	pdata->mod->dp_startup_delay = true;
+	pdata->ll_cycles_to_start = 0;
+
+	return 0;
+}
+
+static void dp_scheduler_free(void *data, uint32_t flags)
+{
+	struct scheduler_dp_data *dp_sch = data;
+
+	(void)flags;
+	free(dp_sch);
+}
+
+static struct scheduler_ops schedule_dp_ops = {
+	.schedule_task		= scheduler_dp_task_shedule,
+	.schedule_task_cancel	= scheduler_dp_task_stop,
+	.schedule_task_free	= scheduler_dp_task_free,
+	.scheduler_free		= dp_scheduler_free,
+};
+
+int scheduler_dp_init(void)
+{
+	struct scheduler_dp_data *dp_sch;
+
+	dp_sch = calloc(1, sizeof(*dp_sch));
+	if (!dp_sch)
+		return -ENOMEM;
+
+	list_init(&dp_sch->tasks);
+	scheduler_init(SOF_SCHEDULE_DP, &schedule_dp_ops, dp_sch);
+
+	return 0;
+}
+
+int scheduler_dp_task_init(struct task **task,
+			   const struct sof_uuid_entry *uid,
+			   const struct task_ops *ops,
+			   struct processing_module *mod,
+			   uint16_t core,
+			   size_t stack_size,
+			   uint32_t options)
+{
+	struct {
+		struct task task;
+		struct task_dp_pdata pdata;
+	} *task_memory;
+	struct task_dp_pdata *pdata;
+	int ret;
+
+	(void)stack_size;
+
+	task_memory = rzalloc(SOF_MEM_FLAG_USER, sizeof(*task_memory));
+	if (!task_memory) {
+		tr_err(&dp_tr, "scheduler_dp_task_init: memory alloc failed");
+		return -ENOMEM;
+	}
+
+	ret = schedule_task_init(&task_memory->task, uid, SOF_SCHEDULE_DP, 0, ops->run,
+				 mod, core, options);
+	if (ret < 0) {
+		tr_err(&dp_tr, "scheduler_dp_task_init: schedule_task_init failed");
+		rfree(task_memory);
+		return ret;
+	}
+
+	pdata = &task_memory->pdata;
+	pdata->mod = mod;
+
+	task_memory->task.ops.complete = ops->complete;
+	task_memory->task.ops.get_deadline = ops->get_deadline;
+	task_memory->task.state = SOF_TASK_STATE_INIT;
+	task_memory->task.core = core;
+	task_memory->task.priv_data = pdata;
+
+	*task = &task_memory->task;
+	return 0;
+}
+
+void scheduler_get_task_info_dp(struct scheduler_props *scheduler_props,
+				uint32_t *data_off_size)
+{
+	(void)scheduler_props;
+	(void)data_off_size;
+}
diff --git a/src/platform/library/schedule/dp_schedule_pthread.c b/src/platform/library/schedule/dp_schedule_pthread.c
new file mode 100644
index 000000000000..4ad97eb337fa
--- /dev/null
+++ b/src/platform/library/schedule/dp_schedule_pthread.c
@@ -0,0 +1,378 @@
+// SPDX-License-Identifier: BSD-3-Clause
+//
+// Copyright(c) 2026 Intel Corporation. All rights reserved.
+
+#define _GNU_SOURCE
+
+#include <sof/audio/component.h>
+#include <sof/audio/module_adapter/module/generic.h>
+#include <rtos/task.h>
+#include <sof/schedule/schedule.h>
+#include <sof/schedule/dp_schedule.h>
+#include <sof/schedule/ll_schedule_domain.h>
+#include <platform/lib/ll_schedule.h>
+#include <platform/lib/telemetry_sched.h>
+#include <sof/lib/cpu.h>
+#include <sof/lib/memory.h>
+#include <sof/list.h>
+#include <sof/trace/trace.h>
+#include <pthread.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "host_schedule.h"
+
+SOF_DEFINE_REG_UUID(dp_sched);
+
+DECLARE_TR_CTX(dp_tr, SOF_UUID(dp_sched_uuid), LOG_LEVEL_INFO);
+
+struct scheduler_dp_data {
+	struct list_item tasks;		/* list of active DP tasks */
+	pthread_mutex_t lock;		/* mutex protecting tasks list and events */
+	pthread_cond_t tick_done_cond;	/* signalled when running DP tasks finish a tick */
+	uint32_t running_count;		/* number of DP tasks currently running in this tick */
+};
+
+struct task_dp_pdata {
+	pthread_t thread_id;
+	bool thread_created;
+	pthread_cond_t cond;
+	uint32_t event;
+	struct processing_module *mod;
+	uint32_t ll_cycles_to_start;
+};
+
+/*
+ * Go through all DP tasks and evaluate their readiness.
+ * Must be called with dp_sch->lock held.
+ */
+static void scheduler_dp_recalculate_thread(struct scheduler_dp_data *dp_sch)
+{
+	struct list_item *tlist;
+	struct task *curr_task;
+	struct task_dp_pdata *pdata;
+
+	list_for_item(tlist, &dp_sch->tasks) {
+		curr_task = container_of(tlist, struct task, list);
+		pdata = curr_task->priv_data;
+		struct processing_module *mod = pdata->mod;
+
+		/* decrease number of LL ticks/cycles left till the module reaches its deadline */
+		if (mod->dp_startup_delay && pdata->ll_cycles_to_start) {
+			pdata->ll_cycles_to_start--;
+			if (!pdata->ll_cycles_to_start)
+				mod->dp_startup_delay = false;
+		}
+
+		if (curr_task->state == SOF_TASK_STATE_QUEUED &&
+		    mod->dev->state == COMP_STATE_ACTIVE) {
+			bool mod_ready;
+
+			mod_ready = module_is_ready_to_process(mod, mod->sources,
+							       mod->num_of_sources,
+							       mod->sinks,
+							       mod->num_of_sinks);
+			if (mod_ready) {
+				curr_task->state = SOF_TASK_STATE_RUNNING;
+				if (mod->dp_startup_delay && !pdata->ll_cycles_to_start) {
+					pdata->ll_cycles_to_start =
+						module_get_lpt(pdata->mod) / LL_TIMER_PERIOD_US;
+					if (!pdata->ll_cycles_to_start)
+						pdata->ll_cycles_to_start = 1;
+				}
+				pdata->event |= DP_TASK_EVENT_PROCESS;
+				dp_sch->running_count++;
+				pthread_cond_signal(&pdata->cond);
+			}
+		}
+	}
+}
+
+void scheduler_dp_ll_tick(void)
+{
+	struct scheduler_dp_data *dp_sch = scheduler_get_data(SOF_SCHEDULE_DP);
+
+	if (!dp_sch)
+		return;
+
+	pthread_mutex_lock(&dp_sch->lock);
+	scheduler_dp_recalculate_thread(dp_sch);
+	while (dp_sch->running_count > 0)
+		pthread_cond_wait(&dp_sch->tick_done_cond, &dp_sch->lock);
+	pthread_mutex_unlock(&dp_sch->lock);
+}
+
+static void *dp_thread_fn(void *arg)
+{
+	struct task *task = arg;
+	struct task_dp_pdata *pdata = task->priv_data;
+	struct scheduler_dp_data *dp_sch = scheduler_get_data(SOF_SCHEDULE_DP);
+	enum task_state state;
+	bool task_stop = false;
+	uint32_t event;
+
+	host_cpu_set_id(task->core);
+
+	pthread_mutex_lock(&dp_sch->lock);
+
+	do {
+		while (pdata->event == 0)
+			pthread_cond_wait(&pdata->cond, &dp_sch->lock);
+
+		event = pdata->event;
+		pdata->event = 0;
+
+		if (event & DP_TASK_EVENT_PROCESS) {
+			state = task->state;
+			if (task->state == SOF_TASK_STATE_RUNNING) {
+				uint64_t t0, t1;
+				uint32_t core_dp_cnt = 0;
+				struct list_item *it;
+
+				list_for_item(it, &dp_sch->tasks) {
+					struct task *t = container_of(it, struct task, list);
+
+					if (t->core == task->core)
+						core_dp_cnt++;
+				}
+				pthread_mutex_unlock(&dp_sch->lock);
+				t0 = host_telem_timestamp_cycles();
+				state = task_run(task);
+				t1 = host_telem_timestamp_cycles();
+				host_telem_core_dp_run(task->core, core_dp_cnt,
+						       (t1 > t0) ? (t1 - t0) : 1);
+				pthread_mutex_lock(&dp_sch->lock);
+			}
+
+			if (task->state == SOF_TASK_STATE_RUNNING) {
+				task->state = state;
+				switch (state) {
+				case SOF_TASK_STATE_RESCHEDULE:
+					task->state = SOF_TASK_STATE_QUEUED;
+					break;
+				case SOF_TASK_STATE_CANCEL:
+				case SOF_TASK_STATE_COMPLETED:
+					list_item_del(&task->list);
+					break;
+				default:
+					list_item_del(&task->list);
+					task->state = SOF_TASK_STATE_CANCEL;
+					break;
+				}
+			}
+
+			task_stop = task->state == SOF_TASK_STATE_COMPLETED ||
+				    task->state == SOF_TASK_STATE_CANCEL;
+
+			if (dp_sch->running_count > 0) {
+				dp_sch->running_count--;
+				if (dp_sch->running_count == 0)
+					pthread_cond_broadcast(&dp_sch->tick_done_cond);
+			}
+		}
+
+		if (event & DP_TASK_EVENT_CANCEL)
+			task_stop = true;
+	} while (!task_stop);
+
+	pthread_mutex_unlock(&dp_sch->lock);
+
+	if (task->state == SOF_TASK_STATE_COMPLETED)
+		task_complete(task);
+
+	return NULL;
+}
+
+static int scheduler_dp_task_stop(void *data, struct task *task)
+{
+	struct scheduler_dp_data *dp_sch = data;
+	struct task_dp_pdata *pdata = task->priv_data;
+	pthread_t tid = 0;
+	bool join_thread = false;
+
+	pthread_mutex_lock(&dp_sch->lock);
+
+	while (dp_sch->running_count > 0)
+		pthread_cond_wait(&dp_sch->tick_done_cond, &dp_sch->lock);
+
+	if (task->state == SOF_TASK_STATE_QUEUED ||
+	    task->state == SOF_TASK_STATE_RUNNING)
+		list_item_del(&task->list);
+
+	task->state = SOF_TASK_STATE_CANCEL;
+	pdata->event |= DP_TASK_EVENT_CANCEL;
+	pthread_cond_signal(&pdata->cond);
+
+	if (pdata->thread_created) {
+		tid = pdata->thread_id;
+		pdata->thread_created = false;
+		join_thread = true;
+	}
+
+	pthread_mutex_unlock(&dp_sch->lock);
+
+	if (join_thread)
+		pthread_join(tid, NULL);
+
+	return 0;
+}
+
+static int scheduler_dp_task_free(void *data, struct task *task)
+{
+	struct task_dp_pdata *pdata = task->priv_data;
+
+	scheduler_dp_task_stop(data, task);
+	pthread_cond_destroy(&pdata->cond);
+	task->state = SOF_TASK_STATE_FREE;
+	rfree(task);
+
+	return 0;
+}
+
+static int scheduler_dp_task_shedule(void *data, struct task *task, uint64_t start,
+				     uint64_t period)
+{
+	struct scheduler_dp_data *dp_sch = data;
+	struct task_dp_pdata *pdata = task->priv_data;
+	int ret;
+
+	pthread_mutex_lock(&dp_sch->lock);
+
+	if (task_is_active(task)) {
+		pthread_mutex_unlock(&dp_sch->lock);
+		return 0;
+	}
+
+	if (task->state != SOF_TASK_STATE_INIT &&
+	    task->state != SOF_TASK_STATE_CANCEL &&
+	    task->state != SOF_TASK_STATE_COMPLETED) {
+		pthread_mutex_unlock(&dp_sch->lock);
+		return -EINVAL;
+	}
+
+	if (!pdata->thread_created) {
+		int host_cpu;
+
+		pdata->event = 0;
+		ret = pthread_create(&pdata->thread_id, NULL, dp_thread_fn, task);
+		if (ret != 0) {
+			pthread_mutex_unlock(&dp_sch->lock);
+			return -ret;
+		}
+		host_cpu = host_pin_thread_to_dsp_core(pdata->thread_id, task->core);
+		pdata->thread_created = true;
+		tr_info(&dp_tr, "DP thread created for task %p on DSP core %d (host CPU %d)",
+			task, task->core, host_cpu);
+	}
+
+	task->state = SOF_TASK_STATE_QUEUED;
+	list_item_prepend(&task->list, &dp_sch->tasks);
+	pdata->mod->dp_startup_delay = true;
+	pdata->ll_cycles_to_start = 0;
+
+	pthread_mutex_unlock(&dp_sch->lock);
+	return 0;
+}
+
+static void dp_scheduler_free(void *data, uint32_t flags)
+{
+	struct scheduler_dp_data *dp_sch = data;
+
+	if (!dp_sch)
+		return;
+
+	pthread_mutex_destroy(&dp_sch->lock);
+	pthread_cond_destroy(&dp_sch->tick_done_cond);
+	free(dp_sch);
+}
+
+static struct scheduler_ops schedule_dp_ops = {
+	.schedule_task		= scheduler_dp_task_shedule,
+	.schedule_task_cancel	= scheduler_dp_task_stop,
+	.schedule_task_free	= scheduler_dp_task_free,
+	.scheduler_free		= dp_scheduler_free,
+};
+
+int scheduler_dp_init(void)
+{
+	struct scheduler_dp_data *dp_sch;
+
+	dp_sch = calloc(1, sizeof(*dp_sch));
+	if (!dp_sch)
+		return -ENOMEM;
+
+	list_init(&dp_sch->tasks);
+	pthread_mutex_init(&dp_sch->lock, NULL);
+	pthread_cond_init(&dp_sch->tick_done_cond, NULL);
+
+	scheduler_init(SOF_SCHEDULE_DP, &schedule_dp_ops, dp_sch);
+
+	return 0;
+}
+
+int scheduler_dp_task_init(struct task **task,
+			   const struct sof_uuid_entry *uid,
+			   const struct task_ops *ops,
+			   struct processing_module *mod,
+			   uint16_t core,
+			   size_t stack_size,
+			   uint32_t options)
+{
+	struct {
+		struct task task;
+		struct task_dp_pdata pdata;
+	} *task_memory;
+	struct task_dp_pdata *pdata;
+	int ret;
+
+	(void)stack_size;
+
+	task_memory = rzalloc(SOF_MEM_FLAG_USER, sizeof(*task_memory));
+	if (!task_memory) {
+		tr_err(&dp_tr, "scheduler_dp_task_init: memory alloc failed");
+		return -ENOMEM;
+	}
+
+	ret = schedule_task_init(&task_memory->task, uid, SOF_SCHEDULE_DP, 0, ops->run,
+				 mod, core, options);
+	if (ret < 0) {
+		tr_err(&dp_tr, "scheduler_dp_task_init: schedule_task_init failed");
+		rfree(task_memory);
+		return ret;
+	}
+
+	pdata = &task_memory->pdata;
+	pthread_cond_init(&pdata->cond, NULL);
+	pdata->mod = mod;
+
+	task_memory->task.ops.complete = ops->complete;
+	task_memory->task.ops.get_deadline = ops->get_deadline;
+	task_memory->task.state = SOF_TASK_STATE_INIT;
+	task_memory->task.core = core;
+	task_memory->task.priv_data = pdata;
+
+	ret = pthread_create(&pdata->thread_id, NULL, dp_thread_fn, &task_memory->task);
+	if (ret != 0) {
+		tr_err(&dp_tr, "scheduler_dp_task_init: pthread_create failed: %d", ret);
+		pthread_cond_destroy(&pdata->cond);
+		rfree(task_memory);
+		return -ret;
+	}
+	ret = host_pin_thread_to_dsp_core(pdata->thread_id, core);
+	pdata->thread_created = true;
+	tr_info(&dp_tr, "DP thread initialized for module %#x on DSP core %d (host CPU %d)",
+		dev_comp_id(mod->dev), core, ret);
+
+	*task = &task_memory->task;
+	return 0;
+}
+
+void scheduler_get_task_info_dp(struct scheduler_props *scheduler_props,
+				uint32_t *data_off_size)
+{
+	(void)scheduler_props;
+	(void)data_off_size;
+}
diff --git a/src/platform/library/schedule/host_schedule.h b/src/platform/library/schedule/host_schedule.h
new file mode 100644
index 000000000000..3376f90f028f
--- /dev/null
+++ b/src/platform/library/schedule/host_schedule.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2026 Intel Corporation. All rights reserved.
+ */
+
+#ifndef __LIBRARY_SCHEDULE_HOST_SCHEDULE_H__
+#define __LIBRARY_SCHEDULE_HOST_SCHEDULE_H__
+
+#include <pthread.h>
+
+int host_pin_thread_to_dsp_core(pthread_t thread, int dsp_core);
+
+#endif /* __LIBRARY_SCHEDULE_HOST_SCHEDULE_H__ */
diff --git a/src/platform/library/schedule/ll_schedule.c b/src/platform/library/schedule/ll_schedule.c
index f865f4db18e9..079ca00d53f1 100644
--- a/src/platform/library/schedule/ll_schedule.c
+++ b/src/platform/library/schedule/ll_schedule.c
@@ -1,41 +1,57 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-// Copyright(c) 2019 Intel Corporation. All rights reserved.
+// Copyright(c) 2019-2026 Intel Corporation. All rights reserved.
 //
 // Author: Tomasz Lauda <tomasz.lauda@linux.intel.com>
 
-#define _GNU_SOURCE
-
 #include <sof/audio/component.h>
 #include <rtos/task.h>
 #include <sof/schedule/schedule.h>
+#include <sof/schedule/dp_schedule.h>
 #include <platform/lib/ll_schedule.h>
 #include <sof/schedule/ll_schedule_domain.h>
+#include <platform/lib/telemetry_sched.h>
+#include <sof/lib/cpu.h>
 #include <rtos/wait.h>
 #include <stdlib.h>
 #include <stdio.h>
-#include <unistd.h>
-#include <sys/types.h>
 #include <stdint.h>
 
- /* scheduler testbench definition */
+/* Single-threaded cooperative LL scheduler for Xtensa simulator (xt-run) */
 
 SOF_DEFINE_REG_UUID(ll_sched_lib);
 
 DECLARE_TR_CTX(ll_tr, SOF_UUID(ll_sched_lib_uuid), LOG_LEVEL_INFO);
 
+static int host_current_core_id;
+
 /* list of all tasks */
 static struct list_item sched_list;
 
+int arch_cpu_get_id(void)
+{
+	return host_current_core_id;
+}
+
+void host_cpu_set_id(int id)
+{
+	host_current_core_id = id;
+}
+
 void schedule_ll_run_tasks(void)
 {
 	struct list_item *tlist, *tlist_;
 	struct task *task;
 	enum task_state state;
+	uint64_t core_cycles[CONFIG_CORE_COUNT] = { 0 };
+	uint32_t core_tasks[CONFIG_CORE_COUNT] = { 0 };
+	int c;
 
 	/* list empty then return */
 	if (list_is_empty(&sched_list))
 		fprintf(stdout, "LL scheduler thread exit - list empty\n");
+	else
+		host_telem_ll_tick_begin();
 
 	/* iterate through the task list */
 	list_for_item_safe(tlist, tlist_, &sched_list) {
@@ -43,9 +59,18 @@ void schedule_ll_run_tasks(void)
 
 		/* only run queued tasks */
 		if (task->state == SOF_TASK_STATE_QUEUED) {
+			uint64_t t0, t1;
+			int core = (task->core < CONFIG_CORE_COUNT) ? task->core : 0;
+
 			task->state = SOF_TASK_STATE_RUNNING;
+			host_cpu_set_id(task->core);
 
+			t0 = host_telem_timestamp_cycles();
 			state = task_run(task);
+			t1 = host_telem_timestamp_cycles();
+
+			core_tasks[core]++;
+			core_cycles[core] += (t1 > t0) ? (t1 - t0) : 1;
 
 			if (state == SOF_TASK_STATE_COMPLETED) {
 				task->state = SOF_TASK_STATE_COMPLETED;
@@ -55,6 +80,17 @@ void schedule_ll_run_tasks(void)
 			}
 		}
 	}
+
+	for (c = 0; c < CONFIG_CORE_COUNT; c++) {
+		if (core_tasks[c] > 0)
+			host_telem_core_ll_tick(c, core_tasks[c], core_cycles[c]);
+	}
+
+	host_cpu_set_id(0);
+
+#if CONFIG_ZEPHYR_DP_SCHEDULER
+	scheduler_dp_ll_tick();
+#endif
 }
 
 /* schedule new LL task */
@@ -121,7 +157,7 @@ int schedule_task_init_ll(struct task *task,
 			  int16_t priority, enum task_state (*run)(void *data),
 			  void *data, uint16_t core, uint32_t flags)
 {
-	return schedule_task_init(task, uid, SOF_SCHEDULE_LL_TIMER, 0, run,
+	return schedule_task_init(task, uid, SOF_SCHEDULE_LL_TIMER, priority, run,
 				  data, core, flags);
 }
 
diff --git a/src/platform/library/schedule/ll_schedule_pthread.c b/src/platform/library/schedule/ll_schedule_pthread.c
new file mode 100644
index 000000000000..411fc0b39967
--- /dev/null
+++ b/src/platform/library/schedule/ll_schedule_pthread.c
@@ -0,0 +1,355 @@
+// SPDX-License-Identifier: BSD-3-Clause
+//
+// Copyright(c) 2019-2026 Intel Corporation. All rights reserved.
+//
+// Author: Tomasz Lauda <tomasz.lauda@linux.intel.com>
+
+#define _GNU_SOURCE
+
+#include <sof/audio/component.h>
+#include <rtos/task.h>
+#include <sof/schedule/schedule.h>
+#include <sof/schedule/dp_schedule.h>
+#include <platform/lib/ll_schedule.h>
+#include <sof/schedule/ll_schedule_domain.h>
+#include <platform/lib/telemetry_sched.h>
+#include <sof/lib/cpu.h>
+#include <rtos/wait.h>
+#include <pthread.h>
+#include <sched.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <errno.h>
+
+#include "host_schedule.h"
+
+/* Host multi-threaded LL scheduler */
+
+SOF_DEFINE_REG_UUID(ll_sched_lib);
+
+DECLARE_TR_CTX(ll_tr, SOF_UUID(ll_sched_lib_uuid), LOG_LEVEL_INFO);
+
+struct ll_core_worker {
+	int core_id;
+	int host_cpu;
+	struct list_item sched_list;
+	pthread_t thread_id;
+	bool thread_created;
+	pthread_cond_t wake_cond;
+	bool run_tick;
+	bool stop;
+};
+
+static __thread int host_current_core_id;
+static cpu_set_t host_allowed_cpuset;
+static bool host_cpuset_initialized;
+
+static struct ll_core_worker ll_workers[CONFIG_CORE_COUNT];
+static pthread_mutex_t ll_sched_lock;
+static pthread_cond_t ll_tick_done_cond;
+static uint32_t ll_running_cores;
+
+int arch_cpu_get_id(void)
+{
+	return host_current_core_id;
+}
+
+void host_cpu_set_id(int id)
+{
+	host_current_core_id = id;
+}
+
+static void init_host_cpuset(void)
+{
+	if (host_cpuset_initialized)
+		return;
+	CPU_ZERO(&host_allowed_cpuset);
+	if (sched_getaffinity(0, sizeof(host_allowed_cpuset), &host_allowed_cpuset) == 0 &&
+	    CPU_COUNT(&host_allowed_cpuset) > 0)
+		host_cpuset_initialized = true;
+}
+
+int host_pin_thread_to_dsp_core(pthread_t thread, int dsp_core)
+{
+	cpu_set_t cpuset;
+	int num_cpus, target_idx, count = 0;
+	int host_cpu = -1;
+	int i;
+
+	init_host_cpuset();
+	if (!host_cpuset_initialized)
+		return -EINVAL;
+
+	num_cpus = CPU_COUNT(&host_allowed_cpuset);
+	if (num_cpus <= 0)
+		return -EINVAL;
+
+	target_idx = ((dsp_core >= 0) ? dsp_core : 0) % num_cpus;
+	for (i = 0; i < CPU_SETSIZE; i++) {
+		if (CPU_ISSET(i, &host_allowed_cpuset)) {
+			if (count == target_idx) {
+				host_cpu = i;
+				break;
+			}
+			count++;
+		}
+	}
+
+	if (host_cpu < 0)
+		return -EINVAL;
+
+	CPU_ZERO(&cpuset);
+	CPU_SET(host_cpu, &cpuset);
+	if (pthread_setaffinity_np(thread, sizeof(cpuset), &cpuset) != 0)
+		return -errno;
+
+	return host_cpu;
+}
+
+static void *ll_core_thread_fn(void *arg)
+{
+	struct ll_core_worker *worker = arg;
+	struct list_item *tlist, *tlist_;
+	struct task *task;
+	enum task_state state;
+
+	host_cpu_set_id(worker->core_id);
+
+	pthread_mutex_lock(&ll_sched_lock);
+
+	while (!worker->stop) {
+		while (!worker->run_tick && !worker->stop)
+			pthread_cond_wait(&worker->wake_cond, &ll_sched_lock);
+
+		if (worker->stop)
+			break;
+
+		worker->run_tick = false;
+		pthread_mutex_unlock(&ll_sched_lock);
+
+		uint64_t tick_start = host_telem_timestamp_cycles();
+		uint32_t tasks_run = 0;
+
+		/* iterate through this core's LL task list */
+		list_for_item_safe(tlist, tlist_, &worker->sched_list) {
+			task = container_of(tlist, struct task, list);
+
+			/* only run queued tasks */
+			if (task->state == SOF_TASK_STATE_QUEUED) {
+				task->state = SOF_TASK_STATE_RUNNING;
+
+				state = task_run(task);
+				tasks_run++;
+
+				if (state == SOF_TASK_STATE_COMPLETED) {
+					task->state = SOF_TASK_STATE_COMPLETED;
+					list_item_del(&task->list);
+				} else if (task->state == SOF_TASK_STATE_RUNNING) {
+					task->state = SOF_TASK_STATE_QUEUED;
+				}
+			}
+		}
+
+		if (tasks_run > 0)
+			host_telem_core_ll_tick(worker->core_id, tasks_run,
+						host_telem_timestamp_cycles() - tick_start);
+
+		pthread_mutex_lock(&ll_sched_lock);
+		if (ll_running_cores > 0) {
+			ll_running_cores--;
+			if (ll_running_cores == 0)
+				pthread_cond_broadcast(&ll_tick_done_cond);
+		}
+	}
+
+	pthread_mutex_unlock(&ll_sched_lock);
+	return NULL;
+}
+
+void schedule_ll_run_tasks(void)
+{
+	bool any_active = false;
+	int c;
+
+	pthread_mutex_lock(&ll_sched_lock);
+
+	for (c = 0; c < CONFIG_CORE_COUNT; c++) {
+		if (!list_is_empty(&ll_workers[c].sched_list)) {
+			if (!any_active) {
+				host_telem_ll_tick_begin();
+				any_active = true;
+			}
+			ll_workers[c].run_tick = true;
+			ll_running_cores++;
+			pthread_cond_signal(&ll_workers[c].wake_cond);
+		}
+	}
+
+	if (!any_active)
+		fprintf(stdout, "LL scheduler thread exit - list empty\n");
+
+	while (ll_running_cores > 0)
+		pthread_cond_wait(&ll_tick_done_cond, &ll_sched_lock);
+
+	pthread_mutex_unlock(&ll_sched_lock);
+
+#if CONFIG_ZEPHYR_DP_SCHEDULER
+	scheduler_dp_ll_tick();
+#endif
+}
+
+/* schedule new LL task */
+static int schedule_ll_task(void *data, struct task *task, uint64_t start,
+			    uint64_t period)
+{
+	int core = (task->core < CONFIG_CORE_COUNT) ? task->core : 0;
+	struct ll_core_worker *worker = &ll_workers[core];
+	int ret;
+
+	pthread_mutex_lock(&ll_sched_lock);
+
+	if (task->state == SOF_TASK_STATE_QUEUED ||
+	    task->state == SOF_TASK_STATE_RUNNING) {
+		pthread_mutex_unlock(&ll_sched_lock);
+		return 0;
+	}
+
+	if (!worker->thread_created) {
+		worker->stop = false;
+		worker->run_tick = false;
+		ret = pthread_create(&worker->thread_id, NULL, ll_core_thread_fn, worker);
+		if (ret != 0) {
+			pthread_mutex_unlock(&ll_sched_lock);
+			return -ret;
+		}
+		worker->host_cpu = host_pin_thread_to_dsp_core(worker->thread_id, core);
+		worker->thread_created = true;
+		tr_info(&ll_tr, "LL worker thread created for DSP core %d (host CPU %d)",
+			core, worker->host_cpu);
+	} else if (list_is_empty(&worker->sched_list)) {
+		tr_info(&ll_tr, "LL worker thread created for DSP core %d (host CPU %d)",
+			core, worker->host_cpu);
+	}
+
+	/* add task to core's list */
+	list_item_prepend(&task->list, &worker->sched_list);
+	task->state = SOF_TASK_STATE_QUEUED;
+	task->start = 0;
+
+	pthread_mutex_unlock(&ll_sched_lock);
+
+	return 0;
+}
+
+#if CONFIG_SOF_BOOT_TEST_STANDALONE || CONFIG_LIBRARY
+static void ll_scheduler_free(void *data, uint32_t flags)
+{
+	int c;
+
+	for (c = 0; c < CONFIG_CORE_COUNT; c++) {
+		pthread_t tid = 0;
+		bool join = false;
+
+		pthread_mutex_lock(&ll_sched_lock);
+		if (ll_workers[c].thread_created) {
+			ll_workers[c].stop = true;
+			pthread_cond_signal(&ll_workers[c].wake_cond);
+			tid = ll_workers[c].thread_id;
+			ll_workers[c].thread_created = false;
+			join = true;
+		}
+		pthread_mutex_unlock(&ll_sched_lock);
+
+		if (join)
+			pthread_join(tid, NULL);
+
+		pthread_cond_destroy(&ll_workers[c].wake_cond);
+	}
+
+	pthread_mutex_destroy(&ll_sched_lock);
+	pthread_cond_destroy(&ll_tick_done_cond);
+	free(data);
+}
+#endif
+
+/* TODO: scheduler free and cancel APIs can merge as part of Zephyr */
+static int schedule_ll_task_cancel(void *data, struct task *task)
+{
+	pthread_mutex_lock(&ll_sched_lock);
+
+	if (task->state == SOF_TASK_STATE_QUEUED ||
+	    task->state == SOF_TASK_STATE_RUNNING)
+		list_item_del(&task->list);
+
+	/* delete task */
+	task->state = SOF_TASK_STATE_CANCEL;
+
+	pthread_mutex_unlock(&ll_sched_lock);
+
+	return 0;
+}
+
+/* TODO: scheduler free and cancel APIs can merge as part of Zephyr */
+static int schedule_ll_task_free(void *data, struct task *task)
+{
+	pthread_mutex_lock(&ll_sched_lock);
+
+	if (task->state == SOF_TASK_STATE_QUEUED ||
+	    task->state == SOF_TASK_STATE_RUNNING)
+		list_item_del(&task->list);
+
+	task->state = SOF_TASK_STATE_FREE;
+
+	pthread_mutex_unlock(&ll_sched_lock);
+
+	return 0;
+}
+
+static struct scheduler_ops schedule_ll_ops = {
+	.schedule_task		= schedule_ll_task,
+	.schedule_task_running	= NULL,
+	.reschedule_task	= NULL,
+	.schedule_task_cancel	= schedule_ll_task_cancel,
+	.schedule_task_free	= schedule_ll_task_free,
+#if CONFIG_SOF_BOOT_TEST_STANDALONE || CONFIG_LIBRARY
+	.scheduler_free		= ll_scheduler_free,
+#endif
+};
+
+int schedule_task_init_ll(struct task *task,
+			  const struct sof_uuid_entry *uid, uint16_t type,
+			  int16_t priority, enum task_state (*run)(void *data),
+			  void *data, uint16_t core, uint32_t flags)
+{
+	return schedule_task_init(task, uid, SOF_SCHEDULE_LL_TIMER, priority, run,
+				  data, core, flags);
+}
+
+/* initialize scheduler */
+int scheduler_init_ll(struct ll_schedule_domain *domain)
+{
+	int c;
+
+	tr_info(&ll_tr, "ll_scheduler_init()");
+
+	pthread_mutex_init(&ll_sched_lock, NULL);
+	pthread_cond_init(&ll_tick_done_cond, NULL);
+
+	for (c = 0; c < CONFIG_CORE_COUNT; c++) {
+		ll_workers[c].core_id = c;
+		ll_workers[c].host_cpu = -1;
+		ll_workers[c].thread_created = false;
+		ll_workers[c].run_tick = false;
+		ll_workers[c].stop = false;
+		list_init(&ll_workers[c].sched_list);
+		pthread_cond_init(&ll_workers[c].wake_cond, NULL);
+	}
+
+	scheduler_init(SOF_SCHEDULE_LL_TIMER, &schedule_ll_ops, NULL);
+
+	return 0;
+}
diff --git a/src/schedule/Kconfig b/src/schedule/Kconfig
index f1383e70103f..a61f697d29a3 100644
--- a/src/schedule/Kconfig
+++ b/src/schedule/Kconfig
@@ -71,3 +71,44 @@ config TWB_IPC_TASK
 	depends on ZEPHYR_TWB_SCHEDULER
 	help
 	  Switch IPC task to TWB scheduler.
+
+config PIPELINE_2_0
+	bool "Enable pipeline 2.0 changes"
+	depends on IPC_MAJOR_4
+	default y if ACE || LIBRARY
+	help
+	  This flag enables changes to new pipeline structure, known as pipeline2_0
+	  It is required for certain new features, like DP_SCHEDULER.
+
+config ZEPHYR_DP_SCHEDULER
+	bool "use thread based DP scheduler"
+	default y if ACE || LIBRARY
+	depends on IPC_MAJOR_4
+	depends on (ZEPHYR_SOF_MODULE && ACE) || LIBRARY
+	depends on PIPELINE_2_0
+	imply XTENSA_HIFI_SHARING if XTENSA_HIFI
+	help
+	  Enable Data Processing preemptive scheduler based on
+	  preemptive threads (Zephyr threads on firmware targets, pthreads on host).
+	  DP modules can be located in different cores than LL pipeline modules, may have
+	  different tick (i.e. 300ms for speech recognition, etc.)
+
+config ZEPHYR_DP_SCHEDULER_MIN_STACK_SIZE
+	int "Minimum stack size for DP processing thread"
+	default 512
+	help
+	  Defines the minimum stack size allowed for DP processing
+	  threads despite what is requested in the module init IPC
+	  ext_init payload. If the stack size requested in the IPC is
+	  smaller than this, then the value defined here takes over.
+
+config CROSS_CORE_STREAM
+	bool "Enable cross-core connected pipelines"
+	default y if IPC_MAJOR_4
+	help
+	  Enables support for pipelines from different cores to be
+	  connected together cross-core. So stream can travel from one
+	  core to another. Note, this is different from "multicore"
+	  support. In SOF "multicore" support means different streams
+	  can be processed on different cores, however, each stream
+	  is processed entirely on single core.
diff --git a/tools/testbench/CMakeLists.txt b/tools/testbench/CMakeLists.txt
index d73d20ed2c5b..47d62d365bf3 100644
--- a/tools/testbench/CMakeLists.txt
+++ b/tools/testbench/CMakeLists.txt
@@ -4,10 +4,19 @@ cmake_minimum_required(VERSION 3.13)
 
 project(SOF_TESTBENCH C)
 
+option(TESTBENCH_XTENSA_SIM "Build single-threaded testbench for Xtensa simulator" OFF)
+if(CMAKE_C_COMPILER MATCHES "xt-|xtensa-" OR DEFINED ENV{XTENSA_CORE})
+	set(TESTBENCH_XTENSA_SIM ON CACHE BOOL "Build single-threaded testbench for Xtensa simulator" FORCE)
+endif()
+
 include(../../scripts/cmake/misc.cmake)
 include(CheckCCompilerFlag)
 
-set(default_asoc_h "/usr/include/alsa/sound/uapi/asoc.h")
+if(EXISTS "/usr/include/alsa/sound/uapi/asoc.h")
+	set(default_asoc_h "/usr/include/alsa/sound/uapi/asoc.h")
+else()
+	set(default_asoc_h "/usr/include/sound/asoc.h")
+endif()
 
 file(READ "../../src/arch/host/configs/library_defconfig" library_defconfig)
 
@@ -28,6 +37,9 @@ add_executable(${testbench}
 	topology_ipc3.c
 	topology_ipc4.c
 )
+if(NOT TESTBENCH_XTENSA_SIM)
+	target_sources(${testbench} PRIVATE remote_server.c)
+endif()
 
 sof_append_relative_path_definitions(${testbench})
 
@@ -56,11 +68,28 @@ endif()
 
 target_compile_options(${testbench} PRIVATE -g -O3 -Wall -Werror -Wmissing-prototypes
   ${implicit_fallthrough} -DCONFIG_LIBRARY -imacros${config_h})
+if(TESTBENCH_XTENSA_SIM)
+	target_compile_definitions(${testbench} PRIVATE CONFIG_XT_SIMULATOR=1)
+endif()
+if(CMAKE_C_COMPILER MATCHES "xt-|xtensa-")
+	target_compile_options(${testbench} PRIVATE
+		-U__INT32_TYPE__ -D__INT32_TYPE__=int
+		-U__UINT32_TYPE__ "-D__UINT32_TYPE__=unsigned int"
+		-Wno-format)
+endif()
 
 target_link_libraries(${testbench} PRIVATE -lm)
 
 install(TARGETS ${testbench} DESTINATION bin)
 
+if(NOT TESTBENCH_XTENSA_SIM)
+	add_executable(sof-tb-ctl tb_ctl.c)
+	target_include_directories(sof-tb-ctl PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/include)
+	target_compile_options(sof-tb-ctl PRIVATE -g -O3 -Wall -Werror -Wmissing-prototypes
+		${implicit_fallthrough})
+	install(TARGETS sof-tb-ctl DESTINATION bin)
+endif()
+
 include(ExternalProject)
 
 # Should we do this? Only for sof_ep, not for parser_ep?
@@ -75,6 +104,7 @@ ExternalProject_Add(sof_ep
 		-DCMAKE_VERBOSE_MAKEFILE=${CMAKE_VERBOSE_MAKEFILE}
 		-DINIT_CONFIG=library_defconfig
 		-DCONFIG_H_PATH=${config_h}
+		-DTESTBENCH_XTENSA_SIM=${TESTBENCH_XTENSA_SIM}
 	BUILD_ALWAYS 1
 	BUILD_BYPRODUCTS "${sof_install_directory}/lib/libsof.a"
 )
@@ -106,6 +136,9 @@ add_dependencies(${testbench} sof_parser_lib)
 target_link_libraries(${testbench} PRIVATE sof_library)
 target_link_libraries(${testbench} PRIVATE sof_parser_lib)
 target_link_libraries(${testbench} PRIVATE m)
+if(NOT TESTBENCH_XTENSA_SIM)
+	target_link_libraries(${testbench} PRIVATE pthread)
+endif()
 target_include_directories(${testbench} PRIVATE ${sof_install_directory}/include)
 target_include_directories(${testbench} PRIVATE ${parser_install_dir}/include)
 
@@ -114,3 +147,32 @@ set_target_properties(${testbench}
 	INSTALL_RPATH "${sof_install_directory}/lib"
 	INSTALL_RPATH_USE_LINK_PATH TRUE
 )
+
+if(NOT TESTBENCH_XTENSA_SIM)
+	enable_testing()
+	add_test(NAME testbench_tier1_modules
+		 COMMAND ${CMAKE_COMMAND} -E env
+			 TB_BIN=$<TARGET_FILE:${testbench}>
+			 TB_CTL_BIN=$<TARGET_FILE:sof-tb-ctl>
+			 ${CMAKE_CURRENT_SOURCE_DIR}/run_test_suite.sh --tier 1)
+	add_test(NAME testbench_tier2_complex_dags
+		 COMMAND ${CMAKE_COMMAND} -E env
+			 TB_BIN=$<TARGET_FILE:${testbench}>
+			 TB_CTL_BIN=$<TARGET_FILE:sof-tb-ctl>
+			 ${CMAKE_CURRENT_SOURCE_DIR}/run_test_suite.sh --tier 2)
+	add_test(NAME testbench_tier3_ll_dp
+		 COMMAND ${CMAKE_COMMAND} -E env
+			 TB_BIN=$<TARGET_FILE:${testbench}>
+			 TB_CTL_BIN=$<TARGET_FILE:sof-tb-ctl>
+			 ${CMAKE_CURRENT_SOURCE_DIR}/run_test_suite.sh --tier 3)
+	add_test(NAME testbench_tier4_multicore
+		 COMMAND ${CMAKE_COMMAND} -E env
+			 TB_BIN=$<TARGET_FILE:${testbench}>
+			 TB_CTL_BIN=$<TARGET_FILE:sof-tb-ctl>
+			 ${CMAKE_CURRENT_SOURCE_DIR}/run_test_suite.sh --tier 4)
+	add_test(NAME testbench_tier5_controls_remote
+		 COMMAND ${CMAKE_COMMAND} -E env
+			 TB_BIN=$<TARGET_FILE:${testbench}>
+			 TB_CTL_BIN=$<TARGET_FILE:sof-tb-ctl>
+			 ${CMAKE_CURRENT_SOURCE_DIR}/run_test_suite.sh --tier 5)
+endif()
diff --git a/tools/testbench/README.md b/tools/testbench/README.md
index 82e1630dc771..a0d55162f574 100644
--- a/tools/testbench/README.md
+++ b/tools/testbench/README.md
@@ -4,6 +4,13 @@
 
  * Simulate IPC3 and IPC4 SOF versions with run of set of processing
    components based on desired topology.
+ * Supports arbitrary multi-pipeline DAG topologies, including linear chains,
+   1-to-N fan-out (e.g., crossover), N-to-1 fan-in (e.g., AEC reference + mic,
+   deepbuffer + main playback mixing), diamond graphs, `module-copier`
+   (`SND_SOC_TPLG_DAPM_BUFFER`), and concurrent multi-PCM playback and capture.
+ * Multi-core and multi-threaded execution on host CPUs (`pthread` +
+   `pthread_setaffinity_np`) honoring topology `core` / `core_id` assignments
+   for both Low Latency (LL) pipelines and Data Processing (DP) modules.
  * Replaces host and dai components with file I/O with raw binary
    S16_LE/S24_LE/S32_LE or text format files for audio waveforms.
  * Much faster than real-time execution in native build, e.g. x86 on
@@ -14,6 +21,105 @@
  * Allows easy use of conventional debugger, profiler, leak and memory check
    tools usage for DSP firmware code.
 
+### Architecture
+
+#### Multi-Pipeline Graphs & Multi-Pin Binding
+
+`sof-testbench4` parses the full topology widget, route, and PCM lists and constructs the active subgraph selected via `-p <pipeline1,pipeline2,...>`:
+
+ * **Multi-Source / Multi-Sink Discovery**: Automatically discovers all active `AIF_IN` (playback host), `AIF_OUT` (capture host), `DAI_IN` (playback DAI), and `DAI_OUT` (capture DAI) endpoints across enabled pipelines and binds them in order to the comma-separated `-i` input files and `-o` output files.
+ * **Pin Binding & Sink Formats**: Parses `SOF_TKN_COMP_INPUT_PIN_BINDING_WNAME` and `SOF_TKN_COMP_OUTPUT_PIN_BINDING_WNAME` tuples to assign exact source and destination queue IDs (`src_queue_id`, `dst_queue_id`) for multi-pin modules (such as `crossover`, `mixin`/`mixout`, `google-rtc-audio-processing`, and multi-sink `copier`s), and sends `SOF_IPC4_COPIER_MODULE_CFG_PARAM_SET_SINK_FORMAT` IPCs for non-zero output pins.
+ * **DAG Traversal**: Prepares, sets up, binds, triggers, and tears down branching and merging pipeline graphs without duplicate widget initialization or double unbinding.
+
+#### Multi-Core LL & DP Thread Scheduling
+
+`sof-testbench4` supports up to `CONFIG_CORE_COUNT=8` virtual DSP cores (`CONFIG_CROSS_CORE_STREAM=y`) mapped onto host CPU cores via `sched_getaffinity` and `pthread_setaffinity_np`:
+
+ * **Topology Core Assignment**:
+   * Pipelines (`SND_SOC_TPLG_DAPM_SCHEDULER`) use `SOF_TKN_SCHED_CORE` (`core`) and `SOF_TKN_SCHED_PRIORITY` (`priority`), propagated via `SOF_IPC4_GLB_CREATE_PIPELINE`.
+   * Widgets use `SOF_TKN_COMP_CORE_ID` (`core_id`) and `SOF_TKN_COMP_SCHED_DOMAIN` (`LL` vs. `DP`), propagated via `SOF_IPC4_MOD_INIT_INSTANCE`. LL widgets inherit their parent pipeline's `core_id`, while DP widgets can reside on any DSP core independent of their parent LL pipeline.
+ * **Per-Core LL Worker Threads (`ll_schedule_pthread.c`)**:
+   * Each active DSP core `c` (`0 .. CONFIG_CORE_COUNT - 1`) spawns a dedicated persistent `pthread` worker pinned to host CPU `c % num_allowed_host_cpus` with thread-local `cpu_get_id() == c`.
+   * On each 1 ms tick (`schedule_ll_run_tasks()`), all active LL core worker threads run their core's queued LL pipeline tasks concurrently in parallel across host CPU cores and synchronize at the end of the LL cycle before triggering the DP scheduler.
+ * **Per-Module DP Worker Threads (`dp_schedule_pthread.c`)**:
+   * Each Data Processing (DP) module (`COMP_PROCESSING_DOMAIN_DP`) runs in its own dedicated `pthread` pinned to the host CPU core corresponding to the module's topology `core_id`.
+   * Cross-core and same-core LL-to-DP and DP-to-LL connections communicate through lock-free single-producer single-consumer (SPSC) shared `ring_buffer` instances.
+ * **Xtensa Simulator & Single-Threaded C Library Partitioning (`ll_schedule.c` / `dp_schedule.c`)**:
+   * When built for the Xtensa simulator (`xt-run` via `scripts/rebuild-testbench.sh -p <platform>`, or manually with `-DTESTBENCH_XTENSA_SIM=ON`), CMake automatically selects the pure standard-C cooperative schedulers (`ll_schedule.c` and `dp_schedule.c`) instead of `ll_schedule_pthread.c` and `dp_schedule_pthread.c`.
+   * This eliminates dependencies on `<pthread.h>`, `-lpthread`, `<sched.h>`, and `clock_gettime` that are unavailable in the Xtensa newlib (`-mlsp=sim`) runtime, while executing DP modules synchronously inside `scheduler_dp_ll_tick()` so their instruction cycles are included in `XT_RSR_CCOUNT()` profiling.
+
+#### Per-Core, Per-Pipeline, and Per-Module Scheduling & Buffer Entry/Exit Telemetry (`telemetry_sched.c`)
+
+`sof-testbench4` instruments every DSP core's LL and DP schedulers, every pipeline walk (`pipeline_copy()`), and every LL (`comp_copy()`) and DP (`dp_task_run()`) module execution:
+
+ * **Per-Core LL & DP Scheduler Telemetry**: Tracks LL tick counts, active LL tasks, LL average/peak/total DSP cycles and KCPS, DP thread run counts, active DP threads, DP average/peak/total DSP cycles and KCPS, and combined core utilization (`total_util_x100`) on every DSP core (`0 .. CONFIG_CORE_COUNT - 1`).
+ * **Per-Pipeline Telemetry**: Tracks copy iterations, priority, period, core assignment, LL and DP module counts, average/peak/total cycles, KCPS, and XRUN counts for each active pipeline.
+ * **Per-Module Scheduling & Buffer Entry/Exit Telemetry**:
+   * Tracks `iterations`, `last/avg/peak/total_cycles`, `avg/peak_kcps`, `ibs`, `obs`, `cpc` budget and `cpc_violations`, plus LL ring-buffer sync iterations and cycles for DP modules.
+   * On **entry** (before processing) and **exit** (after processing) of every module's `copy()` / `dp_task_run()` call, captures for each input (producer) and output (consumer) pin:
+     * Primary LL `comp_buffer` fill levels (`entry_avail_bytes`, `entry_free_bytes`, `exit_avail_bytes`, `exit_free_bytes`) and secondary DP `ring_buffer` fill levels (`dp_ring_size`, `dp_ring_entry_avail`, `dp_ring_exit_avail`).
+     * Exact bytes consumed/produced (`last_bytes_transferred`, `total_bytes_transferred`).
+     * Signal levels in `0.01 dBFS` (`entry_rms_dbfs_x100`, `entry_peak_dbfs_x100`, `exit_rms_dbfs_x100`, `exit_peak_dbfs_x100`) and rolling S16-normalized sample taps (`entry_samples[64]`, `exit_samples[64]`).
+ * **CLI & Remote Exposure**: Printed automatically at the end of every testbench run, exposed in SRAM Windows 2 & 3 and `SOF_NET_OP_TELEM_SNAPSHOT`, and queryable live via `sof-remote shell "sched-telem"` and `sof-remote shell "mod-buffers [comp_id|name]"`.
+ * **Accurate CPC, Core Frequency & SRAM/DRAM Workload Execution Time Simulation**:
+   * Enabled via `-w <0|1|2|off|virtual|realtime>`, `-F <freq_mhz | core:freq_mhz,...>`, and `-M <sram|dram[:penalty_x100[:cycles_per_word]]>` or dynamically over TCP via `SOF_NET_OP_WORKLOAD_SIM_CFG` (`0x0029`) and `sof-remote shell "workload-sim ..."`.
+   * Computes module cycle consumption from each module's topology `SOF_TKN_COMP_CPC` (`base_cfg.cpc`, per-module override, or calibrated module-type CPC), scales cycles by memory residency (`SRAM` 1.00x vs `DRAM` cache/bus stall multiplier + per-word transfer penalty), and computes execution time ($T_{\text{exec}} = \text{cycles} / f_{\text{core}}$), core utilization %, and 1 ms LL tick deadline overruns against each core's target clock frequency.
+   * Supports both fast virtual cycle/time accounting (`-w 1` / `virtual`) and real-time wall-clock pacing (`-w 2` / `realtime`).
+
+#### Network Remote Control & Telemetry Interface (`remote_server.c`)
+
+`sof-testbench4` exposes the `sof-remote` TCP binary framing protocol (`SOF_NET_MAGIC = 0x534F4652` `'SOFR'`, `SOF_NET_VERSION = 1`, default TCP port `9998`) via `-S <port>` and `-W`:
+
+ * **Supported Opcodes**:
+   * `SOF_NET_OP_PING`, `SOF_NET_OP_GET_INFO`, `SOF_NET_OP_PM_CTL` (`query`, `release`/D3 pause, `wake`/D0 resume)
+   * `SOF_NET_OP_IPC_TX` (direct IPC4 message dispatch) and `SOF_NET_OP_IPC_LARGE_CFG` (BaseFW params 9, 12, 14, 15, 17, 18, 30 and live module `LARGE_CONFIG_GET`/`SET`)
+   * `SOF_NET_OP_WIN_INFO`, `SOF_NET_OP_WIN_READ`, `SOF_NET_OP_WIN_WRITE`, `SOF_NET_OP_WINSTREAM_IO` (emulated SRAM Windows 0–3 and debug slots)
+   * `SOF_NET_OP_TELEM_SNAPSHOT` (single-RPC composite telemetry snapshot consumed by `tools/softop/softop.py` and `sof-remote telem`)
+   * `SOF_NET_OP_WORKLOAD_SIM_CFG` (`0x0029`, query/configure CPC workload execution simulation mode, SRAM/DRAM residency, DRAM stall multiplier, per-core target clock frequencies, and per-module CPC/memory overrides via `sof-remote workload-sim ...`)
+   * `SOF_NET_OP_SHELL_EXEC` (`info`, `pipelines`, `modules`, `tplg-load <file> [p1,p2,...]`, `ppl-create`, `ppl-state`, `ppl-delete`, `mod-bind`, `mod-unbind`, `mod-delete`, `controls`, live `amixer cset ...`, live `sof-ctl ...`, `stats`, `heap`, `sched-telem`, `sched-telem-reset`, `workload-sim [status|enable|disable|freq|mem|mod|reset]`, `mod-buffers [id|name]`, `kernel cycles`, `kernel threads`, `pause`, `resume`, `step [N]`, `loglevel <0..4>`, `quit`)
+   * `SOF_NET_OP_LLEXT_LOAD` (upload and load dynamic `.so` / `.llext` module images via `dlopen` / LLEXT table registration)
+   * `SOF_NET_OP_PROBE_CTL` (enumerate and read inter-component `struct comp_buffer` audio streams as probe points)
+   * `SOF_NET_OP_PCM_CTL` (`start-tone`, `stop-tone`, `status`, and `capture` from output streams)
+ * **Tick-Boundary Synchronization**: All network RPCs that inspect or mutate IPC/module/topology state acquire `g_tb_lock` between 1 ms LL ticks (`tb_remote_tick_begin()` / `tb_remote_tick_end()`), guaranteeing thread safety across multi-core LL and DP worker threads.
+
+### Command-Line Options
+
+```
+Usage: sof-testbench4 <options> -i <input_file1,input_file2,...> -o <output_file1,output_file2,...>
+
+Options for processing:
+  -t <topology file>
+  -i <input_file1,input_file2,...>  (up to 16 comma-separated input files)
+  -o <output_file1,output_file2,...> (up to 16 comma-separated output files)
+
+Options to control test:
+  -d <level> Sets the traces print level:
+     0 all traces are suppressed
+     1 shows error traces
+     2 shows warning traces and previous
+     3 shows info traces and previous
+     4 shows debug traces and previous, plus other testbench debug messages
+  -p <pipeline1,pipeline2,...> (up to 16 comma-separated pipeline IDs, default: 1)
+  -C <number of copy() iterations>
+  -P <number of dynamic pipeline iterations>
+  -s <script file to set controls, with amixer and sleep commands>
+  -S <port> Start sof-remote TCP server on <port> (default port: 9998)
+  -W Keep testbench running continuously for remote network control
+  -w <0|1|2|off|virtual|realtime> Enable CPC workload execution time simulation
+  -F <freq_mhz | core:freq_mhz,...> Set target DSP core clock frequency in MHz
+  -M <sram|dram[:penalty_x100[:cycles_per_word]]> Set workload memory domain
+
+Options for input and output format override:
+  -b <input_format>, S16_LE, S24_LE, or S32_LE
+  -c <input channels>
+  -n <output channels>
+  -r <input rate>
+  -R <output rate>
+
+Help:
+  -h
+```
+
 ### Prerequisites
 
 Before running the SOF testbench, install the required dependencies:
@@ -64,6 +170,77 @@ directions, use -p 1,2,3,4 and provide multiple input and output
 files separated with comma. Use e.g. -i i1.raw,i2.raw
 -o o1.raw,o2.raw.
 
+### Multi-Pipeline, DP, and Multi-Core Examples
+
+```
+# 1-to-2 Fan-Out (2-way Crossover across pipelines 1, 101, 102)
+tools/testbench/build_testbench/install/bin/sof-testbench4 -r 48000 -R 48000 -c 2 -n 2 -b S32_LE \
+  -t tools/build_tools/topology/topology2/development/sof-tgl-nocodec-crossover-2way.tplg \
+  -p 1,101,102 -i in.raw -o out_sink1.raw,out_sink2.raw
+
+# 2-to-1 Fan-In (Google RTC AEC capture + playback reference across pipelines 7, 8, 12)
+tools/testbench/build_testbench/install/bin/sof-testbench4 -r 16000 -R 16000 -c 2 -n 2 -b S16_LE \
+  -t tools/build_tools/topology/topology2/development/sof-tgl-nocodec-rtcaec.tplg \
+  -p 7,8,12 -i mic_in.raw,ref_in.raw -o aec_out.raw
+
+# Multiple DP Modules in Dedicated Threads (Playback + Capture Phase Vocoder)
+tools/testbench/build_testbench/install/bin/sof-testbench4 -r 48000 -R 48000 -c 2 -n 2 -b S32_LE \
+  -t tools/build_tools/topology/topology2/development/sof-hda-benchmark-phase_vocoder32.tplg \
+  -p 1,2,3,4 -i pb_in.raw,cap_in.raw -o pb_out.raw,cap_out.raw
+
+# Multi-Core LL & Cross-Core DP Execution (Core 0 Capture LL, Core 1 DP SRC threads, Core 2 Playback/Capture LL)
+tools/testbench/build_testbench/install/bin/sof-testbench4 -r 48000 -R 48000 -c 2 -n 2 -b S32_LE \
+  -t tools/build_tools/topology/topology2/development/sof-mtl-nocodec-dp-core-test.tplg \
+  -p 5,6,7,8,11,12 -i pb_in.raw,cap1_in.raw,cap2_in.raw -o pb_out.raw,cap1_out.raw,cap2_out.raw
+
+# Interactive Remote Server Mode (connect with sof-remote or tools/softop/softop.py)
+tools/testbench/build_testbench/sof-testbench4 \
+  -t tools/build_tools/topology/topology2/target/sof-ipc4-tplg/sof-hda-generic.tplg \
+  -p 1,2 -S 9998 -W
+
+# In another terminal, query and control testbench over TCP:
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 info
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 telem
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 cards
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 pcm-caps
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 dapm /tmp/tb_dapm.dot
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 compr caps
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 kctl list
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 kctl get 1
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 kctl set 1 28 28
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 shell "pipelines"
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 shell "sched-telem"
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 shell "mod-buffers"
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 shell "controls"
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 shell "amixer cset name=\"Pre Mixer Analog Playback Volume\" 20,20"
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 pcm start-tone hw:0,0 1000
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 pcm capture hw:0,0 100
+python3 tools/softop/softop.py --remote 127.0.0.1:9998
+tools/sof-remote-server/sof-remote -H 127.0.0.1 -p 9998 shell "quit"
+```
+
+### Comprehensive Topology & Module Test Suite
+
+`tools/testbench/run_test_suite.sh` executes 67 automated test cases across 5 progressive tiers:
+
+ * **Tier 1 (46 tests)**: All 26 built-in SOF audio processing modules (`dcblock`, `drc`, `drc_multiband`, `dolby-dax`, `eqfir`, `eqiir`, `gain`, `igo_nr`, `level_multiplier`, `mfcc`, `mfccmel`, `micsel`, `micsel_multich`, `rtnr`, `sound_dose`, `tdfb`, `template_comp`, `aria`, `src`, `src_lite`, `asrc`, `crossover`, `google_ctc_audio_processing`, `google_rtc_audio_processing`, `phase_vocoder`, `stft_process`, `mixin`/`mixout`, `host-copier`/`dai-copier`/`module-copier`) across `S32_LE`, `S24_LE`, `S16_LE`, rate conversion (`44.1 kHz <-> 48 kHz`), and multi-channel (`4ch -> 2ch`).
+ * **Tier 2 (7 tests)**: Simple to complex multi-pipeline DAG topologies (3x HDMI passthrough, 3-pipeline cascaded `aria->gain->mixin->mixout`, 6-module EFX chain, 1-to-2 fan-out crossover, 2-to-1 fan-in Google RTC AEC, 4ch DMIC `tdfb->drc->eqiir->gain`, and 11-pipeline 6-input/5-output concurrent `sof-hda-generic.tplg`).
+ * **Tier 3 (6 tests)**: Combinations of Low-Latency (`LL`) and Data Processing (`DP`) modules (single-thread DP `phase_vocoder`, full-duplex dual-thread DP `phase_vocoder` and `stft_process` `192/48`, `512/128`, `1536/240`, and 6-pipeline LL + 2 DP `src` threads).
+ * **Tier 4 (6 tests)**: Multi-Core LL and Cross-Core DP execution across DSP Cores 0, 1, and 2 (`sof-mtl-nocodec.tplg`, `sof-hda-src-generic-dp.tplg`, `sof-mtl-nocodec-dp-core-test.tplg`, `sof-lnl-nocodec-dp-core-test.tplg`, `sof-ptl-nocodec-dp-core-test.tplg`, and `sof-mtl-rt1019-rt5682-dax.tplg`).
+ * **Tier 5 (2 tests)**: Runtime control scripts (`-s` with `amixer` and `sof-ctl`) and live `SOFR` v1 TCP remote control & 3-core telemetry inspection (`-S <port> -W` with `sof-remote`).
+
+```
+# Run the complete 67-test suite
+tools/testbench/run_test_suite.sh
+
+# Run a single tier (1..5) or filter by regex
+tools/testbench/run_test_suite.sh --tier 4
+tools/testbench/run_test_suite.sh --filter "mcore|fanout|fanin"
+
+# Or run via CTest from the testbench build directory
+ctest --test-dir tools/testbench/build_testbench --output-on-failure
+```
+
 ### Apply controls to simulation
 
 The testbench supports shell script like amixer and sleep commands for
diff --git a/tools/testbench/file.c b/tools/testbench/file.c
index 07159d8c296b..cd1f6257eb30 100644
--- a/tools/testbench/file.c
+++ b/tools/testbench/file.c
@@ -23,9 +23,11 @@
 #include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
+#include <math.h>
 #include "testbench/utils.h"
 #include "testbench/file.h"
 #include "testbench/file_ipc4.h"
+#include "testbench/remote_server.h"
 #include "../../src/audio/copier/copier.h"
 
 SOF_DEFINE_REG_UUID(file);
@@ -80,6 +82,75 @@ static void sign_extend_source_s24(const struct audio_stream *source, int sample
 	}
 }
 
+static int generate_tone_s32(struct file_comp_data *cd, const struct audio_stream *sink,
+			     int samples, uint32_t freq_hz, int fmt)
+{
+	int32_t *snk = (int32_t *)sink->w_ptr;
+	int nch = cd->fs.channels > 0 ? cd->fs.channels : 2;
+	int rate = cd->fs.rate > 0 ? cd->fs.rate : 48000;
+	double step = 2.0 * M_PI * (double)freq_hz / (double)rate;
+	double scale = (fmt == SOF_IPC_FRAME_S24_4LE) ? (16000.0 * 256.0) : (16000.0 * 65536.0);
+	size_t bytes = samples * sizeof(int32_t);
+	int copied = 0;
+
+	while (bytes >= nch * sizeof(int32_t)) {
+		size_t bytes_snk = audio_stream_bytes_without_wrap(sink, snk);
+		int frames_avail = FILE_BYTES_TO_S32_SAMPLES(MIN(bytes, bytes_snk)) / nch;
+		int f, c;
+
+		if (frames_avail <= 0)
+			frames_avail = 1;
+		for (f = 0; f < frames_avail && bytes >= nch * sizeof(int32_t); f++) {
+			int32_t val = (int32_t)(scale * sin(cd->fs.tone_phase));
+
+			cd->fs.tone_phase += step;
+			if (cd->fs.tone_phase >= 2.0 * M_PI)
+				cd->fs.tone_phase -= 2.0 * M_PI;
+			for (c = 0; c < nch; c++) {
+				*snk = val;
+				snk = audio_stream_wrap(sink, snk + 1);
+				bytes -= sizeof(int32_t);
+				copied++;
+			}
+		}
+	}
+	return copied;
+}
+
+static int generate_tone_s16(struct file_comp_data *cd, const struct audio_stream *sink,
+			     int samples, uint32_t freq_hz)
+{
+	int16_t *snk = (int16_t *)sink->w_ptr;
+	int nch = cd->fs.channels > 0 ? cd->fs.channels : 2;
+	int rate = cd->fs.rate > 0 ? cd->fs.rate : 48000;
+	double step = 2.0 * M_PI * (double)freq_hz / (double)rate;
+	size_t bytes = samples * sizeof(int16_t);
+	int copied = 0;
+
+	while (bytes >= nch * sizeof(int16_t)) {
+		size_t bytes_snk = audio_stream_bytes_without_wrap(sink, snk);
+		int frames_avail = FILE_BYTES_TO_S16_SAMPLES(MIN(bytes, bytes_snk)) / nch;
+		int f, c;
+
+		if (frames_avail <= 0)
+			frames_avail = 1;
+		for (f = 0; f < frames_avail && bytes >= nch * sizeof(int16_t); f++) {
+			int16_t val = (int16_t)(16000.0 * sin(cd->fs.tone_phase));
+
+			cd->fs.tone_phase += step;
+			if (cd->fs.tone_phase >= 2.0 * M_PI)
+				cd->fs.tone_phase -= 2.0 * M_PI;
+			for (c = 0; c < nch; c++) {
+				*snk = val;
+				snk = audio_stream_wrap(sink, snk + 1);
+				bytes -= sizeof(int16_t);
+				copied++;
+			}
+		}
+	}
+	return copied;
+}
+
 /*
  * Read 32-bit samples from binary file
  */
@@ -91,6 +162,10 @@ static int read_binary_s32(struct file_comp_data *cd, const struct audio_stream
 	size_t bytes = samples * sizeof(int32_t);
 	int ret;
 	int samples_copied = 0;
+	uint32_t tone_freq = 0;
+
+	if (tb_remote_is_tone_active(&tone_freq))
+		return generate_tone_s32(cd, sink, samples, tone_freq, cd->frame_fmt);
 
 	while (bytes) {
 		bytes_snk = audio_stream_bytes_without_wrap(sink, snk);
@@ -121,6 +196,7 @@ static int write_binary_s32(struct file_comp_data *cd, const struct audio_stream
 	size_t bytes = samples * sizeof(int32_t);
 	int ret;
 	int samples_copied = 0;
+	int shift = (cd->frame_fmt == SOF_IPC_FRAME_S24_4LE) ? 8 : 16;
 
 	while (bytes) {
 		bytes_src = audio_stream_bytes_without_wrap(source, src);
@@ -130,6 +206,8 @@ static int write_binary_s32(struct file_comp_data *cd, const struct audio_stream
 			cd->fs.write_failed = true;
 			return samples_copied;
 		}
+		tb_remote_record_output_samples_s32(src, ret, cd->fs.channels,
+						    cd->fs.rate, shift);
 		samples_copied += ret;
 		bytes -= ret * sizeof(int32_t);
 		src = audio_stream_wrap(source, src + ret);
@@ -260,6 +338,10 @@ static int read_binary_s16(struct file_comp_data *cd, const struct audio_stream
 	size_t bytes = samples * sizeof(int16_t);
 	int ret;
 	int samples_copied = 0;
+	uint32_t tone_freq = 0;
+
+	if (tb_remote_is_tone_active(&tone_freq))
+		return generate_tone_s16(cd, sink, samples, tone_freq);
 
 	while (bytes) {
 		bytes_snk = audio_stream_bytes_without_wrap(sink, snk);
@@ -299,6 +381,7 @@ static int write_binary_s16(struct file_comp_data *cd, const struct audio_stream
 			cd->fs.write_failed = true;
 			return samples_copied;
 		}
+		tb_remote_record_output_samples_s16(src, ret, cd->fs.channels, cd->fs.rate);
 
 		samples_copied += ret;
 		bytes -= ret * sizeof(int16_t);
@@ -550,7 +633,8 @@ static void file_free_dai_data(struct processing_module *mod)
 {
 	struct copier_data *ccd = module_get_private_data(mod);
 
-	free(ccd->dd[0]);
+	rfree(ccd->dd[0]);
+	ccd->dd[0] = NULL;
 }
 #else
 /* Minimal support for IPC3 pipeline_comp_trigger()'s dai_get_init_delay_ms() */
@@ -577,7 +661,8 @@ static void file_free_dai_data(struct processing_module *mod)
 	struct comp_dev *dev = mod->dev;
 
 	dd = comp_get_drvdata(dev);
-	free(dd);
+	rfree(dd);
+	dev->priv_data = NULL;
 }
 #endif
 
@@ -610,7 +695,7 @@ static int file_init(struct processing_module *mod)
 	/* File component data is placed to copier's ipcgtw_data */
 	cd = rzalloc(SOF_MEM_FLAG_USER, sizeof(*cd));
 	if (!cd) {
-		free(ccd);
+		rfree(ccd);
 		return -ENOMEM;
 	}
 
@@ -647,6 +732,7 @@ static int file_init(struct processing_module *mod)
 				cd->fs.fn, strerror(errno));
 			goto error;
 		}
+		mod->max_sinks = SOF_WIDGET_MAX_NUM_PINS;
 
 		/* Change to DAI type is needed to avoid uninitialized hw params in
 		 * pipeline_params, A file host can be left as SOF_COMP_MODULE_ADAPTER
@@ -699,8 +785,14 @@ static int file_init(struct processing_module *mod)
 	return 0;
 
 error:
-	free(cd);
-	free(ccd);
+	if (cd->fs.rfh)
+		fclose(cd->fs.rfh);
+	if (cd->fs.wfh)
+		fclose(cd->fs.wfh);
+	file_free_dai_data(mod);
+	free(cd->fs.fn);
+	rfree(cd);
+	rfree(ccd);
 	return -EINVAL;
 }
 
@@ -718,8 +810,8 @@ static int file_free(struct processing_module *mod)
 
 	file_free_dai_data(mod);
 	free(cd->fs.fn);
-	free(cd);
-	free(ccd);
+	rfree(cd);
+	rfree(ccd);
 	return 0;
 }
 
@@ -741,29 +833,82 @@ static int file_process(struct processing_module *mod,
 	int samples = 0;
 	int ret = 0;
 
-	if (cd->fs.reached_eof)
-		return -ENODATA;
+	if (cd->fs.reached_eof) {
+		uint32_t tone_freq = 0;
+
+		if (tb_remote_is_tone_active(&tone_freq)) {
+			cd->fs.reached_eof = false;
+			cd->fs.copy_timeout = false;
+			cd->copies_timeout_count = 0;
+		} else {
+			return 0;
+		}
+	}
 
 	/* Note: a SOF_COMP_DAI does not have input_buffers and output buffers set */
 	tb_getcycles(&cycles0);
 	switch (cd->fs.mode) {
 	case FILE_READ:
-		/* read PCM samples from file */
+	{
+		struct comp_buffer *next_buf;
+		void *first_wptr;
+		size_t bytes_produced;
+
+		/* read PCM samples from file into first consumer buffer */
 		buffer = comp_dev_get_first_data_consumer(dev);
+		comp_dev_for_each_consumer(dev, next_buf)
+			comp_buffer_shared_lock(next_buf);
 		sink = &buffer->stream;
 		frames = audio_stream_get_free_frames(sink);
 		frames = MIN(frames, cd->max_frames);
+		comp_dev_for_each_consumer(dev, next_buf) {
+			if (next_buf == buffer)
+				continue;
+			frames = MIN(frames, audio_stream_get_free_frames(&next_buf->stream));
+		}
+		first_wptr = sink->w_ptr;
 		samples = cd->file_func(cd, sink, NULL, frames);
-		audio_stream_produce(sink, audio_stream_sample_bytes(sink) * samples);
+		bytes_produced = audio_stream_sample_bytes(sink) * samples;
+
+		/* replicate samples to any additional consumer buffers */
+		comp_dev_for_each_consumer(dev, next_buf) {
+			struct audio_stream *nsink = &next_buf->stream;
+			uint8_t *src_ptr = first_wptr;
+			uint8_t *dst_ptr = nsink->w_ptr;
+			size_t rem = bytes_produced;
+
+			if (next_buf == buffer)
+				continue;
+
+			while (rem > 0) {
+				size_t src_chunk = audio_stream_bytes_without_wrap(sink, src_ptr);
+				size_t dst_chunk = audio_stream_bytes_without_wrap(nsink, dst_ptr);
+				size_t chunk = MIN(rem, MIN(src_chunk, dst_chunk));
+
+				memcpy(dst_ptr, src_ptr, chunk);
+				rem -= chunk;
+				src_ptr = audio_stream_wrap(sink, src_ptr + chunk);
+				dst_ptr = audio_stream_wrap(nsink, dst_ptr + chunk);
+			}
+			comp_update_buffer_produce(next_buf, bytes_produced);
+		}
+		comp_update_buffer_produce(buffer, bytes_produced);
+		comp_dev_for_each_consumer(dev, next_buf)
+			comp_buffer_shared_unlock(next_buf);
 		break;
+	}
 	case FILE_WRITE:
 		/* write PCM samples into file */
 		buffer = comp_dev_get_first_data_producer(dev);
+		comp_buffer_shared_lock(buffer);
 		source = &buffer->stream;
 		frames = audio_stream_get_avail_frames(source);
 		frames = MIN(frames, cd->max_frames);
 		samples = cd->file_func(cd, NULL, source, frames);
-		audio_stream_consume(source, audio_stream_sample_bytes(source) * samples);
+		comp_update_buffer_consume(buffer, audio_stream_sample_bytes(source) * samples);
+		comp_buffer_shared_unlock(buffer);
+		if (samples > 0 && cd->fs.wfh)
+			fflush(cd->fs.wfh);
 		break;
 	default:
 		/* TODO: duplex mode */
@@ -779,6 +924,7 @@ static int file_process(struct processing_module *mod,
 
 	if (samples) {
 		cd->copies_timeout_count = 0;
+		cd->fs.copy_timeout = false;
 	} else {
 		cd->copies_timeout_count++;
 		if (cd->copies_timeout_count == FILE_MAX_COPIES_TIMEOUT) {
@@ -807,10 +953,13 @@ static int file_prepare(struct processing_module *mod,
 	cd->max_frames = dev->frames;
 	switch (cd->fs.mode) {
 	case FILE_READ:
+		comp_dev_for_each_consumer(dev, buffer)
+			audio_stream_set_valid_fmt(&buffer->stream, cd->frame_fmt);
 		buffer = comp_dev_get_first_data_consumer(dev);
 		break;
 	case FILE_WRITE:
 		buffer = comp_dev_get_first_data_producer(dev);
+		audio_stream_set_valid_fmt(&buffer->stream, cd->frame_fmt);
 		break;
 	default:
 		/* TODO: duplex mode */
@@ -821,13 +970,6 @@ static int file_prepare(struct processing_module *mod,
 	/* set file function */
 	stream = &buffer->stream;
 
-	/*
-	 * Real copier/DAI components call ipc4_update_buffer_format() to populate
-	 * valid_sample_fmt; the testbench file component is the host endpoint stub
-	 * so propagate cd->frame_fmt to the buffer's valid format too.
-	 */
-	audio_stream_set_valid_fmt(stream, cd->frame_fmt);
-
 	switch (audio_stream_get_frm_fmt(stream)) {
 	case SOF_IPC_FRAME_S16_LE:
 		cd->file_func = file_s16;
@@ -849,10 +991,25 @@ static int file_prepare(struct processing_module *mod,
 
 static int file_reset(struct processing_module *mod)
 {
-	struct file_comp_data *cd = module_get_private_data(mod);
+	struct file_comp_data *cd = get_file_comp_data(module_get_private_data(mod));
 
 	tb_debug_print("file_reset()\n");
 	cd->copies_timeout_count = 0;
+	cd->fs.reached_eof = false;
+	cd->fs.write_failed = false;
+	cd->fs.copy_timeout = false;
+	cd->fs.n = 0;
+	cd->fs.copy_count = 0;
+	cd->fs.cycles_count = 0;
+	cd->fs.tone_phase = 0.0;
+	if (cd->fs.mode == FILE_READ && cd->fs.fn) {
+		if (cd->fs.rfh)
+			fclose(cd->fs.rfh);
+		cd->fs.rfh = fopen(cd->fs.fn, "r");
+	} else if (cd->fs.mode == FILE_WRITE && cd->fs.fn) {
+		if (cd->fs.wfh)
+			fflush(cd->fs.wfh);
+	}
 	return 0;
 }
 
diff --git a/tools/testbench/include/linux/types.h b/tools/testbench/include/linux/types.h
index 31186b5e365e..8833289ab3f6 100644
--- a/tools/testbench/include/linux/types.h
+++ b/tools/testbench/include/linux/types.h
@@ -14,6 +14,16 @@
 
 /* There are minimum types needed for alsa/sound/uapi/asoc.h */
 
+#define __SOUND_ASOUND_H
+
+#ifndef __DECLARE_FLEX_ARRAY
+#define __DECLARE_FLEX_ARRAY(TYPE, NAME)	\
+	struct { \
+		struct { } __empty_ ## NAME; \
+		TYPE NAME[]; \
+	}
+#endif
+
 typedef int64_t __le64;
 typedef int32_t __le32;
 typedef int16_t __le16;
diff --git a/tools/testbench/include/sound/asound.h b/tools/testbench/include/sound/asound.h
new file mode 100644
index 000000000000..6a1ede6da0cb
--- /dev/null
+++ b/tools/testbench/include/sound/asound.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+#ifndef __SOUND_ASOUND_H
+#define __SOUND_ASOUND_H
+
+#ifndef SNDRV_CTL_ELEM_ID_NAME_MAXLEN
+#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN	44
+#endif
+
+#endif /* __SOUND_ASOUND_H */
diff --git a/tools/testbench/include/testbench/file.h b/tools/testbench/include/testbench/file.h
index dd1735026564..0544c15ffa4e 100644
--- a/tools/testbench/include/testbench/file.h
+++ b/tools/testbench/include/testbench/file.h
@@ -50,6 +50,7 @@ struct file_state {
 	bool reached_eof;
 	bool write_failed;
 	bool copy_timeout;
+	double tone_phase;
 };
 
 struct file_comp_data;
diff --git a/tools/testbench/include/testbench/remote_server.h b/tools/testbench/include/testbench/remote_server.h
new file mode 100644
index 000000000000..24ba6a0aa4fa
--- /dev/null
+++ b/tools/testbench/include/testbench/remote_server.h
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2026 Intel Corporation. All rights reserved.
+ */
+
+#ifndef _TESTBENCH_REMOTE_SERVER_H
+#define _TESTBENCH_REMOTE_SERVER_H
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include "testbench/utils.h"
+
+#if !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+
+int tb_remote_server_start(struct testbench_prm *tp);
+void tb_remote_server_stop(void);
+void tb_remote_tick_begin(struct testbench_prm *tp);
+void tb_remote_tick_end(struct testbench_prm *tp, uint64_t delta_cycles, uint64_t delta_ns);
+bool tb_remote_should_continue(struct testbench_prm *tp, bool file_eof);
+bool tb_remote_is_tone_active(uint32_t *freq_hz);
+void tb_remote_record_output_samples_s16(const int16_t *samples, size_t count,
+					 int channels, int rate);
+void tb_remote_record_output_samples_s32(const int32_t *samples, size_t count,
+					 int channels, int rate, int shift_to_s16);
+
+#else
+
+static inline int tb_remote_server_start(struct testbench_prm *tp)
+{
+	(void)tp;
+	return 0;
+}
+
+static inline void tb_remote_server_stop(void) {}
+
+static inline void tb_remote_tick_begin(struct testbench_prm *tp)
+{
+	(void)tp;
+}
+
+static inline void tb_remote_tick_end(struct testbench_prm *tp, uint64_t delta_cycles,
+				      uint64_t delta_ns)
+{
+	(void)tp;
+	(void)delta_cycles;
+	(void)delta_ns;
+}
+
+static inline bool tb_remote_should_continue(struct testbench_prm *tp, bool file_eof)
+{
+	(void)tp;
+	return !file_eof;
+}
+
+static inline bool tb_remote_is_tone_active(uint32_t *freq_hz)
+{
+	(void)freq_hz;
+	return false;
+}
+
+static inline void tb_remote_record_output_samples_s16(const int16_t *samples, size_t count,
+						       int channels, int rate)
+{
+	(void)samples;
+	(void)count;
+	(void)channels;
+	(void)rate;
+}
+
+static inline void tb_remote_record_output_samples_s32(const int32_t *samples, size_t count,
+						       int channels, int rate, int shift_to_s16)
+{
+	(void)samples;
+	(void)count;
+	(void)channels;
+	(void)rate;
+	(void)shift_to_s16;
+}
+
+#endif /* !__XTENSA__ && !CONFIG_XT_SIMULATOR */
+
+#endif /* _TESTBENCH_REMOTE_SERVER_H */
diff --git a/tools/testbench/include/testbench/sof_remote_proto.h b/tools/testbench/include/testbench/sof_remote_proto.h
new file mode 100644
index 000000000000..d2738b3676f5
--- /dev/null
+++ b/tools/testbench/include/testbench/sof_remote_proto.h
@@ -0,0 +1,783 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2026 Intel Corporation. All rights reserved.
+ *
+ * Sound Open Firmware (SOF) Remote Server Protocol & Shared UAPI Definitions
+ */
+
+#ifndef _TESTBENCH_SOF_REMOTE_PROTO_H
+#define _TESTBENCH_SOF_REMOTE_PROTO_H
+
+#include <stdint.h>
+
+#define SOF_CDEV_ABI_VERSION		0x00010000U
+
+/*
+ * SRAM Memory Window Selectors
+ */
+#define SOF_CDEV_WIN_FW_REGS		0	/* Window 0: FW Regs (0x0..0xfff) + Inbox (+0x1000) */
+#define SOF_CDEV_WIN_OUTBOX		1	/* Window 1: Host Downlink Outbox */
+#define SOF_CDEV_WIN_DEBUG		2	/* Window 2: Debug Window (16 x 4 KB pages) */
+#define SOF_CDEV_WIN_PERF		3	/* Window 3: Performance Measurements Window (ADSP_PMW) */
+#define SOF_CDEV_WIN_BY_SLOT_TYPE	0xFF	/* Select Window 2 slot by slot_type + slot_index */
+
+#define SOF_CDEV_MAX_WINDOWS		4
+#define SOF_CDEV_MAX_DEBUG_SLOTS	16
+
+/* Standard IPC4 Window 2 Debug Slot Types */
+#define SOF_CDEV_SLOT_UNUSED		0x00000000U
+#define SOF_CDEV_SLOT_CRITICAL_LOG	0x54524300U
+#define SOF_CDEV_SLOT_DEBUG_LOG		0x474f4c00U
+#define SOF_CDEV_SLOT_GDB_STUB		0x42444700U
+#define SOF_CDEV_SLOT_TELEMETRY		0x4c455400U
+#define SOF_CDEV_SLOT_BROKEN		0x44414544U
+#define SOF_CDEV_SLOT_SHELL		0x73686c6cU /* 'shll' Zephyr winstream shell */
+#define SOF_CDEV_SLOT_LLEXT_LOAD	0x4c454c44U /* 'LELD' Shell LLEXT load shm */
+
+struct sof_cdev_slot_desc {
+	uint32_t slot_index;
+	uint32_t res_id;
+	uint32_t type;
+	uint32_t vma;
+	uint32_t win_offset;
+	uint32_t bar_offset;
+	uint32_t size;
+	uint32_t reserved;
+};
+
+struct sof_cdev_win_desc {
+	uint32_t win_id;
+	uint32_t bar_offset;
+	uint32_t size;
+	uint32_t flags;
+};
+
+struct sof_cdev_info {
+	uint32_t abi_version;
+	uint32_t ipc_type;		/* 0 = IPC3, 1 = IPC4 */
+	uint32_t fw_state;		/* enum sof_fw_state (7 = BOOT_COMPLETE) */
+	uint32_t dsp_power_state;	/* 0=U0, 1=D0, 2=D1, 3=D2, 4=D3 */
+	uint32_t pm_runtime_active;	/* 1 if active (D0) */
+	uint32_t num_cores;		/* Total DSP cores on platform */
+	uint32_t enabled_cores_mask;	/* Bitmask of currently enabled DSP cores */
+	uint32_t max_payload_size;	/* Max IPC mailbox payload size in bytes */
+	uint16_t fw_ver_major;
+	uint16_t fw_ver_minor;
+	uint16_t fw_ver_micro;
+	uint16_t fw_ver_build;
+	uint32_t hw_ip_version;
+	char     platform[32];
+	char     fw_filename[64];
+	struct sof_cdev_win_desc windows[SOF_CDEV_MAX_WINDOWS];
+	struct sof_cdev_slot_desc debug_slots[SOF_CDEV_MAX_DEBUG_SLOTS];
+};
+
+/*
+ * Power Management Control Commands
+ */
+#define SOF_PM_OP_QUERY		0
+#define SOF_PM_OP_WAKE_HOLD	1
+#define SOF_PM_OP_RELEASE_HOLD	2
+#define SOF_PM_OP_BOOT_DSP	3
+#define SOF_PM_OP_CORE_GET	4
+#define SOF_PM_OP_CORE_PUT	5
+
+struct sof_cdev_pm_ctl {
+	uint32_t op;
+	uint32_t core_id;
+	uint32_t fw_state;
+	uint32_t dsp_power_state;
+	uint32_t pm_runtime_active;
+	uint32_t enabled_cores_mask;
+	uint32_t fd_holding_d0;
+	uint32_t reserved;
+};
+
+#define SOF_CDEV_IPC_FL_NO_REPLY	(1U << 0)
+
+#define SOF_CDEV_LARGE_CFG_GET		0
+#define SOF_CDEV_LARGE_CFG_SET		1
+
+#define SOF_CDEV_WIN_FL_WAKE_DSP	(1U << 0)
+
+struct sof_cdev_win_info {
+	struct sof_cdev_win_desc windows[SOF_CDEV_MAX_WINDOWS];
+	struct sof_cdev_slot_desc debug_slots[SOF_CDEV_MAX_DEBUG_SLOTS];
+};
+
+#define SOF_LLEXT_MODE_SHELL_SHM	0
+#define SOF_LLEXT_MODE_IPC4_DIRECT	1
+
+#define SOF_PROBE_OP_INIT		1
+#define SOF_PROBE_OP_DEINIT		2
+#define SOF_PROBE_OP_INFO_ACTIVE	3
+#define SOF_PROBE_OP_INFO_AVAILABLE	4
+#define SOF_PROBE_OP_POINTS_ADD		5
+#define SOF_PROBE_OP_POINTS_REMOVE	6
+#define SOF_PROBE_OP_READ_BUFFER	7
+
+struct sof_cdev_probe_point {
+	uint32_t buffer_id;
+	uint32_t purpose;
+	uint32_t stream_tag;
+	uint32_t reserved;
+	char     widget_name[32];
+};
+
+/*
+ * Network Protocol Definitions (TCP port 9998)
+ */
+#define SOF_NET_MAGIC			0x534F4652U /* 'SOFR' */
+#define SOF_NET_VERSION			1
+#define SOF_NET_DEFAULT_PORT		9998
+
+enum sof_net_opcode {
+	SOF_NET_OP_PING			= 0x0000,
+	SOF_NET_OP_GET_INFO		= 0x0001,
+	SOF_NET_OP_PM_CTL		= 0x0002,
+	SOF_NET_OP_IPC_TX		= 0x0010,
+	SOF_NET_OP_IPC_LARGE_CFG	= 0x0011,
+	SOF_NET_OP_WIN_INFO		= 0x0020,
+	SOF_NET_OP_WIN_READ		= 0x0021,
+	SOF_NET_OP_WIN_WRITE		= 0x0022,
+	SOF_NET_OP_WINSTREAM_IO		= 0x0023,
+	SOF_NET_OP_TELEM_SNAPSHOT	= 0x0028,
+	SOF_NET_OP_WORKLOAD_SIM_CFG	= 0x0029,
+	SOF_NET_OP_SCHED_TRACE		= 0x002B,
+	SOF_NET_OP_LLEXT_LOAD		= 0x0030,
+	SOF_NET_OP_SHELL_EXEC		= 0x0040,
+	SOF_NET_OP_PROBE_CTL		= 0x0050,
+	SOF_NET_OP_PCM_CTL		= 0x0060,
+	/* Extended Audio Card, PCM/Compress Capabilities, DAPM Graph & Kcontrol Opcodes */
+	SOF_NET_OP_CARD_LIST		= 0x0070,
+	SOF_NET_OP_PCM_CAPS		= 0x0071,
+	SOF_NET_OP_DAPM_GRAPH		= 0x0072,
+	SOF_NET_OP_COMPR_CTL		= 0x0073,
+	SOF_NET_OP_KCTL_LIST		= 0x0074,
+	SOF_NET_OP_KCTL_GET		= 0x0075,
+	SOF_NET_OP_KCTL_SET		= 0x0076,
+};
+
+/* Selectable Userspace Audio API Backend */
+enum sof_audio_api {
+	SOF_AUDIO_API_AUTO		= 0,
+	SOF_AUDIO_API_ALSA		= 1,
+	SOF_AUDIO_API_TINYALSA		= 2,
+	SOF_AUDIO_API_TINYCOMPRESS	= 3,
+};
+
+/* Sample Format IDs across ALSA and TinyALSA */
+enum sof_pcm_fmt_id {
+	SOF_PCM_FMT_S16_LE		= 0,
+	SOF_PCM_FMT_S24_LE		= 1,
+	SOF_PCM_FMT_S24_3LE		= 2,
+	SOF_PCM_FMT_S32_LE		= 3,
+	SOF_PCM_FMT_S8			= 4,
+	SOF_PCM_FMT_FLOAT_LE		= 5,
+};
+
+struct sof_net_hdr {
+	uint32_t magic;
+	uint16_t version;
+	uint16_t opcode;
+	uint32_t req_id;
+	uint32_t payload_len;
+	int32_t  status;
+} __attribute__((packed));
+
+struct sof_net_ipc_tx_req {
+	uint32_t primary;
+	uint32_t extension;
+	uint32_t tx_size;
+	uint32_t rx_size;
+	uint32_t flags;
+} __attribute__((packed));
+
+struct sof_net_ipc_tx_rsp {
+	uint32_t reply_primary;
+	uint32_t reply_extension;
+	int32_t  ipc_status;
+	uint32_t rx_size;
+} __attribute__((packed));
+
+struct sof_net_large_cfg_req {
+	uint32_t module_id;
+	uint32_t instance_id;
+	uint32_t param_id;
+	uint32_t set_get;
+	uint32_t data_size;
+	uint32_t flags;
+} __attribute__((packed));
+
+struct sof_net_win_io_req {
+	uint32_t win_id;
+	uint32_t slot_type;
+	uint32_t slot_index;
+	uint32_t offset;
+	uint32_t size;
+	uint32_t flags;
+} __attribute__((packed));
+
+struct sof_net_winstream_req {
+	uint32_t slot_type;
+	uint32_t rx_win_size;
+	uint32_t tx_len;
+	uint32_t rx_buf_len;
+	uint32_t seq_in;
+} __attribute__((packed));
+
+struct sof_net_winstream_rsp {
+	uint32_t rx_bytes_read;
+	uint32_t seq_out;
+} __attribute__((packed));
+
+#define SOF_TELEM_FL_FW_REGS		(1U << 0)
+#define SOF_TELEM_FL_TELEM_SLOT		(1U << 1)
+#define SOF_TELEM_FL_PERF_WIN3		(1U << 2)
+#define SOF_TELEM_FL_MEM_STATE_TLV	(1U << 3)
+#define SOF_TELEM_FL_PWR_STATE_TLV	(1U << 4)
+#define SOF_TELEM_FL_EXT_PERF_TLV	(1U << 5)
+#define SOF_TELEM_FL_MODULES_INFO_TLV	(1U << 6)
+#define SOF_TELEM_FL_SYS_HOST_STATS	(1U << 7)
+#define SOF_TELEM_FL_WAKE_DSP		(1U << 15)
+
+struct sof_net_telem_req {
+	uint32_t query_mask;
+	uint32_t flags;
+} __attribute__((packed));
+
+struct sof_net_telem_snapshot {
+	struct sof_cdev_info dev_info;
+	uint32_t flags_present;
+	uint32_t active_pcm_streams;
+	uint8_t  fw_regs[512];
+	uint8_t  telem_slot[512];
+	uint8_t  perf_win3[4096];
+	uint32_t mem_state_len;
+	uint8_t  mem_state_tlv[2048];
+	uint32_t pwr_state_len;
+	uint8_t  pwr_state_tlv[256];
+	uint32_t ext_perf_len;
+	uint8_t  ext_perf_tlv[4096];
+	uint32_t modules_info_len;
+	uint8_t  modules_info_tlv[4096];
+};
+
+struct sof_net_llext_req {
+	uint32_t mode;
+	uint32_t lib_id;
+	uint32_t data_size;
+	uint32_t issue_shell_cmd;
+	char     mod_name[64];
+} __attribute__((packed));
+
+struct sof_net_llext_rsp {
+	uint32_t lib_id;
+	int32_t  fw_state;
+	char     shell_out[512];
+} __attribute__((packed));
+
+struct sof_net_shell_req {
+	uint32_t timeout_ms;
+	uint32_t cmd_len;
+} __attribute__((packed));
+
+struct sof_net_probe_req {
+	uint32_t op;
+	uint32_t stream_tag;
+	uint32_t dma_buffer_size;
+	uint32_t num_points;
+} __attribute__((packed));
+
+#define SOF_PCM_OP_STATUS		0
+#define SOF_PCM_OP_START_TONE		1
+#define SOF_PCM_OP_STOP_TONE		2
+#define SOF_PCM_OP_PLAY_BUFFER		3
+#define SOF_PCM_OP_CAPTURE_BUFFER	4
+
+struct sof_net_pcm_req {
+	uint32_t op;
+	char     device[32];
+	uint32_t rate;
+	uint32_t channels;
+	uint32_t freq_hz;
+	uint32_t duration_ms;
+	uint32_t data_size;
+	/* Optional extended fields (if payload_len >= sizeof(struct sof_net_pcm_req)) */
+	uint32_t api_backend;
+	uint32_t format;
+	uint32_t period_size;
+	uint32_t period_count;
+} __attribute__((packed));
+
+struct sof_net_pcm_rsp {
+	uint32_t tone_running;
+	char     active_device[32];
+	uint32_t rate;
+	uint32_t channels;
+	uint32_t freq_hz;
+	uint64_t frames_played;
+	uint32_t rms_level;
+	uint32_t peak_level;
+	uint32_t data_size;
+	uint32_t api_used;
+	uint32_t format;
+	uint32_t xruns;
+} __attribute__((packed));
+
+/* -------------------------------------------------------------------------
+ * SOF_NET_OP_CARD_LIST: Sound Cards, PCM Streams & Compress Streams
+ * -------------------------------------------------------------------------
+ */
+#define SOF_STREAM_DIR_PLAYBACK		0
+#define SOF_STREAM_DIR_CAPTURE		1
+
+struct sof_net_card_list_hdr {
+	uint32_t num_cards;
+	uint32_t num_pcm_nodes;
+} __attribute__((packed));
+
+struct sof_net_card_info {
+	uint32_t card_id;
+	char     id[32];
+	char     driver[32];
+	char     name[64];
+	char     longname[96];
+	char     mixername[64];
+	char     tplg_file[96];
+	uint32_t num_pcm_streams;
+	uint32_t num_compr_streams;
+	uint32_t num_kcontrols;
+	uint32_t active_streams;
+} __attribute__((packed));
+
+struct sof_net_pcm_node_info {
+	uint32_t card_id;
+	uint32_t device_id;
+	uint32_t direction;
+	uint32_t is_compress;
+	char     id[64];
+	char     name[64];
+	uint32_t subdevices_count;
+	uint32_t subdevices_avail;
+	char     state_str[16];
+	uint32_t is_running;
+	uint32_t owner_pid;
+	char     active_format[16];
+	uint32_t active_rate;
+	uint32_t active_channels;
+	uint32_t period_size;
+	uint32_t buffer_size;
+	uint64_t hw_ptr;
+	uint64_t appl_ptr;
+	uint32_t delay_frames;
+	uint32_t avail_frames;
+} __attribute__((packed));
+
+/* -------------------------------------------------------------------------
+ * SOF_NET_OP_PCM_CAPS: Per-PCM & Compress Capabilities
+ * -------------------------------------------------------------------------
+ */
+#define SOF_CAPS_DIR_PLAYBACK		(1U << 0)
+#define SOF_CAPS_DIR_CAPTURE		(1U << 1)
+#define SOF_CAPS_DIR_COMPRESS		(1U << 2)
+#define SOF_CAPS_DIR_ALL		0x07U
+
+struct sof_net_pcm_caps_req {
+	uint32_t card_id;
+	uint32_t device_id;
+	uint32_t dir_mask;
+	uint32_t api_backend;
+} __attribute__((packed));
+
+struct sof_net_pcm_caps_hdr {
+	uint32_t num_entries;
+	uint32_t api_used;
+} __attribute__((packed));
+
+#define SOF_FMTBIT_S8			(1ULL << 0)
+#define SOF_FMTBIT_U8			(1ULL << 1)
+#define SOF_FMTBIT_S16_LE		(1ULL << 2)
+#define SOF_FMTBIT_S16_BE		(1ULL << 3)
+#define SOF_FMTBIT_S24_LE		(1ULL << 6)
+#define SOF_FMTBIT_S24_BE		(1ULL << 7)
+#define SOF_FMTBIT_S32_LE		(1ULL << 10)
+#define SOF_FMTBIT_S32_BE		(1ULL << 11)
+#define SOF_FMTBIT_FLOAT_LE		(1ULL << 14)
+#define SOF_FMTBIT_S24_3LE		(1ULL << 32)
+#define SOF_FMTBIT_S24_3BE		(1ULL << 33)
+
+#define SOF_RATEBIT_8000		(1U << 0)
+#define SOF_RATEBIT_11025		(1U << 1)
+#define SOF_RATEBIT_16000		(1U << 2)
+#define SOF_RATEBIT_22050		(1U << 3)
+#define SOF_RATEBIT_32000		(1U << 4)
+#define SOF_RATEBIT_44100		(1U << 5)
+#define SOF_RATEBIT_48000		(1U << 6)
+#define SOF_RATEBIT_88200		(1U << 7)
+#define SOF_RATEBIT_96000		(1U << 8)
+#define SOF_RATEBIT_176400		(1U << 9)
+#define SOF_RATEBIT_192000		(1U << 10)
+
+struct sof_net_pcm_caps {
+	uint32_t card_id;
+	uint32_t device_id;
+	uint32_t direction;
+	uint32_t is_compress;
+	uint32_t api_used;
+	int32_t  status;
+	char     id[64];
+	char     name[64];
+	uint64_t formats_mask;
+	uint32_t access_mask;
+	uint32_t rates_mask;
+	uint32_t rate_min;
+	uint32_t rate_max;
+	uint32_t channels_min;
+	uint32_t channels_max;
+	uint32_t sample_bits_min;
+	uint32_t sample_bits_max;
+	uint32_t period_size_min;
+	uint32_t period_size_max;
+	uint32_t period_bytes_min;
+	uint32_t period_bytes_max;
+	uint32_t periods_min;
+	uint32_t periods_max;
+	uint32_t buffer_size_min;
+	uint32_t buffer_size_max;
+	uint32_t buffer_bytes_min;
+	uint32_t buffer_bytes_max;
+	uint32_t min_fragment_size;
+	uint32_t max_fragment_size;
+	uint32_t min_fragments;
+	uint32_t max_fragments;
+	uint32_t num_codecs;
+	uint32_t codecs[16];
+	char     formats_str[96];
+	char     rates_str[96];
+} __attribute__((packed));
+
+/* -------------------------------------------------------------------------
+ * SOF_NET_OP_DAPM_GRAPH: DAPM Nodes, Directed Connections, Layout & DPCM Status
+ * -------------------------------------------------------------------------
+ */
+struct sof_net_dapm_req {
+	uint32_t card_id;
+	uint32_t flags;
+} __attribute__((packed));
+
+struct sof_net_dapm_graph_hdr {
+	uint32_t card_id;
+	char     card_name[64];
+	char     tplg_file[96];
+	uint32_t num_components;
+	uint32_t num_nodes;
+	uint32_t num_powered_nodes;
+	uint32_t num_edges;
+	uint32_t num_active_edges;
+	uint32_t num_dpcm_links;
+} __attribute__((packed));
+
+struct sof_net_dapm_comp_status {
+	char     name[48];
+	char     bias_str[16];
+	uint32_t bias_level;
+	uint32_t widget_count;
+	uint32_t powered_count;
+} __attribute__((packed));
+
+struct sof_net_dapm_node {
+	uint32_t node_id;
+	char     name[64];
+	char     component[48];
+	char     widget_type[24];
+	uint32_t power;
+	uint32_t in_ep;
+	uint32_t out_ep;
+	uint32_t stream_active;
+	char     stream_name[48];
+	int32_t  reg;
+	uint32_t mask;
+	int32_t  pipeline_id;
+	uint16_t layout_col;
+	uint16_t layout_row;
+	uint16_t num_kcontrols;
+	uint16_t reserved;
+	uint32_t kcontrol_numids[4];
+	char     kcontrol_names[2][48];
+} __attribute__((packed));
+
+struct sof_net_dapm_edge {
+	uint32_t edge_id;
+	int32_t  src_node_id;
+	int32_t  dst_node_id;
+	char     src_name[48];
+	char     dst_name[48];
+	char     src_comp[32];
+	char     dst_comp[32];
+	char     control_name[48];
+	uint32_t kcontrol_numid;
+	uint32_t active;
+} __attribute__((packed));
+
+struct sof_net_dpcm_link_state {
+	char     fe_name[48];
+	uint32_t direction;
+	char     state_str[16];
+	char     fe_format[16];
+	uint32_t fe_channels;
+	uint32_t fe_rate;
+	uint32_t num_backends;
+	char     be_names[4][32];
+	char     be_states[4][16];
+	char     be_formats[4][16];
+	uint32_t be_channels[4];
+	uint32_t be_rates[4];
+} __attribute__((packed));
+
+/* -------------------------------------------------------------------------
+ * SOF_NET_OP_COMPR_CTL: Compressed PCM Playback & Capture
+ * -------------------------------------------------------------------------
+ */
+#define SOF_COMPR_OP_GET_CAPS		0
+#define SOF_COMPR_OP_PLAY_BUFFER	1
+#define SOF_COMPR_OP_CAPTURE_BUFFER	2
+
+struct sof_net_compr_req {
+	uint32_t op;
+	uint32_t card_id;
+	uint32_t device_id;
+	uint32_t direction;
+	uint32_t codec_id;
+	uint32_t rate;
+	uint32_t channels;
+	uint32_t format;
+	uint32_t fragment_size;
+	uint32_t fragments;
+	uint32_t duration_ms;
+	uint32_t freq_hz;
+	uint32_t data_size;
+} __attribute__((packed));
+
+struct sof_net_compr_rsp {
+	int32_t  status;
+	uint32_t card_id;
+	uint32_t device_id;
+	uint32_t direction;
+	uint32_t codec_id;
+	uint32_t fragment_size;
+	uint32_t fragments;
+	uint32_t min_fragment_size;
+	uint32_t max_fragment_size;
+	uint32_t num_codecs;
+	uint32_t codecs[16];
+	uint32_t bytes_transferred;
+	uint64_t rendered_samples;
+	uint32_t sampling_rate;
+	uint32_t data_size;
+} __attribute__((packed));
+
+/* -------------------------------------------------------------------------
+ * SOF_NET_OP_KCTL_LIST / KCTL_GET / KCTL_SET
+ * -------------------------------------------------------------------------
+ */
+enum sof_kctl_type {
+	SOF_KCTL_TYPE_NONE		= 0,
+	SOF_KCTL_TYPE_BOOLEAN		= 1,
+	SOF_KCTL_TYPE_INTEGER		= 2,
+	SOF_KCTL_TYPE_ENUMERATED	= 3,
+	SOF_KCTL_TYPE_BYTES		= 4,
+	SOF_KCTL_TYPE_IEC958		= 5,
+	SOF_KCTL_TYPE_INTEGER64		= 6,
+};
+
+enum sof_kctl_anchor_type {
+	SOF_KCTL_ANCHOR_CARD		= 0,
+	SOF_KCTL_ANCHOR_WIDGET		= 1,
+	SOF_KCTL_ANCHOR_EDGE		= 2,
+	SOF_KCTL_ANCHOR_PCM_FE		= 3,
+	SOF_KCTL_ANCHOR_DAI_BE		= 4,
+};
+
+#define SOF_KCTL_ACC_READ		(1U << 0)
+#define SOF_KCTL_ACC_WRITE		(1U << 1)
+#define SOF_KCTL_ACC_VOLATILE		(1U << 2)
+#define SOF_KCTL_ACC_TLV_READ		(1U << 3)
+#define SOF_KCTL_ACC_TLV_WRITE		(1U << 4)
+#define SOF_KCTL_ACC_INACTIVE		(1U << 5)
+#define SOF_KCTL_ACC_LOCK		(1U << 6)
+
+struct sof_net_kctl_list_req {
+	uint32_t card_id;
+	uint32_t api_backend;
+} __attribute__((packed));
+
+struct sof_net_kctl_list_hdr {
+	uint32_t card_id;
+	uint32_t api_used;
+	uint32_t num_kcontrols;
+} __attribute__((packed));
+
+struct sof_net_kctl_info {
+	uint32_t card_id;
+	uint32_t numid;
+	uint32_t iface;
+	char     iface_str[12];
+	uint32_t device;
+	uint32_t subdevice;
+	uint32_t index;
+	char     name[64];
+	uint32_t type;
+	char     type_str[12];
+	uint32_t access_mask;
+	char     access_str[12];
+	uint32_t count;
+	int64_t  min_val;
+	int64_t  max_val;
+	int64_t  step_val;
+	uint32_t has_db_scale;
+	int32_t  db_min_cdb;
+	int32_t  db_step_cdb;
+	uint32_t db_mute;
+	uint32_t num_enums;
+	char     enum_names[8][24];
+	int64_t  values[8];
+	uint32_t anchor_type;
+	int32_t  target_node_id;
+	int32_t  target_edge_id;
+	char     target_widget[64];
+	char     target_component[48];
+	int32_t  pipeline_id;
+	uint16_t layout_col;
+	uint16_t layout_row;
+} __attribute__((packed));
+
+struct sof_net_kctl_io_req {
+	uint32_t card_id;
+	uint32_t api_backend;
+	uint32_t numid;
+	uint32_t iface;
+	uint32_t device;
+	uint32_t index;
+	char     name[64];
+	uint32_t count;
+	int64_t  values[16];
+	uint32_t bytes_len;
+	uint8_t  bytes_data[512];
+} __attribute__((packed));
+
+struct sof_net_kctl_io_rsp {
+	int32_t  status;
+	uint32_t api_used;
+	struct sof_net_kctl_info info;
+	uint32_t bytes_len;
+	uint8_t  bytes_data[512];
+} __attribute__((packed));
+
+/* -------------------------------------------------------------------------
+ * SOF_NET_OP_WORKLOAD_SIM_CFG (0x0029)
+ * Configure and query accurate CPC/Frequency/SRAM-DRAM workload simulation
+ * -------------------------------------------------------------------------
+ */
+#define SOF_WORKLOAD_SIM_OP_GET			0
+#define SOF_WORKLOAD_SIM_OP_SET			1
+#define SOF_WORKLOAD_SIM_OP_MOD_SET		2
+#define SOF_WORKLOAD_SIM_OP_RESET_OVERRIDES	3
+
+struct sof_net_workload_sim_req {
+	uint32_t op;			/* SOF_WORKLOAD_SIM_OP_* */
+	uint32_t mode;			/* 0=OFF, 1=VIRTUAL, 2=REALTIME */
+	uint32_t default_mem_domain;	/* 0=SRAM, 1=DRAM */
+	uint32_t dram_factor_x100;	/* e.g. 160 = 1.60x */
+	uint32_t dram_cycles_per_word;	/* e.g. 2 cycles per 32-bit word */
+	uint32_t core_freq_hz[8];	/* 0 = unchanged, else target core frequency in Hz */
+	/* For SOF_WORKLOAD_SIM_OP_MOD_SET */
+	uint32_t target_comp_id;
+	uint32_t cpc_override;
+	uint32_t mem_domain_override;	/* 0=SRAM, 1=DRAM, 0xFF=AUTO */
+} __attribute__((packed));
+
+struct sof_net_workload_core_sim_stat {
+	uint32_t active;
+	uint32_t freq_hz;
+	uint32_t total_util_x100;
+	uint32_t ll_deadline_violations;
+	uint32_t ll_avg_kcps;
+	uint32_t ll_peak_kcps;
+	uint64_t ll_avg_exec_ns;
+	uint64_t ll_peak_exec_ns;
+	uint32_t dp_avg_kcps;
+	uint32_t dp_peak_kcps;
+	uint64_t dp_avg_exec_ns;
+	uint64_t dp_peak_exec_ns;
+} __attribute__((packed));
+
+struct sof_net_workload_sim_rsp {
+	int32_t  status;
+	uint32_t mode;
+	uint32_t default_mem_domain;
+	uint32_t sram_factor_x100;
+	uint32_t dram_factor_x100;
+	uint32_t dram_cycles_per_word;
+	uint32_t num_cores;
+	uint32_t num_overrides;
+	struct sof_net_workload_core_sim_stat cores[8];
+} __attribute__((packed));
+
+/* -------------------------------------------------------------------------
+ * SOF_NET_OP_SCHED_TRACE (0x002B)
+ * Query per-iteration LL/DP module scheduling timeline (start/complete/deadline)
+ * -------------------------------------------------------------------------
+ */
+#define SOF_SCHED_TRACE_OP_READ		0
+#define SOF_SCHED_TRACE_OP_CLEAR	1
+
+struct sof_net_sched_trace_req {
+	uint32_t op;			/* SOF_SCHED_TRACE_OP_READ or CLEAR */
+	uint32_t max_events;		/* Max events to return (0 = default 256, max 4096) */
+	uint32_t since_seq_id;		/* Return only events with seq_id > since_seq_id */
+	uint32_t filter_core_id;	/* 0xFFFFFFFF = all cores, else DSP core 0..7 */
+	uint32_t filter_pipe_id;	/* 0xFFFFFFFF = all pipelines, else pipeline ID */
+	uint32_t filter_comp_id;	/* 0xFFFFFFFF = all modules, else IPC4 comp_id */
+	uint32_t filter_domain;		/* 0xFFFFFFFF = all, 0 = LL_COPY, 1 = DP_SYNC, 2 = DP_RUN */
+} __attribute__((packed));
+
+struct sof_net_sched_trace_hdr {
+	int32_t  status;
+	uint32_t total_recorded_events;	/* Total scheduling events emitted since reset */
+	uint32_t avail_in_ring;		/* Events currently stored in trace ring buffer */
+	uint32_t returned_events;	/* Number of sof_net_sched_trace_entry items following */
+	uint32_t current_ll_tick;	/* Total 1ms LL ticks executed in current run */
+	uint32_t num_cores;		/* Configured DSP core count */
+	uint32_t sim_mode;		/* 0=HOST-MEASURED, 1=VIRTUAL-SIM, 2=REALTIME-PACED */
+	uint32_t core_freq_hz[8];	/* Active core clock frequencies in Hz */
+	char     platform_name[32];	/* Platform preset name (e.g. ptl, arl, tgl, nvl) */
+} __attribute__((packed));
+
+struct sof_net_sched_trace_entry {
+	uint32_t seq_id;
+	uint32_t ll_tick_nr;
+	uint32_t mod_iter_nr;
+	uint32_t comp_id;
+	uint16_t pipeline_id;
+	uint8_t  core_id;
+	uint8_t  event_type;		/* 0=LL_COPY, 1=DP_SYNC, 2=DP_RUN */
+	uint8_t  mem_domain;		/* 0=SRAM, 1=DRAM */
+	uint8_t  cpc_violation;
+	uint16_t period_us;
+	uint64_t start_cycles;
+	uint64_t complete_cycles;
+	uint32_t duration_cycles;
+	uint32_t cpc_budget;
+	uint64_t start_ns;
+	uint64_t complete_ns;
+	uint64_t deadline_ns;
+	uint64_t wall_start_ns;
+	uint64_t wall_complete_ns;
+	uint32_t bytes_in;
+	uint32_t bytes_out;
+	int32_t  ret_status;
+	char     widget_name[32];
+} __attribute__((packed));
+
+#endif /* _TESTBENCH_SOF_REMOTE_PROTO_H */
diff --git a/tools/testbench/include/testbench/topology_ipc4.h b/tools/testbench/include/testbench/topology_ipc4.h
index 0f5d0699e08f..5da5bb0c567d 100644
--- a/tools/testbench/include/testbench/topology_ipc4.h
+++ b/tools/testbench/include/testbench/topology_ipc4.h
@@ -18,6 +18,7 @@
  */
 #define TB_IPC4_MAX_MSG_SIZE	(MAILBOX_DSPBOX_SIZE + sizeof(struct ipc4_module_large_config))
 
+#define TB_COPIER_MODULE_ID		0x1
 #define TB_MIXIN_MODULE_ID		0x2
 #define TB_MIXOUT_MODULE_ID		0x3
 #define TB_PGA_MODULE_ID		0x6
diff --git a/tools/testbench/include/testbench/utils.h b/tools/testbench/include/testbench/utils.h
index a52688cb93dc..af50a91269b0 100644
--- a/tools/testbench/include/testbench/utils.h
+++ b/tools/testbench/include/testbench/utils.h
@@ -105,7 +105,13 @@ struct testbench_prm {
 	int copy_iterations;
 	bool copy_check;
 	int trace_level;
+	int sched_trace_limit;
 	int dynamic_pipeline_iterations;
+	int server_port;
+	bool server_wait;
+	char server_tmp_dir[64];
+	int64_t last_output_time_ns;
+	bool has_output_file;
 	char *pipeline_string;
 	int output_file_index;
 	int input_file_index;
@@ -142,6 +148,8 @@ struct testbench_prm {
 	struct tb_mq_desc ipc_rx;
 	int pcm_id;	// TODO: This needs to be cleaned up
 	struct tplg_pcm_info *pcm_info;
+	struct tplg_pipeline_list playback_pipeline_list;
+	struct tplg_pipeline_list capture_pipeline_list;
 	struct tb_config config[TB_MAX_CONFIG_COUNT];
 	int num_configs;
 	int period_frames;
@@ -171,12 +179,14 @@ int tb_pipeline_reset(struct ipc *ipc, struct pipeline *p);
 int tb_pipeline_start(struct ipc *ipc, struct pipeline *p);
 int tb_pipeline_stop(struct ipc *ipc, struct pipeline *p);
 int tb_read_controls(struct testbench_prm *tp, int64_t *sleep_ns);
+int tb_apply_control_line(struct testbench_prm *tp, const char *raw_line);
 int tb_set_bytes_control(struct testbench_prm *tp, struct tb_ctl *ctl, uint32_t *data);
 int tb_set_enum_control(struct testbench_prm *tp, struct tb_ctl *ctl, char *control_params);
 int tb_set_reset_state(struct testbench_prm *tp);
 int tb_set_mixer_control(struct testbench_prm *tp, struct tb_ctl *ctl, char *control_params);
 int tb_set_running_state(struct testbench_prm *tp);
 int tb_set_up_all_pipelines(struct testbench_prm *tp);
+int tb_configure_audio_params(struct testbench_prm *tp);
 int tb_setup(struct sof *sof, struct testbench_prm *tp);
 bool tb_is_pipeline_enabled(struct testbench_prm *tp, int pipeline_id);
 bool tb_schedule_pipeline_check_state(struct testbench_prm *tp);
diff --git a/tools/testbench/remote_server.c b/tools/testbench/remote_server.c
new file mode 100644
index 000000000000..0326c6e4136c
--- /dev/null
+++ b/tools/testbench/remote_server.c
@@ -0,0 +1,5638 @@
+// SPDX-License-Identifier: BSD-3-Clause
+//
+// Copyright(c) 2026 Intel Corporation. All rights reserved.
+//
+// Network Server Interface (sof-remote TCP protocol) for SOF Testbench
+
+#if !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+
+#include <arpa/inet.h>
+#include <dlfcn.h>
+#include <errno.h>
+#include <math.h>
+#include <netinet/in.h>
+#include <netinet/tcp.h>
+#include <pthread.h>
+#include <signal.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/socket.h>
+#include <sys/types.h>
+#include <time.h>
+#include <unistd.h>
+
+#include <sof/audio/module_adapter/module/generic.h>
+#include <sof/audio/component.h>
+#include <sof/audio/buffer.h>
+#include <sof/ipc/topology.h>
+#include <sof/ipc/driver.h>
+#include <sof/lib/cpu.h>
+#include <sof/list.h>
+#include <platform/lib/ll_schedule.h>
+#include <platform/lib/telemetry_sched.h>
+#include <ipc4/header.h>
+#include <ipc4/module.h>
+#include <ipc4/pipeline.h>
+#include <sof_versions.h>
+
+#include "testbench/sof_remote_proto.h"
+#include "testbench/remote_server.h"
+#include "testbench/topology_ipc4.h"
+#include "testbench/trace.h"
+#include "testbench/file.h"
+#include "testbench/file_ipc4.h"
+#include "testbench/utils.h"
+#include "../../src/audio/copier/copier.h"
+
+/* IPC4 BaseFW Large Config Parameter IDs */
+#define TB_IPC4_FW_CONFIG			0
+#define TB_IPC4_HW_CONFIG_GET			1
+#define TB_IPC4_MODULES_INFO_GET		9
+#define TB_IPC4_PIPELINE_LIST_INFO_GET		12
+#define TB_IPC4_MEMORY_STATE_INFO_GET		14
+#define TB_IPC4_POWER_STATE_INFO_GET		15
+#define TB_IPC4_PERF_MEASUREMENTS_STATE		17
+#define TB_IPC4_GLOBAL_PERF_DATA		18
+#define TB_IPC4_EXTENDED_GLOBAL_PERF_DATA	30
+
+/* PCM Capture Ring Buffer Capacity (in S16_LE samples: 48000 * 2ch * 2 sec = 192000 samples) */
+#define TB_PCM_CAPTURE_RING_SAMPLES		192000
+
+struct system_tick_info_wire {
+	uint32_t count;
+	uint32_t last_time_elapsed;
+	uint32_t max_time_elapsed;
+	uint32_t last_ccount;
+	uint32_t avg_utilization;
+	uint32_t peak_utilization;
+	uint32_t peak_utilization_4k;
+	uint32_t peak_utilization_8k;
+} __attribute__((packed));
+
+struct perf_data_item_comp_wire {
+	uint32_t resource_id;
+	uint32_t power_mode : 1;
+	uint32_t is_removed : 1;
+	uint32_t rsvd       : 30;
+	uint32_t peak_kcps;
+	uint32_t avg_kcps;
+	uint64_t total_iteration_count;
+	uint64_t total_cycles_consumed;
+} __attribute__((packed));
+
+static pthread_mutex_t g_tb_lock = PTHREAD_MUTEX_INITIALIZER;
+static pthread_cond_t g_tb_cond = PTHREAD_COND_INITIALIZER;
+static pthread_mutex_t g_pcm_ring_lock = PTHREAD_MUTEX_INITIALIZER;
+
+static struct testbench_prm *g_tp;
+static int g_srv_fd = -1;
+static pthread_t g_accept_thread;
+static volatile bool g_srv_running;
+static volatile bool g_quit_requested;
+static volatile bool g_dsp_paused;
+static volatile int g_step_ticks_remaining;
+static __thread bool g_in_remote_rpc;
+static uint32_t g_perf_meas_state = 2; /* 2 = STARTED by default */
+
+/* Per-core telemetry state */
+static struct system_tick_info_wire g_core_ticks[CONFIG_CORE_COUNT];
+static uint64_t g_total_ticks;
+
+/* Emulated SRAM Windows */
+static uint8_t g_win0_fw_regs[4096];
+static uint8_t g_win1_outbox[4096];
+static uint8_t g_win2_debug[65536];
+static uint8_t g_win3_perf[4096];
+static char g_last_shell_output[4096];
+static uint32_t g_shell_seq;
+
+/* Tone generator & PCM capture state */
+static volatile bool g_tone_running;
+static char g_pcm_device[32] = "hw:0,0";
+static uint32_t g_tone_freq_hz = 1000;
+static uint32_t g_pcm_rate = 48000;
+static uint32_t g_pcm_channels = 2;
+static uint32_t g_pcm_api_used = SOF_AUDIO_API_ALSA;
+static uint32_t g_pcm_format = SOF_PCM_FMT_S16_LE;
+static uint32_t g_pcm_xruns;
+static uint64_t g_pcm_frames_processed;
+static uint32_t g_pcm_last_rms;
+static uint32_t g_pcm_last_peak;
+static int16_t g_pcm_capture_ring[TB_PCM_CAPTURE_RING_SAMPLES];
+static size_t g_pcm_ring_write_idx;
+static size_t g_pcm_ring_avail;
+
+/* Cached Kcontrol state for SOF_NET_OP_KCTL_LIST / GET / SET */
+#define TB_REMOTE_MAX_KCTLS 64
+struct tb_kctl_shadow {
+	bool initialized;
+	int64_t values[8];
+	uint32_t bytes_len;
+	uint8_t bytes_data[512];
+};
+static struct tb_kctl_shadow g_kctl_shadow[TB_REMOTE_MAX_KCTLS];
+
+/* Dynamically loaded LLEXT / shared-library modules */
+#define TB_MAX_LOADED_LLEXTS 16
+struct tb_loaded_llext {
+	bool active;
+	uint32_t lib_id;
+	uint32_t data_size;
+	char name[16];
+	char path[128];
+	void *dl_handle;
+};
+static struct tb_loaded_llext g_loaded_llexts[TB_MAX_LOADED_LLEXTS];
+
+static int read_exact(int fd, void *buf, size_t len)
+{
+	uint8_t *p = (uint8_t *)buf;
+	size_t rem = len;
+
+	while (rem > 0) {
+		ssize_t n = recv(fd, p, rem, 0);
+
+		if (n <= 0) {
+			if (n < 0 && errno == EINTR)
+				continue;
+			return -1;
+		}
+		p += n;
+		rem -= (size_t)n;
+	}
+	return 0;
+}
+
+static int write_exact(int fd, const void *buf, size_t len)
+{
+	const uint8_t *p = (const uint8_t *)buf;
+	size_t rem = len;
+
+	while (rem > 0) {
+		ssize_t n = send(fd, p, rem, MSG_NOSIGNAL);
+
+		if (n <= 0) {
+			if (n < 0 && errno == EINTR)
+				continue;
+			return -1;
+		}
+		p += n;
+		rem -= (size_t)n;
+	}
+	return 0;
+}
+
+static int send_reply(int sock, uint16_t opcode, uint32_t req_id,
+		      int32_t status, const void *payload, uint32_t payload_len)
+{
+	struct sof_net_hdr hdr = {
+		.magic       = SOF_NET_MAGIC,
+		.version     = SOF_NET_VERSION,
+		.opcode      = opcode,
+		.req_id      = req_id,
+		.payload_len = payload ? payload_len : 0,
+		.status      = status,
+	};
+
+	if (write_exact(sock, &hdr, sizeof(hdr)) < 0)
+		return -1;
+	if (payload && payload_len > 0) {
+		if (write_exact(sock, payload, payload_len) < 0)
+			return -1;
+	}
+	return 0;
+}
+
+/* -------------------------------------------------------------------------
+ * PCM Output Recording & Tone State Hooks (called from file.c)
+ * -------------------------------------------------------------------------
+ */
+
+bool tb_remote_is_tone_active(uint32_t *freq_hz)
+{
+	if (!g_tone_running)
+		return false;
+	if (freq_hz)
+		*freq_hz = g_tone_freq_hz ? g_tone_freq_hz : 1000;
+	return true;
+}
+
+void tb_remote_record_output_samples_s16(const int16_t *samples, size_t count,
+					 int channels, int rate)
+{
+	double sum_sq = 0.0;
+	int16_t peak = 0;
+	size_t i;
+
+	if (!samples || count == 0)
+		return;
+
+	pthread_mutex_lock(&g_pcm_ring_lock);
+	if (channels > 0)
+		g_pcm_channels = (uint32_t)channels;
+	if (rate > 0)
+		g_pcm_rate = (uint32_t)rate;
+
+	for (i = 0; i < count; i++) {
+		int16_t v = samples[i];
+		int16_t av = v < 0 ? -v : v;
+
+		if (av > peak)
+			peak = av;
+		sum_sq += (double)v * (double)v;
+
+		g_pcm_capture_ring[g_pcm_ring_write_idx] = v;
+		g_pcm_ring_write_idx = (g_pcm_ring_write_idx + 1) % TB_PCM_CAPTURE_RING_SAMPLES;
+		if (g_pcm_ring_avail < TB_PCM_CAPTURE_RING_SAMPLES)
+			g_pcm_ring_avail++;
+	}
+
+	g_pcm_last_rms = (uint32_t)sqrt(sum_sq / (double)count);
+	g_pcm_last_peak = (uint32_t)peak;
+	if (g_pcm_channels > 0)
+		g_pcm_frames_processed += count / g_pcm_channels;
+	pthread_mutex_unlock(&g_pcm_ring_lock);
+}
+
+void tb_remote_record_output_samples_s32(const int32_t *samples, size_t count,
+					 int channels, int rate, int shift_to_s16)
+{
+	double sum_sq = 0.0;
+	int16_t peak = 0;
+	size_t i;
+
+	if (!samples || count == 0)
+		return;
+
+	pthread_mutex_lock(&g_pcm_ring_lock);
+	if (channels > 0)
+		g_pcm_channels = (uint32_t)channels;
+	if (rate > 0)
+		g_pcm_rate = (uint32_t)rate;
+
+	for (i = 0; i < count; i++) {
+		int32_t s32 = samples[i] >> shift_to_s16;
+		int16_t v;
+		int16_t av;
+
+		if (s32 > 32767)
+			s32 = 32767;
+		else if (s32 < -32768)
+			s32 = -32768;
+		v = (int16_t)s32;
+		av = v == -32768 ? 32767 : (v < 0 ? -v : v);
+		if (av > peak)
+			peak = av;
+		sum_sq += (double)v * (double)v;
+
+		g_pcm_capture_ring[g_pcm_ring_write_idx] = v;
+		g_pcm_ring_write_idx = (g_pcm_ring_write_idx + 1) % TB_PCM_CAPTURE_RING_SAMPLES;
+		if (g_pcm_ring_avail < TB_PCM_CAPTURE_RING_SAMPLES)
+			g_pcm_ring_avail++;
+	}
+
+	g_pcm_last_rms = (uint32_t)sqrt(sum_sq / (double)count);
+	g_pcm_last_peak = (uint32_t)peak;
+	if (g_pcm_channels > 0)
+		g_pcm_frames_processed += count / g_pcm_channels;
+	pthread_mutex_unlock(&g_pcm_ring_lock);
+}
+
+/* -------------------------------------------------------------------------
+ * Emulated SRAM Windows, Device Info & Telemetry Synthesis
+ * -------------------------------------------------------------------------
+ */
+
+static struct tplg_comp_info *find_comp_info_by_ipc_id(struct testbench_prm *tp, uint32_t ipc_id)
+{
+	struct list_item *item;
+	int i;
+
+	if (!tp)
+		return NULL;
+
+	if (tp->widget_list.next) {
+		list_for_item(item, &tp->widget_list) {
+			struct tplg_comp_info *ci = container_of(item, struct tplg_comp_info, item);
+			uint32_t cid = (uint32_t)IPC4_COMP_ID(ci->module_id, ci->instance_id);
+
+			if (cid == ipc_id)
+				return ci;
+		}
+		list_for_item(item, &tp->widget_list) {
+			struct tplg_comp_info *ci = container_of(item, struct tplg_comp_info, item);
+
+			if ((uint32_t)ci->id == ipc_id)
+				return ci;
+		}
+	}
+
+	if (!tp->info)
+		return NULL;
+
+	for (i = 0; i < tp->info_elems; i++) {
+		uint32_t cid = (uint32_t)IPC4_COMP_ID(tp->info[i].module_id,
+						      tp->info[i].instance_id);
+
+		if (cid == ipc_id)
+			return &tp->info[i];
+	}
+	for (i = 0; i < tp->info_elems; i++) {
+		if ((uint32_t)tp->info[i].id == ipc_id)
+			return &tp->info[i];
+	}
+	return NULL;
+}
+
+/* Cached widget names so post-run sched-trace / sched-telem queries resolve names */
+struct tb_cached_widget_name {
+	uint32_t comp_id;
+	char name[32];
+};
+static struct tb_cached_widget_name g_cached_widget_names[128];
+static uint32_t g_num_cached_widget_names;
+
+static void cache_active_widget_names(struct testbench_prm *tp)
+{
+	struct list_item *item;
+	int i;
+
+	if (!tp)
+		return;
+
+	if (tp->widget_list.next && !list_is_empty(&tp->widget_list)) {
+		g_num_cached_widget_names = 0;
+		list_for_item(item, &tp->widget_list) {
+			struct tplg_comp_info *ci = container_of(item, struct tplg_comp_info, item);
+			uint32_t cid = (uint32_t)IPC4_COMP_ID(ci->module_id, ci->instance_id);
+
+			if (!ci->name || g_num_cached_widget_names >= 128)
+				continue;
+			g_cached_widget_names[g_num_cached_widget_names].comp_id = cid;
+			snprintf(g_cached_widget_names[g_num_cached_widget_names].name,
+				 sizeof(g_cached_widget_names[0].name), "%s", ci->name);
+			g_num_cached_widget_names++;
+		}
+	} else if (tp->info && tp->info_elems > 0) {
+		g_num_cached_widget_names = 0;
+		for (i = 0; i < tp->info_elems && g_num_cached_widget_names < 128; i++) {
+			uint32_t cid = (uint32_t)IPC4_COMP_ID(tp->info[i].module_id,
+							      tp->info[i].instance_id);
+			if (!tp->info[i].name)
+				continue;
+			g_cached_widget_names[g_num_cached_widget_names].comp_id = cid;
+			snprintf(g_cached_widget_names[g_num_cached_widget_names].name,
+				 sizeof(g_cached_widget_names[0].name), "%s", tp->info[i].name);
+			g_num_cached_widget_names++;
+		}
+	}
+}
+
+static const char *resolve_comp_widget_name(struct testbench_prm *tp, uint32_t ipc_id)
+{
+	struct tplg_comp_info *ci = find_comp_info_by_ipc_id(tp, ipc_id);
+	uint32_t i;
+
+	if (ci && ci->name)
+		return ci->name;
+	for (i = 0; i < g_num_cached_widget_names; i++) {
+		if (g_cached_widget_names[i].comp_id == ipc_id &&
+		    g_cached_widget_names[i].name[0])
+			return g_cached_widget_names[i].name;
+	}
+	return "comp";
+}
+
+static void populate_cdev_info(struct testbench_prm *tp, struct sof_cdev_info *info)
+{
+	struct host_sched_telemetry *st = host_telem_get();
+	const char *base_tplg = "";
+	int i;
+
+	memset(info, 0, sizeof(*info));
+	info->abi_version = SOF_CDEV_ABI_VERSION;
+#if CONFIG_IPC_MAJOR_4
+	info->ipc_type = 1;
+#else
+	info->ipc_type = 0;
+#endif
+	info->fw_state = 7; /* SOF_FW_BOOT_COMPLETE */
+	info->dsp_power_state = g_dsp_paused ? 4 : 1; /* 1=D0, 4=D3 */
+	info->pm_runtime_active = g_dsp_paused ? 0 : 1;
+	info->num_cores = st ? st->hw_cfg.num_cores : CONFIG_CORE_COUNT;
+	info->enabled_cores_mask = arch_cpu_enabled_cores();
+	info->max_payload_size = SOF_IPC_MSG_MAX_SIZE;
+	info->fw_ver_major = SOF_MAJOR;
+	info->fw_ver_minor = SOF_MINOR;
+	info->fw_ver_micro = SOF_MICRO;
+	info->fw_ver_build = SOF_BUILD;
+	info->hw_ip_version = (st && st->hw_cfg.hw_ip_version) ? st->hw_cfg.hw_ip_version : 4;
+	snprintf(info->platform, sizeof(info->platform), "%s",
+		 (st && st->hw_cfg.platform_name[0]) ? st->hw_cfg.platform_name : "sof-testbench4");
+
+	if (tp && tp->tplg_file) {
+		const char *slash = strrchr(tp->tplg_file, '/');
+
+		base_tplg = slash ? (slash + 1) : tp->tplg_file;
+	}
+	snprintf(info->fw_filename, sizeof(info->fw_filename), "%s", base_tplg);
+
+	/* 4 SRAM windows */
+	info->windows[0].win_id = SOF_CDEV_WIN_FW_REGS;
+	info->windows[0].bar_offset = 0x000000;
+	info->windows[0].size = sizeof(g_win0_fw_regs);
+	info->windows[0].flags = 1;
+
+	info->windows[1].win_id = SOF_CDEV_WIN_OUTBOX;
+	info->windows[1].bar_offset = 0x001000;
+	info->windows[1].size = sizeof(g_win1_outbox);
+	info->windows[1].flags = 1;
+
+	info->windows[2].win_id = SOF_CDEV_WIN_DEBUG;
+	info->windows[2].bar_offset = 0x010000;
+	info->windows[2].size = sizeof(g_win2_debug);
+	info->windows[2].flags = 1;
+
+	info->windows[3].win_id = SOF_CDEV_WIN_PERF;
+	info->windows[3].bar_offset = 0x020000;
+	info->windows[3].size = sizeof(g_win3_perf);
+	info->windows[3].flags = 1;
+
+	/* Window 2 Debug Slots */
+	for (i = 0; i < SOF_CDEV_MAX_DEBUG_SLOTS; i++) {
+		info->debug_slots[i].slot_index = i;
+		info->debug_slots[i].win_offset = (i + 1) * 4096;
+		info->debug_slots[i].bar_offset = 0x010000 + (i + 1) * 4096;
+		info->debug_slots[i].size = 4096;
+	}
+
+	info->debug_slots[0].res_id = 0x00000001;
+	info->debug_slots[0].type = SOF_CDEV_SLOT_TELEMETRY;
+	info->debug_slots[0].vma = 0xA0011000;
+
+	info->debug_slots[1].res_id = 0x00000002;
+	info->debug_slots[1].type = SOF_CDEV_SLOT_SHELL;
+	info->debug_slots[1].vma = 0xA0012000;
+
+	info->debug_slots[2].res_id = 0x00000003;
+	info->debug_slots[2].type = SOF_CDEV_SLOT_DEBUG_LOG;
+	info->debug_slots[2].vma = 0xA0013000;
+}
+
+static uint32_t build_modules_info_tlv(struct testbench_prm *tp, uint8_t *out, uint32_t cap)
+{
+	/*
+	 * Matches TelemetryParser.parse_modules_info_tlv in tools/softop/backend.py:
+	 *   uint32_t mod_count
+	 *   followed by mod_count * 116-byte sof_man_module entries:
+	 *     bytes 0..1: uint16_t module_id
+	 *     bytes 2..3: uint16_t state_flags
+	 *     bytes 4..11: char name[8]
+	 */
+	uint32_t seen_mod_ids[64];
+	char seen_names[64][8];
+	uint32_t count = 0;
+	int i;
+
+	if (cap < 4)
+		return 0;
+
+	memset(out, 0, cap);
+
+	/* Always include module_id 0 = basefw */
+	seen_mod_ids[count] = 0;
+	memset(seen_names[count], 0, 8);
+	memcpy(seen_names[count], "basefw", 6);
+	count++;
+
+	if (tp && tp->widget_list.next) {
+		struct list_item *item;
+
+		list_for_item(item, &tp->widget_list) {
+			struct tplg_comp_info *ci = container_of(item, struct tplg_comp_info, item);
+			uint32_t mid = (uint32_t)ci->module_id;
+			bool dup = false;
+			uint32_t j;
+
+			if (count >= 64)
+				break;
+			if (mid == 0 || !ci->name)
+				continue;
+
+			for (j = 0; j < count; j++) {
+				if (seen_mod_ids[j] == mid) {
+					dup = true;
+					break;
+				}
+			}
+			if (dup)
+				continue;
+
+			seen_mod_ids[count] = mid;
+			memset(seen_names[count], 0, 8);
+			const char *dot = strchr(ci->name, '.');
+			size_t nlen = dot ? (size_t)(dot - ci->name) : strlen(ci->name);
+
+			if (nlen > 7)
+				nlen = 7;
+			memcpy(seen_names[count], ci->name, nlen);
+			count++;
+		}
+	} else if (tp && tp->info) {
+		for (i = 0; i < tp->info_elems && count < 64; i++) {
+			struct tplg_comp_info *ci = &tp->info[i];
+			uint32_t mid = (uint32_t)ci->module_id;
+			bool dup = false;
+			uint32_t j;
+
+			if (mid == 0 || !ci->name)
+				continue;
+
+			for (j = 0; j < count; j++) {
+				if (seen_mod_ids[j] == mid) {
+					dup = true;
+					break;
+				}
+			}
+			if (dup)
+				continue;
+
+			seen_mod_ids[count] = mid;
+			memset(seen_names[count], 0, 8);
+			/* Extract prefix before '.' from widget name (e.g. "gain.1.1" -> "gain") */
+			const char *dot = strchr(ci->name, '.');
+			size_t nlen = dot ? (size_t)(dot - ci->name) : strlen(ci->name);
+
+			if (nlen > 7)
+				nlen = 7;
+			memcpy(seen_names[count], ci->name, nlen);
+			count++;
+		}
+	}
+
+	/* Include any dynamically loaded LLEXT modules */
+	for (i = 0; i < TB_MAX_LOADED_LLEXTS && count < 64; i++) {
+		if (!g_loaded_llexts[i].active)
+			continue;
+		seen_mod_ids[count] = 0x100 + g_loaded_llexts[i].lib_id;
+		memset(seen_names[count], 0, 8);
+		strncpy(seen_names[count], g_loaded_llexts[i].name, 7);
+		count++;
+	}
+
+	uint32_t total_len = 4 + count * 116;
+
+	if (total_len > cap) {
+		count = (cap - 4) / 116;
+		total_len = 4 + count * 116;
+	}
+
+	memcpy(out, &count, sizeof(uint32_t));
+	for (uint32_t idx = 0; idx < count; idx++) {
+		uint8_t *ent = out + 4 + idx * 116;
+		uint16_t mid16 = (uint16_t)seen_mod_ids[idx];
+		uint16_t flg16 = 1;
+
+		memcpy(ent + 0, &mid16, 2);
+		memcpy(ent + 2, &flg16, 2);
+		memcpy(ent + 4, seen_names[idx], 8);
+	}
+
+	return total_len;
+}
+
+static uint32_t build_power_state_tlv(uint8_t *out, uint32_t cap)
+{
+	/*
+	 * TLV 0: IPC4_ACTIVE_CORES_MASK (uint32_t)
+	 * TLV 1: IPC4_CORE_KCPS (uint32_t[num_cores])
+	 */
+	struct host_sched_telemetry *st = host_telem_get();
+	uint32_t num_cores = (st && st->hw_cfg.num_cores <= CONFIG_CORE_COUNT) ?
+			     st->hw_cfg.num_cores : CONFIG_CORE_COUNT;
+	uint32_t core_kcps[CONFIG_CORE_COUNT];
+	uint32_t mask = arch_cpu_enabled_cores();
+	uint32_t off = 0;
+	uint32_t c;
+
+	if (cap < 8 + 4 + 8 + num_cores * sizeof(uint32_t))
+		return 0;
+
+	for (c = 0; c < num_cores; c++)
+		core_kcps[c] = g_core_ticks[c].avg_utilization;
+
+	/* Tuple 0: type=0, len=4, val=mask */
+	uint32_t t0_type = 0, t0_len = 4;
+
+	memcpy(out + off, &t0_type, 4); off += 4;
+	memcpy(out + off, &t0_len, 4);  off += 4;
+	memcpy(out + off, &mask, 4);    off += 4;
+
+	/* Tuple 1: type=1, len=num_cores*4, val=core_kcps */
+	uint32_t t1_type = 1, t1_len = num_cores * sizeof(uint32_t);
+
+	memcpy(out + off, &t1_type, 4);       off += 4;
+	memcpy(out + off, &t1_len, 4);        off += 4;
+	memcpy(out + off, core_kcps, t1_len); off += t1_len;
+
+	return off;
+}
+
+static uint32_t build_memory_state_tlv(struct testbench_prm *tp, uint8_t *out, uint32_t cap)
+{
+	/*
+	 * Matches TelemetryParser.parse_memory_state_tlv in tools/softop/backend.py:
+	 *   TLV type 1 (HPSRAM) and TLV type 0 (LPSRAM)
+	 *   Payload layout:
+	 *     uint32_t free_phys_pages
+	 *     uint32_t ebb_dwords (1 or 3 depending on bank_count)
+	 *     uint32_t pgctl_masks[ebb_dwords] (bit=0 powered ON, bit=1 gated)
+	 *     uint32_t bank_count (configured HPSRAM/LPSRAM 64 KB EBB banks)
+	 *     uint16_t bank_alloc_mask[bank_count]
+	 */
+	struct host_sched_telemetry *st = host_telem_get();
+	struct tb_heap_usage_record recs[64];
+	int rec_count = 0;
+	size_t total_heap_bytes = 0;
+	int i;
+
+	if (tp) {
+		memset(recs, 0, sizeof(recs));
+		tb_collect_heap_usage(tp, recs, &rec_count);
+		for (i = 0; i < rec_count && i < 64; i++)
+			total_heap_bytes += recs[i].heap_max;
+	}
+	if (st && st->hw_cfg.hpsram_used_bytes > total_heap_bytes)
+		total_heap_bytes = st->hw_cfg.hpsram_used_bytes;
+
+	uint32_t off = 0;
+	size_t hp_total_bytes = (st && st->hw_cfg.hpsram_size_bytes >= 65536UL) ?
+				st->hw_cfg.hpsram_size_bytes : (16UL * 65536UL);
+	uint32_t hp_banks = (uint32_t)((hp_total_bytes + 65535UL) / 65536UL);
+	uint32_t hp_used_banks = (uint32_t)((total_heap_bytes + 65535UL) / 65536UL);
+
+	if (hp_banks > 96)
+		hp_banks = 96;
+	if (hp_used_banks == 0 && total_heap_bytes > 0)
+		hp_used_banks = 1;
+	if (hp_used_banks < 1)
+		hp_used_banks = 1;
+	if (hp_used_banks > hp_banks)
+		hp_used_banks = hp_banks;
+
+	uint32_t hp_ebb_dwords = (hp_banks + 31U) / 32U;
+	uint32_t hp_free_pages = (hp_banks - hp_used_banks) * 16U;
+	uint32_t hp_val_len = 12U + hp_ebb_dwords * 4U + hp_banks * sizeof(uint16_t);
+
+	if (off + 8U + hp_val_len <= cap) {
+		uint32_t ttype = 1;
+
+		memcpy(out + off, &ttype, 4);          off += 4;
+		memcpy(out + off, &hp_val_len, 4);     off += 4;
+		memcpy(out + off, &hp_free_pages, 4);  off += 4;
+		memcpy(out + off, &hp_ebb_dwords, 4);  off += 4;
+		for (uint32_t d = 0; d < hp_ebb_dwords; d++) {
+			uint32_t pgctl = 0xFFFFFFFFU;
+
+			for (uint32_t bit = 0; bit < 32U; bit++) {
+				if (d * 32U + bit < hp_used_banks)
+					pgctl &= ~(1U << bit);
+			}
+			memcpy(out + off, &pgctl, 4);
+			off += 4;
+		}
+		memcpy(out + off, &hp_banks, 4);       off += 4;
+		for (uint32_t b = 0; b < hp_banks; b++) {
+			uint16_t amask = (b < hp_used_banks) ? 0xFFFF : 0x0000;
+
+			memcpy(out + off, &amask, 2);
+			off += 2;
+		}
+	}
+
+	/* Build LPSRAM (ttype = 0) */
+	size_t lp_total_bytes = (st && st->hw_cfg.lpsram_size_bytes >= 65536UL) ?
+				st->hw_cfg.lpsram_size_bytes : 65536UL;
+	size_t lp_used_bytes = st ? st->hw_cfg.lpsram_used_bytes : 0;
+	uint32_t lp_banks = (uint32_t)((lp_total_bytes + 65535UL) / 65536UL);
+	uint32_t lp_used_banks = (uint32_t)((lp_used_bytes + 65535UL) / 65536UL);
+
+	if (lp_banks > 32)
+		lp_banks = 32;
+	if (lp_used_banks > lp_banks)
+		lp_used_banks = lp_banks;
+
+	uint32_t lp_pgctl = (lp_used_banks >= 32) ? 0U : ~((1U << lp_used_banks) - 1U);
+	uint32_t lp_free_pages = (lp_banks - lp_used_banks) * 16U;
+	uint32_t lp_ebb_dwords = 1;
+	uint32_t lp_val_len = 16 + lp_banks * sizeof(uint16_t);
+
+	if (off + 8 + lp_val_len <= cap) {
+		uint32_t ttype = 0;
+
+		memcpy(out + off, &ttype, 4);          off += 4;
+		memcpy(out + off, &lp_val_len, 4);     off += 4;
+		memcpy(out + off, &lp_free_pages, 4);  off += 4;
+		memcpy(out + off, &lp_ebb_dwords, 4);  off += 4;
+		memcpy(out + off, &lp_pgctl, 4);       off += 4;
+		memcpy(out + off, &lp_banks, 4);       off += 4;
+		for (uint32_t b = 0; b < lp_banks; b++) {
+			uint16_t amask = (b < lp_used_banks) ? 0xFFFF : 0x0000;
+
+			memcpy(out + off, &amask, 2);
+			off += 2;
+		}
+	}
+
+	return off;
+}
+
+static uint32_t build_hw_config_tlv(uint8_t *out, uint32_t cap)
+{
+	/*
+	 * IPC4_HW_CONFIG_GET (param_id = 1) TLVs:
+	 *   0: VER_HW_CFG          (uint32_t)
+	 *   1: DSP_CORES           (uint32_t)
+	 *   2: MEM_PAGE_BYTES      (uint32_t = 4096)
+	 *   3: TOTAL_PHYS_MEM_PAGES(uint32_t)
+	 *   6: EBB_SIZE_BYTES      (uint32_t = 65536)
+	 *   7: EBB_TOTAL_COUNT     (uint32_t = HPSRAM banks)
+	 *   9: HP_EBB_COUNT        (uint32_t = HPSRAM banks)
+	 *  10: LP_EBB_COUNT        (uint32_t = LPSRAM banks)
+	 *  11: DSP_CLOCK_HZ        (uint32_t = core 0 freq Hz)
+	 */
+	struct host_sched_telemetry *st = host_telem_get();
+	uint32_t hw_ver = st ? st->hw_cfg.hw_ip_version : 4;
+	uint32_t cores = st ? st->hw_cfg.num_cores : CONFIG_CORE_COUNT;
+	uint32_t page_sz = 4096;
+	uint32_t ebb_sz = 65536;
+	uint32_t hp_ebbs = st ? (uint32_t)(st->hw_cfg.hpsram_size_bytes / 65536UL) : 47;
+	uint32_t lp_ebbs = st ? (uint32_t)(st->hw_cfg.lpsram_size_bytes / 65536UL) : 1;
+	uint32_t tot_pages = (hp_ebbs + lp_ebbs) * 16U;
+	uint32_t clk_hz = st ? st->sim_cfg.core_freq_hz[0] : (uint32_t)TB_DSP_NOMINAL_HZ;
+	const uint32_t tuples[][2] = {
+		{ 0, hw_ver },
+		{ 1, cores },
+		{ 2, page_sz },
+		{ 3, tot_pages },
+		{ 6, ebb_sz },
+		{ 7, hp_ebbs },
+		{ 9, hp_ebbs },
+		{ 10, lp_ebbs },
+		{ 11, clk_hz },
+	};
+	uint32_t off = 0;
+	size_t i;
+
+	for (i = 0; i < ARRAY_SIZE(tuples); i++) {
+		uint32_t t = tuples[i][0];
+		uint32_t l = 4;
+		uint32_t v = tuples[i][1];
+
+		if (off + 12 > cap)
+			break;
+		memcpy(out + off, &t, 4); off += 4;
+		memcpy(out + off, &l, 4); off += 4;
+		memcpy(out + off, &v, 4); off += 4;
+	}
+	return off;
+}
+
+static uint32_t build_ext_perf_tlv(struct testbench_prm *tp, uint8_t *out, uint32_t cap)
+{
+	/*
+	 * Builds uint32_t count + struct perf_data_item_comp_wire[count] (32-byte stride)
+	 * Also populates g_win3_perf for Window 3 reads.
+	 */
+	struct ipc *ipc = sof_get() ? sof_get()->ipc : NULL;
+	struct list_item *clist;
+	uint32_t count = 0;
+	uint32_t max_items = (cap > 4) ? ((cap - 4) / sizeof(struct perf_data_item_comp_wire)) : 0;
+	struct perf_data_item_comp_wire *items = (struct perf_data_item_comp_wire *)(out + 4);
+	struct perf_data_item_comp_wire *win3_items = (struct perf_data_item_comp_wire *)g_win3_perf;
+	uint32_t win3_count = 0;
+	uint32_t enabled_mask = arch_cpu_enabled_cores();
+	int c;
+
+	if (max_items == 0)
+		return 0;
+
+	memset(out, 0, cap);
+	memset(g_win3_perf, 0, sizeof(g_win3_perf));
+
+	/* 1. Per-core summary items (module_id == 0, instance_id == core_id) */
+	struct host_sched_telemetry *st = host_telem_get();
+
+	for (c = 0; c < CONFIG_CORE_COUNT && count < max_items; c++) {
+		if (!(enabled_mask & BIT(c)) && !(st && st->cores[c].active))
+			continue;
+		struct perf_data_item_comp_wire *it = &items[count++];
+
+		it->resource_id = IPC4_COMP_ID(0, c);
+		it->power_mode = 0;
+		it->is_removed = 0;
+		if (st && st->cores[c].active) {
+			it->avg_kcps = st->cores[c].ll_avg_kcps + st->cores[c].dp_avg_kcps;
+			it->peak_kcps = st->cores[c].ll_peak_kcps + st->cores[c].dp_peak_kcps;
+			it->total_iteration_count = st->cores[c].ll_tick_count +
+						    st->cores[c].dp_run_count;
+			it->total_cycles_consumed = st->cores[c].ll_total_cycles +
+						    st->cores[c].dp_total_cycles;
+		} else {
+			it->avg_kcps = g_core_ticks[c].avg_utilization;
+			it->peak_kcps = g_core_ticks[c].peak_utilization;
+			it->total_iteration_count = g_core_ticks[c].count;
+			it->total_cycles_consumed = (uint64_t)g_core_ticks[c].count *
+						    g_core_ticks[c].last_time_elapsed;
+		}
+	}
+
+	/* 2. Per-component items from active SOF components & real telemetry */
+	if (ipc) {
+		list_for_item(clist, &ipc->comp_list) {
+			struct ipc_comp_dev *icd = container_of(clist, struct ipc_comp_dev, list);
+
+			if (icd->type != COMP_TYPE_COMPONENT || !icd->cd)
+				continue;
+			if (count >= max_items)
+				break;
+
+			struct perf_data_item_comp_wire *it = &items[count++];
+			struct host_mod_telem *mt = NULL;
+			uint32_t i;
+
+			if (st) {
+				for (i = 0; i < st->num_mods; i++) {
+					if (st->mods[i].active &&
+					    st->mods[i].comp_id == icd->id) {
+						mt = &st->mods[i];
+						break;
+					}
+				}
+			}
+
+			it->resource_id = icd->id;
+			it->power_mode = (icd->cd->ipc_config.proc_domain ==
+					  COMP_PROCESSING_DOMAIN_DP) ? 1 : 0;
+			it->is_removed = 0;
+			if (mt && mt->iterations > 0) {
+				it->avg_kcps = mt->avg_kcps;
+				it->peak_kcps = mt->peak_kcps;
+				it->total_iteration_count = mt->iterations;
+				it->total_cycles_consumed = mt->total_cycles;
+			} else {
+				uint32_t core = icd->core < CONFIG_CORE_COUNT ? icd->core : 0;
+				uint32_t iters = g_core_ticks[core].count;
+
+				it->avg_kcps = 100;
+				it->peak_kcps = 200;
+				it->total_iteration_count = iters;
+				it->total_cycles_consumed = (uint64_t)iters * it->avg_kcps;
+			}
+
+			if ((win3_count + 1) * sizeof(*win3_items) <= sizeof(g_win3_perf))
+				win3_items[win3_count++] = *it;
+		}
+	}
+	(void)tp;
+
+	memcpy(out, &count, sizeof(uint32_t));
+	return 4 + count * sizeof(struct perf_data_item_comp_wire);
+}
+
+static void refresh_emulated_windows(struct testbench_prm *tp)
+{
+	/* Window 0: FW Regs */
+	uint32_t *r32 = (uint32_t *)g_win0_fw_regs;
+
+	r32[0] = 0x00000007U; /* fw_status = BOOT_COMPLETE */
+	r32[1] = 0x00000000U; /* lec */
+	r32[2] = g_dsp_paused ? 0x00000004U : 0x00000001U; /* fps */
+	r32[3] = 0x00000000U; /* lnec */
+	r32[4] = (uint32_t)g_total_ticks; /* ltr */
+
+	/* Window 2 Slot 0 (offset 4096): Telemetry Slot */
+	uint8_t *tslot = g_win2_debug + 4096;
+	uint32_t sep = 0x0000C0DEU;
+
+	memcpy(tslot, &sep, 4);
+	memcpy(tslot + 4, g_core_ticks, sizeof(g_core_ticks));
+
+	/* Window 3: Perf window */
+	uint8_t tmp_perf[4096];
+
+	build_ext_perf_tlv(tp, tmp_perf, sizeof(tmp_perf));
+}
+
+/* -------------------------------------------------------------------------
+ * Tick-Boundary Synchronization Hooks (called from testbench.c)
+ * -------------------------------------------------------------------------
+ */
+
+void tb_remote_tick_begin(struct testbench_prm *tp)
+{
+	if (!g_srv_running || g_in_remote_rpc)
+		return;
+
+	pthread_mutex_lock(&g_tb_lock);
+	g_tp = tp;
+
+	while ((g_dsp_paused || (!tp->tplg_file && sof_get() && sof_get()->ipc &&
+				 list_is_empty(&sof_get()->ipc->comp_list))) &&
+	       g_step_ticks_remaining <= 0 && !g_quit_requested && g_srv_running)
+		pthread_cond_wait(&g_tb_cond, &g_tb_lock);
+
+	if (g_step_ticks_remaining > 0)
+		g_step_ticks_remaining--;
+}
+
+void tb_remote_tick_end(struct testbench_prm *tp, uint64_t delta_cycles, uint64_t delta_ns)
+{
+	uint32_t enabled_mask;
+	uint32_t sim_cycles;
+	uint32_t kcps;
+	int c;
+
+	if (!g_srv_running)
+		return;
+
+	g_total_ticks++;
+	enabled_mask = arch_cpu_enabled_cores();
+
+	/* Convert host elapsed ns (or Xtensa cycles) into simulated 400 MHz DSP cycles */
+	if (delta_cycles > 0)
+		sim_cycles = (uint32_t)delta_cycles;
+	else if (delta_ns > 0)
+		sim_cycles = (uint32_t)((delta_ns * 400ULL) / 1000ULL);
+	else
+		sim_cycles = 12000;
+
+	if (sim_cycles < 4000)
+		sim_cycles = 4000;
+	if (sim_cycles > 380000)
+		sim_cycles = 380000;
+
+	kcps = sim_cycles; /* 1 ms tick -> cycles per tick == kcps */
+
+	for (c = 0; c < CONFIG_CORE_COUNT; c++) {
+		struct host_sched_telemetry *st = host_telem_get();
+
+		if (g_perf_meas_state == 2 /* STARTED */) {
+			if (st && (st->num_pipes > 0 || st->num_mods > 0)) {
+				if (st->cores[c].active) {
+					struct host_core_telem *ct = &st->cores[c];
+					uint32_t last_cyc = (uint32_t)(ct->ll_last_cycles +
+								       ct->dp_last_cycles);
+					uint32_t peak_cyc = (uint32_t)(ct->ll_peak_cycles +
+								       ct->dp_peak_cycles);
+					uint32_t avg_k = ct->ll_avg_kcps + ct->dp_avg_kcps;
+					uint32_t peak_k = ct->ll_peak_kcps + ct->dp_peak_kcps;
+
+					g_core_ticks[c].count = ct->ll_tick_count +
+								ct->dp_run_count;
+					g_core_ticks[c].last_time_elapsed = last_cyc;
+					g_core_ticks[c].max_time_elapsed = peak_cyc;
+					g_core_ticks[c].last_ccount =
+						(uint32_t)(ct->ll_total_cycles +
+							   ct->dp_total_cycles);
+					g_core_ticks[c].avg_utilization = avg_k;
+					g_core_ticks[c].peak_utilization = peak_k;
+					g_core_ticks[c].peak_utilization_4k = peak_k;
+					g_core_ticks[c].peak_utilization_8k = peak_k;
+				}
+			} else if (enabled_mask & BIT(c)) {
+				g_core_ticks[c].count++;
+				g_core_ticks[c].last_time_elapsed = sim_cycles;
+				if (sim_cycles > g_core_ticks[c].max_time_elapsed)
+					g_core_ticks[c].max_time_elapsed = sim_cycles;
+				g_core_ticks[c].last_ccount += sim_cycles;
+				g_core_ticks[c].avg_utilization =
+					g_core_ticks[c].avg_utilization ?
+					((g_core_ticks[c].avg_utilization * 7 + kcps) / 8) : kcps;
+				if (kcps > g_core_ticks[c].peak_utilization)
+					g_core_ticks[c].peak_utilization = kcps;
+				g_core_ticks[c].peak_utilization_4k =
+					g_core_ticks[c].peak_utilization;
+				g_core_ticks[c].peak_utilization_8k =
+					g_core_ticks[c].peak_utilization;
+			}
+		}
+	}
+
+	refresh_emulated_windows(tp);
+	if (g_in_remote_rpc)
+		return;
+
+	pthread_mutex_unlock(&g_tb_lock);
+
+	/* When running in interactive server mode (-W or -S), pace slightly so network clients
+	 * can acquire g_tb_lock without starvation and observe real-time telemetry.
+	 */
+	if (tp->server_wait || g_tone_running)
+		usleep(500);
+}
+
+bool tb_remote_should_continue(struct testbench_prm *tp, bool file_eof)
+{
+	if (g_quit_requested)
+		return false;
+
+	if (!g_srv_running || g_in_remote_rpc)
+		return !file_eof;
+
+	if (g_tone_running)
+		return true;
+
+	if (tp && tp->server_wait) {
+		if (file_eof) {
+			/* Rewind all input files so the pipeline keeps running in server mode */
+			int i;
+
+			pthread_mutex_lock(&g_tb_lock);
+			for (i = 0; i < tp->input_file_num; i++) {
+				if (tp->fr[i].state && tp->fr[i].state->rfh) {
+					rewind(tp->fr[i].state->rfh);
+					tp->fr[i].state->reached_eof = false;
+					tp->fr[i].state->copy_timeout = false;
+				}
+			}
+			for (i = 0; i < tp->output_file_num; i++) {
+				if (tp->fw[i].state) {
+					tp->fw[i].state->reached_eof = false;
+					tp->fw[i].state->copy_timeout = false;
+				}
+			}
+			pthread_mutex_unlock(&g_tb_lock);
+			return !g_quit_requested;
+		}
+		return true;
+	}
+
+	return !file_eof;
+}
+
+/* -------------------------------------------------------------------------
+ * Interactive Testbench Shell Handler (SOF_NET_OP_SHELL_EXEC)
+ * -------------------------------------------------------------------------
+ */
+
+static void remote_set_csv_files(char **arr, int *num_out, int max_num, const char *csv)
+{
+	char *copy, *save = NULL, *tok;
+	int i;
+
+	for (i = 0; i < *num_out && i < max_num; i++) {
+		free(arr[i]);
+		arr[i] = NULL;
+	}
+	*num_out = 0;
+	if (!csv || !*csv)
+		return;
+
+	copy = strdup(csv);
+	if (!copy)
+		return;
+	tok = strtok_r(copy, ",", &save);
+	while (tok && *num_out < max_num) {
+		arr[(*num_out)++] = strdup(tok);
+		tok = strtok_r(NULL, ",", &save);
+	}
+	free(copy);
+}
+
+static void remote_set_csv_pipelines(struct testbench_prm *tp, const char *csv)
+{
+	char *copy, *save = NULL, *tok;
+	int idx = 0;
+
+	if (!tp || !csv || !*csv)
+		return;
+
+	copy = strdup(csv);
+	if (!copy)
+		return;
+	tok = strtok_r(copy, ",", &save);
+	while (tok && idx < TB_MAX_PIPELINES_NUM) {
+		tp->pipelines[idx++] = atoi(tok);
+		tok = strtok_r(NULL, ",", &save);
+	}
+	if (idx > 0)
+		tp->pipeline_num = idx;
+	free(copy);
+}
+
+static void remote_unload_active_topology(struct testbench_prm *tp)
+{
+	if (!tp)
+		return;
+
+	if (tp->tplg_file ||
+	    (sof_get() && sof_get()->ipc && !list_is_empty(&sof_get()->ipc->comp_list))) {
+		cache_active_widget_names(tp);
+		tb_set_reset_state(tp);
+		tb_free_all_pipelines(tp);
+		tb_free_topology(tp);
+	}
+	if (tp->tplg_file) {
+		free(tp->tplg_file);
+		tp->tplg_file = NULL;
+	}
+	if (tp->control_fh) {
+		fclose(tp->control_fh);
+		tp->control_fh = NULL;
+	}
+	if (tp->control_file) {
+		free(tp->control_file);
+		tp->control_file = NULL;
+	}
+	memset(g_kctl_shadow, 0, sizeof(g_kctl_shadow));
+}
+
+static int tokenize_shell_args(char *buf, char **argv, int max_args)
+{
+	int argc = 0;
+	char *p = buf;
+
+	while (*p && argc < max_args) {
+		while (*p == ' ' || *p == '\t')
+			p++;
+		if (!*p)
+			break;
+		if (*p == '"' || *p == '\'') {
+			char q = *p++;
+
+			argv[argc++] = p;
+			while (*p && *p != q)
+				p++;
+			if (*p == q)
+				*p++ = '\0';
+		} else {
+			argv[argc++] = p;
+			while (*p && *p != ' ' && *p != '\t')
+				p++;
+			if (*p)
+				*p++ = '\0';
+		}
+	}
+	return argc;
+}
+
+static uint32_t remote_parse_freq_hz(const char *str)
+{
+	char *endp = NULL;
+	double val;
+
+	if (!str || !*str)
+		return (uint32_t)TB_DSP_NOMINAL_HZ;
+	val = strtod(str, &endp);
+	if (val <= 0.0)
+		return (uint32_t)TB_DSP_NOMINAL_HZ;
+	if (endp && (*endp == 'k' || *endp == 'K'))
+		return (uint32_t)(val * 1000.0 + 0.5);
+	if (endp && (*endp == 'm' || *endp == 'M'))
+		return (uint32_t)(val * 1000000.0 + 0.5);
+	if (val < 100000.0)
+		return (uint32_t)(val * 1000000.0 + 0.5);
+	return (uint32_t)(val + 0.5);
+}
+
+static void remote_apply_freq_arg(const char *arg)
+{
+	char *copy, *saveptr = NULL, *tok;
+
+	if (!arg)
+		return;
+	copy = strdup(arg);
+	if (!copy)
+		return;
+	tok = strtok_r(copy, ",", &saveptr);
+	while (tok) {
+		char *colon = strchr(tok, ':');
+
+		if (colon) {
+			int core = atoi(tok);
+			uint32_t hz = remote_parse_freq_hz(colon + 1);
+
+			host_workload_sim_set_core_freq(core, hz);
+		} else {
+			uint32_t hz = remote_parse_freq_hz(tok);
+
+			host_workload_sim_set_core_freq(-1, hz);
+		}
+		tok = strtok_r(NULL, ",", &saveptr);
+	}
+	free(copy);
+}
+
+static size_t remote_parse_mem_size_token(const char *str)
+{
+	char *endp = NULL;
+	double val;
+
+	if (!str || !*str)
+		return 0;
+	val = strtod(str, &endp);
+	if (val <= 0.0)
+		return 0;
+	if (endp && (*endp == 'm' || *endp == 'M'))
+		return (size_t)(val * 1024.0 * 1024.0 + 0.5);
+	if (endp && (*endp == 'k' || *endp == 'K'))
+		return (size_t)(val * 1024.0 + 0.5);
+	if (endp && (*endp == 'b' || *endp == 'B'))
+		return (size_t)(val + 0.5);
+	if (val <= 65536.0)
+		return (size_t)(val * 1024.0 + 0.5);
+	return (size_t)(val + 0.5);
+}
+
+static int remote_apply_mem_cfg_arg(const char *arg)
+{
+	size_t hpsram = 0, lpsram = 0, dram = 0;
+	bool enforce = true;
+	char *copy, *saveptr = NULL, *tok;
+	int pos = 0;
+
+	if (!arg || !*arg)
+		return -EINVAL;
+	copy = strdup(arg);
+	if (!copy)
+		return -ENOMEM;
+
+	tok = strtok_r(copy, ",", &saveptr);
+	while (tok) {
+		char *eq = strchr(tok, '=');
+
+		if (eq) {
+			*eq = '\0';
+			const char *val = eq + 1;
+
+			if (strcasecmp(tok, "hpsram") == 0 || strcasecmp(tok, "sram") == 0 ||
+			    strcasecmp(tok, "hp") == 0) {
+				hpsram = remote_parse_mem_size_token(val);
+			} else if (strcasecmp(tok, "lpsram") == 0 || strcasecmp(tok, "lp") == 0) {
+				lpsram = remote_parse_mem_size_token(val);
+			} else if (strcasecmp(tok, "dram") == 0 || strcasecmp(tok, "imr") == 0 ||
+				   strcasecmp(tok, "l3") == 0) {
+				dram = remote_parse_mem_size_token(val);
+			} else if (strcasecmp(tok, "strict") == 0 ||
+				   strcasecmp(tok, "enforce") == 0) {
+				enforce = (atoi(val) != 0 && strcasecmp(val, "off") != 0 &&
+					   strcasecmp(val, "false") != 0);
+			}
+		} else if (strcasecmp(tok, "nostrict") == 0) {
+			enforce = false;
+		} else if (strcasecmp(tok, "strict") == 0) {
+			enforce = true;
+		} else {
+			size_t sz = remote_parse_mem_size_token(tok);
+
+			if (pos == 0)
+				hpsram = sz;
+			else if (pos == 1)
+				lpsram = sz;
+			else if (pos == 2)
+				dram = sz;
+			pos++;
+		}
+		tok = strtok_r(NULL, ",", &saveptr);
+	}
+	free(copy);
+
+	if (hpsram == 0 && lpsram == 0 && dram == 0)
+		return -EINVAL;
+	host_platform_set_memory(hpsram, lpsram, dram, enforce);
+	return 0;
+}
+
+static void remote_apply_mem_arg(const char *arg)
+{
+	uint32_t domain = HOST_MEM_DOMAIN_SRAM;
+	uint32_t factor_x100 = 0;
+	uint32_t cyc_per_word = 0;
+	const char *colon;
+
+	if (!arg)
+		return;
+	if (strncasecmp(arg, "dram", 4) == 0 || strcmp(arg, "1") == 0)
+		domain = HOST_MEM_DOMAIN_DRAM;
+
+	colon = strchr(arg, ':');
+	if (colon) {
+		factor_x100 = (uint32_t)strtoul(colon + 1, NULL, 10);
+		colon = strchr(colon + 1, ':');
+		if (colon)
+			cyc_per_word = (uint32_t)strtoul(colon + 1, NULL, 10);
+	}
+	host_workload_sim_set_mem_domain(domain, factor_x100, cyc_per_word);
+}
+
+static size_t format_remote_test_summary(struct testbench_prm *tp, long long delta_t,
+					 struct tb_heap_usage_record *heap_records,
+					 int heap_records_count, char *out_buf,
+					 size_t off, size_t out_cap)
+{
+	long long file_cycles = 0;
+	int n_in = 0, n_out = 0, frames_out;
+	int i;
+	uint32_t u;
+	struct host_sched_telemetry *st = host_telem_get();
+
+	for (i = 0; i < tp->input_file_num; i++) {
+		if (tp->fr[i].id < 0 || !tp->fr[i].state)
+			continue;
+		n_in += tp->fr[i].state->n;
+		file_cycles += tp->fr[i].state->cycles_count;
+	}
+	for (i = 0; i < tp->output_file_num; i++) {
+		if (tp->fw[i].id < 0 || !tp->fw[i].state)
+			continue;
+		n_out += tp->fw[i].state->n;
+		file_cycles += tp->fw[i].state->cycles_count;
+	}
+
+	off += snprintf(out_buf + off, out_cap - off,
+			"==========================================================\n"
+			"		           Test Summary 1\n"
+			"==========================================================\n");
+
+	for (i = 0; i < tp->pipeline_num && off + 256 < out_cap; i++) {
+		int pid = tp->pipelines[i];
+		int j;
+
+		off += snprintf(out_buf + off, out_cap - off, "pipeline %d\n", pid);
+		for (j = 0; j < tp->input_file_num && off + 160 < out_cap; j++) {
+			if (tp->fr[j].pipeline_id == pid && tp->fr[j].state) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"file read %d:pipeline %d: used file %s: %d samples %d copies\n",
+						tp->fr[j].id, pid, tp->fr[j].state->fn,
+						tp->fr[j].state->n, tp->fr[j].state->copy_count);
+			}
+		}
+		for (j = 0; j < tp->output_file_num && off + 160 < out_cap; j++) {
+			if (tp->fw[j].pipeline_id == pid && tp->fw[j].state) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"file write %d:pipeline %d: used file %s: %d samples %d copies\n",
+						tp->fw[j].id, pid, tp->fw[j].state->fn,
+						tp->fw[j].state->n, tp->fw[j].state->copy_count);
+			}
+		}
+	}
+
+	frames_out = tp->channels_out > 0 ? (n_out / tp->channels_out) : 0;
+	off += snprintf(out_buf + off, out_cap - off,
+			"Input bit format: %s\n"
+			"Input sample rate: %d\n"
+			"Output sample rate: %d\n"
+			"Input sample (frame) count: %d (%d)\n"
+			"Output sample (frame) count: %d (%d)\n",
+			tp->bits_in ? tp->bits_in : "S32_LE",
+			tp->fs_in, tp->fs_out,
+			n_in, tp->channels_in > 0 ? (n_in / tp->channels_in) : 0,
+			n_out, frames_out);
+
+	for (i = 0; i < heap_records_count && off + 128 < out_cap; i++) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"Heap usage for module %s: %u bytes\n",
+				heap_records[i].module_name,
+				(uint32_t)heap_records[i].heap_max);
+	}
+
+	if (delta_t <= 0)
+		delta_t = 1;
+	off += snprintf(out_buf + off, out_cap - off,
+			"\nTotal execution time: %lld us, %.2f x realtime\n\n",
+			delta_t,
+			tp->fs_out > 0 ? ((float)frames_out / tp->fs_out * 1000000.0f / delta_t) : 0.0f);
+
+	if (st && (st->num_pipes > 0 || st->num_mods > 0) && off + 512 < out_cap) {
+		const char *mode_str =
+			(st->sim_cfg.mode == HOST_WORKLOAD_SIM_REALTIME) ? "REALTIME-PACED" :
+			(st->sim_cfg.mode == HOST_WORKLOAD_SIM_VIRTUAL)  ? "VIRTUAL-SIM" :
+									   "HOST-MEASURED";
+		const char *mem_str =
+			(st->sim_cfg.default_mem_domain == HOST_MEM_DOMAIN_DRAM) ? "DRAM" : "SRAM";
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"--- Per-Core LL & DP Scheduler Telemetry [Platform=%s Cores=%u HPSRAM=%zu/%zuKB LPSRAM=%zu/%zuKB Mode=%s Mem=%s DRAM_Factor=%u.%02ux] ---\n",
+				st->hw_cfg.platform_name,
+				st->hw_cfg.num_cores,
+				st->hw_cfg.hpsram_peak_bytes / 1024UL,
+				st->hw_cfg.hpsram_size_bytes / 1024UL,
+				st->hw_cfg.lpsram_peak_bytes / 1024UL,
+				st->hw_cfg.lpsram_size_bytes / 1024UL,
+				mode_str, mem_str,
+				st->sim_cfg.dram_factor_x100 / 100,
+				st->sim_cfg.dram_factor_x100 % 100);
+		for (u = 0; u < st->hw_cfg.num_cores && u < TB_TELEM_MAX_CORES && off + 256 < out_cap; u++) {
+			struct host_core_telem *ct = &st->cores[u];
+
+			if (!ct->active)
+				continue;
+			off += snprintf(out_buf + off, out_cap - off,
+					"  Core %u (%u.%03u MHz): util=%u.%02u%% overruns=%u | LL: ticks=%u tasks=%u avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus | DP: runs=%u thr=%u avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus\n",
+					u, ct->freq_hz / 1000000U,
+					(ct->freq_hz % 1000000U) / 1000U,
+					ct->total_util_x100 / 100, ct->total_util_x100 % 100,
+					ct->ll_deadline_violations,
+					ct->ll_tick_count, ct->ll_active_tasks,
+					(unsigned long long)ct->ll_avg_cycles,
+					(unsigned long long)ct->ll_peak_cycles,
+					(unsigned long long)ct->ll_total_cycles,
+					ct->ll_avg_kcps, ct->ll_peak_kcps,
+					(unsigned long long)(ct->ll_avg_exec_ns / 1000ULL),
+					(unsigned long long)(ct->ll_avg_exec_ns % 1000ULL),
+					(unsigned long long)(ct->ll_peak_exec_ns / 1000ULL),
+					(unsigned long long)(ct->ll_peak_exec_ns % 1000ULL),
+					ct->dp_run_count, ct->dp_active_threads,
+					(unsigned long long)ct->dp_avg_cycles,
+					(unsigned long long)ct->dp_peak_cycles,
+					(unsigned long long)ct->dp_total_cycles,
+					ct->dp_avg_kcps, ct->dp_peak_kcps,
+					(unsigned long long)(ct->dp_avg_exec_ns / 1000ULL),
+					(unsigned long long)(ct->dp_avg_exec_ns % 1000ULL),
+					(unsigned long long)(ct->dp_peak_exec_ns / 1000ULL),
+					(unsigned long long)(ct->dp_peak_exec_ns % 1000ULL));
+		}
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"\n--- Per-Pipeline Scheduling Telemetry (%u active) ---\n",
+				st->num_pipes);
+		for (u = 0; u < st->num_pipes && off + 224 < out_cap; u++) {
+			struct host_pipe_telem *pt = &st->pipes[u];
+
+			if (!pt->active)
+				continue;
+			off += snprintf(out_buf + off, out_cap - off,
+					"  Pipe %2u: core=%u prio=%u per=%uus mem=%s mods=%uLL/%uDP copies=%llu avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus xruns=%u\n",
+					pt->pipeline_id, pt->core_id, pt->priority, pt->period_us,
+					pt->mem_domain == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+					pt->num_ll_modules, pt->num_dp_modules,
+					(unsigned long long)pt->copy_iterations,
+					(unsigned long long)pt->avg_cycles,
+					(unsigned long long)pt->peak_cycles,
+					(unsigned long long)pt->total_cycles,
+					pt->avg_kcps, pt->peak_kcps,
+					(unsigned long long)(pt->avg_exec_ns / 1000ULL),
+					(unsigned long long)(pt->avg_exec_ns % 1000ULL),
+					(unsigned long long)(pt->peak_exec_ns / 1000ULL),
+					(unsigned long long)(pt->peak_exec_ns % 1000ULL),
+					pt->xrun_count);
+		}
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"\n--- Per-Module LL & DP Scheduling + Entry/Exit Buffer Telemetry (%u active) ---\n",
+				st->num_mods);
+		for (u = 0; u < st->num_mods && off + 256 < out_cap; u++) {
+			struct host_mod_telem *mt = &st->mods[u];
+			const char *wname;
+
+			if (!mt->active)
+				continue;
+			wname = resolve_comp_widget_name(tp, mt->comp_id);
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"  [0x%06x %-24s] pipe=%u core=%u %s mem=%s iters=%llu avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus last=%llu.%03llu->%llu.%03lluus(dl=%llu.%03lluus) ibs=%u obs=%u cpc=%u(viol=%u)\n",
+					mt->comp_id, wname, mt->pipeline_id, mt->core_id,
+					mt->proc_domain == COMP_PROCESSING_DOMAIN_DP ? "DP" : "LL",
+					mt->mem_domain == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+					(unsigned long long)mt->iterations,
+					(unsigned long long)mt->avg_cycles,
+					(unsigned long long)mt->peak_cycles,
+					(unsigned long long)mt->total_cycles,
+					mt->avg_kcps, mt->peak_kcps,
+					(unsigned long long)(mt->avg_exec_ns / 1000ULL),
+					(unsigned long long)(mt->avg_exec_ns % 1000ULL),
+					(unsigned long long)(mt->peak_exec_ns / 1000ULL),
+					(unsigned long long)(mt->peak_exec_ns % 1000ULL),
+					(unsigned long long)(mt->last_start_ns / 1000ULL),
+					(unsigned long long)(mt->last_start_ns % 1000ULL),
+					(unsigned long long)(mt->last_complete_ns / 1000ULL),
+					(unsigned long long)(mt->last_complete_ns % 1000ULL),
+					(unsigned long long)(mt->last_deadline_ns / 1000ULL),
+					(unsigned long long)(mt->last_deadline_ns % 1000ULL),
+					mt->ibs, mt->obs, mt->effective_cpc, mt->cpc_violations);
+		}
+
+		if (tp->sched_trace_limit > 0 && st->trace_count > 0 && off + 512 < out_cap) {
+			uint32_t max_ev = (uint32_t)tp->sched_trace_limit;
+			struct host_sched_trace_event *ev_buf;
+			uint64_t total_ev = st->trace_total_events;
+			uint32_t avail_ev = st->trace_count;
+			uint32_t n_ev, e;
+
+			if (max_ev > TB_TELEM_TRACE_CAPACITY)
+				max_ev = TB_TELEM_TRACE_CAPACITY;
+			ev_buf = calloc(max_ev, sizeof(*ev_buf));
+			if (ev_buf) {
+				n_ev = host_telem_trace_read(ev_buf, max_ev, 0, -1, -1, -1, -1);
+				off += snprintf(out_buf + off, out_cap - off,
+						"\n--- Per-Iteration LL & DP Module Scheduling Timeline (showing %u of %llu events, ring=%u) ---\n"
+						"  %-5s %-5s %-5s %-4s %-4s %-7s %-32s %12s %12s %10s %12s %21s %13s %11s\n",
+						n_ev, (unsigned long long)total_ev, avail_ev,
+						"Seq", "Tick", "Iter", "Core", "Pipe", "Domain",
+						"Module", "Start(us)", "Complete(us)", "Dur(us)",
+						"Deadline(us)", "Start->End(cyc)", "Cyc/Budget",
+						"In->Out(B)");
+				for (e = 0; e < n_ev && off + 224 < out_cap; e++) {
+					struct host_sched_trace_event *ev = &ev_buf[e];
+					const char *ename = resolve_comp_widget_name(tp, ev->comp_id);
+					const char *dom =
+						(ev->event_type == HOST_SCHED_EVT_DP_RUN) ? "DP-RUN" :
+						(ev->event_type == HOST_SCHED_EVT_DP_SYNC) ? "DP-SYNC" :
+											     "LL-COPY";
+					uint64_t dur_ns = (ev->complete_ns >= ev->start_ns) ?
+							  (ev->complete_ns - ev->start_ns) : 0;
+					char mod_col[48];
+					char cyc_col[48];
+					char bud_col[32];
+					char io_col[32];
+
+					snprintf(mod_col, sizeof(mod_col), "0x%06x %.22s",
+						 ev->comp_id, ename);
+					snprintf(cyc_col, sizeof(cyc_col), "%llu->%llu",
+						 (unsigned long long)ev->start_cycles,
+						 (unsigned long long)ev->complete_cycles);
+					snprintf(bud_col, sizeof(bud_col), "%u/%u%s",
+						 ev->duration_cycles, ev->cpc_budget,
+						 ev->cpc_violation ? "!" : "");
+					snprintf(io_col, sizeof(io_col), "%u->%u",
+						 ev->bytes_in, ev->bytes_out);
+
+					off += snprintf(out_buf + off, out_cap - off,
+							"  %-5u %-5u %-5u C%-3u P%-3u %-7s %-32s %8llu.%03llu %8llu.%03llu %6llu.%03llu %8llu.%03llu %21s %13s %11s\n",
+							ev->seq_id, ev->ll_tick_nr, ev->mod_iter_nr,
+							ev->core_id, ev->pipeline_id, dom, mod_col,
+							(unsigned long long)(ev->start_ns / 1000ULL),
+							(unsigned long long)(ev->start_ns % 1000ULL),
+							(unsigned long long)(ev->complete_ns / 1000ULL),
+							(unsigned long long)(ev->complete_ns % 1000ULL),
+							(unsigned long long)(dur_ns / 1000ULL),
+							(unsigned long long)(dur_ns % 1000ULL),
+							(unsigned long long)(ev->deadline_ns / 1000ULL),
+							(unsigned long long)(ev->deadline_ns % 1000ULL),
+							cyc_col, bud_col, io_col);
+				}
+				free(ev_buf);
+			}
+		}
+	}
+	return off;
+}
+
+static size_t handle_remote_io_cfg(struct testbench_prm *tp, const char *args_str,
+				   char *out_buf, size_t off, size_t out_cap)
+{
+	char *copy = strdup(args_str ? args_str : "");
+	char *argv[64];
+	int argc, i;
+
+	if (!copy || !tp) {
+		free(copy);
+		return off + snprintf(out_buf + off, out_cap - off, "error: out of memory\n");
+	}
+
+	argc = tokenize_shell_args(copy, argv, 64);
+	for (i = 0; i < argc; i++) {
+		if (strcmp(argv[i], "-i") == 0 && i + 1 < argc) {
+			remote_set_csv_files(tp->input_file, &tp->input_file_num,
+					     TB_MAX_INPUT_FILE_NUM, argv[++i]);
+		} else if (strcmp(argv[i], "-o") == 0 && i + 1 < argc) {
+			remote_set_csv_files(tp->output_file, &tp->output_file_num,
+					     TB_MAX_OUTPUT_FILE_NUM, argv[++i]);
+		} else if (strcmp(argv[i], "-p") == 0 && i + 1 < argc) {
+			remote_set_csv_pipelines(tp, argv[++i]);
+		} else if (strcmp(argv[i], "-r") == 0 && i + 1 < argc) {
+			tp->fs_in = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-R") == 0 && i + 1 < argc) {
+			tp->fs_out = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-c") == 0 && i + 1 < argc) {
+			tp->channels_in = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-n") == 0 && i + 1 < argc) {
+			tp->channels_out = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-b") == 0 && i + 1 < argc) {
+			free(tp->bits_in);
+			tp->bits_in = strdup(argv[++i]);
+			tp->frame_fmt = tplg_find_format(tp->bits_in);
+		} else if (strcmp(argv[i], "-s") == 0 && i + 1 < argc) {
+			free(tp->control_file);
+			tp->control_file = strdup(argv[++i]);
+		} else if (strcmp(argv[i], "-C") == 0 && i + 1 < argc) {
+			tp->copy_iterations = atoi(argv[++i]);
+			tp->copy_check = true;
+		}
+	}
+	free(copy);
+
+	if (!tp->fs_in)
+		tp->fs_in = 48000;
+	if (!tp->fs_out)
+		tp->fs_out = tp->fs_in;
+	if (!tp->channels_in)
+		tp->channels_in = 2;
+	if (!tp->channels_out)
+		tp->channels_out = tp->channels_in;
+	tp->input_file_index = 0;
+	tp->output_file_index = 0;
+	pthread_mutex_lock(&g_pcm_ring_lock);
+	g_pcm_ring_write_idx = 0;
+	g_pcm_ring_avail = 0;
+	g_pcm_frames_processed = 0;
+	pthread_mutex_unlock(&g_pcm_ring_lock);
+	tb_configure_audio_params(tp);
+
+	off += snprintf(out_buf + off, out_cap - off,
+			"io-cfg: in=%d out=%d pipes=%d rate=%d->%d ch=%d->%d fmt=%s\n",
+			tp->input_file_num, tp->output_file_num, tp->pipeline_num,
+			tp->fs_in, tp->fs_out, tp->channels_in, tp->channels_out,
+			tp->bits_in ? tp->bits_in : "S32_LE");
+	return off;
+}
+
+static bool remote_is_any_file_at_eof(struct testbench_prm *tp)
+{
+	int i;
+
+	if (!tp)
+		return true;
+	for (i = 0; i < tp->input_file_num && i < TB_MAX_INPUT_FILE_NUM; i++) {
+		if (!tp->fr[i].state)
+			continue;
+		if (tp->fr[i].state->reached_eof || tp->fr[i].state->copy_timeout)
+			return true;
+	}
+	for (i = 0; i < tp->output_file_num && i < TB_MAX_OUTPUT_FILE_NUM; i++) {
+		if (!tp->fw[i].state)
+			continue;
+		if (tp->fw[i].state->reached_eof || tp->fw[i].state->copy_timeout ||
+		    tp->fw[i].state->write_failed)
+			return true;
+	}
+	return false;
+}
+
+static size_t handle_remote_run_ipc(struct testbench_prm *tp, const char *args_str,
+				    char *out_buf, size_t off, size_t out_cap)
+{
+	struct tb_heap_usage_record heap_records[TB_NUM_WIDGETS_SUPPORTED];
+	struct timespec td0 = {0}, td1 = {0}, t0 = {0}, t1 = {0};
+	long long delta_t = 0;
+	int heap_records_count = 0;
+	int max_ticks = 20000;
+	int ticks_run = 0;
+	int i;
+
+	if (!tp)
+		return off + snprintf(out_buf + off, out_cap - off,
+				      "error: testbench not initialized\n");
+	if (args_str && *args_str) {
+		int v = atoi(args_str);
+
+		if (v > 0)
+			max_ticks = v;
+	}
+
+	off += snprintf(out_buf + off, out_cap - off,
+			"==========================================================\n"
+			"		           Test Start 0\n"
+			"==========================================================\n");
+
+	host_telem_reset();
+	tb_gettime(&td0);
+	while (ticks_run < max_ticks) {
+		uint64_t c0, c1, delta_ns;
+
+		tb_gettime(&t0);
+		tb_getcycles(&c0);
+		if (sof_get() && sof_get()->ipc &&
+		    !list_is_empty(&sof_get()->ipc->comp_list))
+			schedule_ll_run_tasks();
+		tb_getcycles(&c1);
+		tb_gettime(&t1);
+		tp->total_cycles += c1 - c0;
+		delta_ns = (uint64_t)(t1.tv_sec - t0.tv_sec) * 1000000000ULL +
+			   (uint64_t)(t1.tv_nsec - t0.tv_nsec);
+		g_in_remote_rpc = true;
+		tb_remote_tick_end(tp, c1 - c0, delta_ns);
+		g_in_remote_rpc = false;
+		ticks_run++;
+
+		if (remote_is_any_file_at_eof(tp)) {
+			schedule_ll_run_tasks();
+			break;
+		}
+	}
+	tb_gettime(&td1);
+
+	for (i = 0; i < tp->output_file_num && i < TB_MAX_OUTPUT_FILE_NUM; i++) {
+		if (tp->fw[i].state && tp->fw[i].state->wfh)
+			fflush(tp->fw[i].state->wfh);
+	}
+
+	delta_t = (td1.tv_sec - td0.tv_sec) * 1000000LL;
+	delta_t += (td1.tv_nsec - td0.tv_nsec) / 1000LL;
+
+	memset(heap_records, 0, sizeof(heap_records));
+	tb_collect_heap_usage(tp, heap_records, &heap_records_count);
+
+	return format_remote_test_summary(tp, delta_t, heap_records, heap_records_count,
+					  out_buf, off, out_cap);
+}
+
+static size_t handle_remote_run_test(struct testbench_prm *tp, const char *args_str,
+				     char *out_buf, size_t off, size_t out_cap)
+{
+	struct tb_heap_usage_record heap_records[TB_NUM_WIDGETS_SUPPORTED];
+	struct host_sched_telemetry *st = host_telem_get();
+	struct host_workload_sim_cfg saved_sim_cfg;
+	struct host_platform_hw_cfg saved_hw_cfg;
+	struct timespec td0 = {0}, td1 = {0};
+	long long delta_t = 0;
+	int64_t next_control_ns = 0;
+	int64_t time_ns;
+	int heap_records_count = 0;
+	bool saved_server_wait;
+	bool w_explicit_off = false;
+	const char *opt_preset = NULL;
+	const char *opt_cores = NULL;
+	const char *opt_mem = NULL;
+	const char *opt_freq = NULL;
+	char *copy;
+	char *argv[64];
+	int argc, i, err = 0;
+
+	if (!tp)
+		return off + snprintf(out_buf + off, out_cap - off, "error: testbench not initialized\n");
+
+	copy = strdup(args_str ? args_str : "");
+	if (!copy)
+		return off + snprintf(out_buf + off, out_cap - off, "error: out of memory\n");
+
+	/* Ensure any prior topology or dynamic pipeline is cleanly torn down */
+	remote_unload_active_topology(tp);
+
+	saved_sim_cfg = st->sim_cfg;
+	saved_hw_cfg = st->hw_cfg;
+	saved_server_wait = tp->server_wait;
+	tp->server_wait = false;
+	host_platform_reset_mem_stats();
+
+	/* Reset per-run defaults before parsing run-test flags */
+	tp->fs_in = 48000;
+	tp->fs_out = 0;
+	tp->channels_in = 2;
+	tp->channels_out = 0;
+	free(tp->bits_in);
+	tp->bits_in = strdup("S32_LE");
+	tp->frame_fmt = tplg_find_format(tp->bits_in);
+	tp->copy_check = false;
+	tp->copy_iterations = 1;
+	tp->sched_trace_limit = 0;
+	tp->pipelines[0] = 1;
+	tp->pipeline_num = 1;
+
+	argc = tokenize_shell_args(copy, argv, 64);
+	for (i = 0; i < argc; i++) {
+		if (strcmp(argv[i], "-t") == 0 && i + 1 < argc) {
+			free(tp->tplg_file);
+			tp->tplg_file = strdup(argv[++i]);
+		} else if (strcmp(argv[i], "-p") == 0 && i + 1 < argc) {
+			remote_set_csv_pipelines(tp, argv[++i]);
+		} else if (strcmp(argv[i], "-i") == 0 && i + 1 < argc) {
+			remote_set_csv_files(tp->input_file, &tp->input_file_num,
+					     TB_MAX_INPUT_FILE_NUM, argv[++i]);
+		} else if (strcmp(argv[i], "-o") == 0 && i + 1 < argc) {
+			remote_set_csv_files(tp->output_file, &tp->output_file_num,
+					     TB_MAX_OUTPUT_FILE_NUM, argv[++i]);
+		} else if (strcmp(argv[i], "-r") == 0 && i + 1 < argc) {
+			tp->fs_in = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-R") == 0 && i + 1 < argc) {
+			tp->fs_out = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-c") == 0 && i + 1 < argc) {
+			tp->channels_in = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-n") == 0 && i + 1 < argc) {
+			tp->channels_out = atoi(argv[++i]);
+		} else if (strcmp(argv[i], "-b") == 0 && i + 1 < argc) {
+			free(tp->bits_in);
+			tp->bits_in = strdup(argv[++i]);
+			tp->frame_fmt = tplg_find_format(tp->bits_in);
+		} else if (strcmp(argv[i], "-s") == 0 && i + 1 < argc) {
+			free(tp->control_file);
+			tp->control_file = strdup(argv[++i]);
+		} else if (strcmp(argv[i], "-C") == 0 && i + 1 < argc) {
+			tp->copy_iterations = atoi(argv[++i]);
+			tp->copy_check = true;
+		} else if (strcmp(argv[i], "-d") == 0 && i + 1 < argc) {
+			tp->trace_level = atoi(argv[++i]);
+			tb_enable_trace(tp->trace_level);
+		} else if (strcmp(argv[i], "-A") == 0 && i + 1 < argc) {
+			opt_preset = argv[++i];
+		} else if (strcmp(argv[i], "-N") == 0 && i + 1 < argc) {
+			opt_cores = argv[++i];
+		} else if (strcmp(argv[i], "-m") == 0 && i + 1 < argc) {
+			opt_mem = argv[++i];
+		} else if (strcmp(argv[i], "-w") == 0 && i + 1 < argc) {
+			const char *warg = argv[++i];
+
+			if (strcmp(warg, "0") == 0 || strcasecmp(warg, "off") == 0 ||
+			    strcasecmp(warg, "disable") == 0) {
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_OFF);
+				w_explicit_off = true;
+			} else if (strcmp(warg, "2") == 0 || strcasecmp(warg, "realtime") == 0 ||
+				   strcasecmp(warg, "pace") == 0) {
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_REALTIME);
+				w_explicit_off = false;
+			} else {
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+				w_explicit_off = false;
+			}
+		} else if (strcmp(argv[i], "-F") == 0 && i + 1 < argc) {
+			opt_freq = argv[++i];
+		} else if (strcmp(argv[i], "-M") == 0 && i + 1 < argc) {
+			remote_apply_mem_arg(argv[++i]);
+			if (!w_explicit_off &&
+			    host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+		} else if (strcmp(argv[i], "-T") == 0 && i + 1 < argc) {
+			tp->sched_trace_limit = atoi(argv[++i]);
+			if (tp->sched_trace_limit <= 0)
+				tp->sched_trace_limit = 64;
+		}
+	}
+
+	if (opt_preset) {
+		if (host_platform_apply_preset(opt_preset) < 0) {
+			free(copy);
+			st->sim_cfg = saved_sim_cfg;
+			st->hw_cfg = saved_hw_cfg;
+			tp->server_wait = saved_server_wait;
+			return off + snprintf(out_buf + off, out_cap - off,
+					      "error: unknown platform preset '%s'\n",
+					      opt_preset);
+		}
+		if (!w_explicit_off && host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+			host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+	}
+	if (opt_cores) {
+		int nc = atoi(opt_cores);
+
+		if (nc < 1 || nc > TB_TELEM_MAX_CORES ||
+		    host_platform_set_core_count((uint32_t)nc) < 0) {
+			free(copy);
+			st->sim_cfg = saved_sim_cfg;
+			st->hw_cfg = saved_hw_cfg;
+			tp->server_wait = saved_server_wait;
+			return off + snprintf(out_buf + off, out_cap - off,
+					      "error: invalid core count '%s' (expected 1..%d)\n",
+					      opt_cores, TB_TELEM_MAX_CORES);
+		}
+	}
+	if (opt_mem) {
+		if (remote_apply_mem_cfg_arg(opt_mem) < 0) {
+			free(copy);
+			st->sim_cfg = saved_sim_cfg;
+			st->hw_cfg = saved_hw_cfg;
+			tp->server_wait = saved_server_wait;
+			return off + snprintf(out_buf + off, out_cap - off,
+					      "error: invalid memory config '%s'\n", opt_mem);
+		}
+	}
+	if (opt_freq) {
+		remote_apply_freq_arg(opt_freq);
+		if (!w_explicit_off && host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+			host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+	}
+	free(copy);
+
+	if (!tp->fs_out)
+		tp->fs_out = tp->fs_in;
+	if (!tp->channels_out)
+		tp->channels_out = tp->channels_in;
+
+	if (!tp->tplg_file) {
+		st->sim_cfg = saved_sim_cfg;
+		st->hw_cfg = saved_hw_cfg;
+		st->num_cores = saved_hw_cfg.num_cores;
+		tp->server_wait = saved_server_wait;
+		return off + snprintf(out_buf + off, out_cap - off,
+				      "error: run-test requires -t <file.tplg>\n");
+	}
+
+	off += snprintf(out_buf + off, out_cap - off,
+			"==========================================================\n"
+			"		           Test Start 0\n"
+			"==========================================================\n");
+
+	host_telem_reset();
+
+	err = tb_load_topology(tp);
+	if (err < 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"error: topology load 0 failed %d\n", err);
+		goto cleanup;
+	}
+	cache_active_widget_names(tp);
+
+	err = tb_set_up_all_pipelines(tp);
+	if (err < 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"error: pipelines set up 0 failed %d\n", err);
+		goto cleanup;
+	}
+
+	err = tb_set_running_state(tp);
+	if (err < 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"error: pipelines state set 0 failed %d\n", err);
+		goto cleanup;
+	}
+
+	err = tb_find_file_components(tp);
+	if (err < 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"error: file component find failed %d\n", err);
+		goto cleanup;
+	}
+
+	/* Record active secondary core LL worker and DP module thread creation lines */
+	for (i = 1; i < CONFIG_CORE_COUNT && off + 128 < out_cap; i++) {
+		if (arch_cpu_enabled_cores() & BIT(i))
+			off += snprintf(out_buf + off, out_cap - off,
+					"LL worker thread created for DSP core %d (host CPU %d)\n",
+					i, i);
+	}
+	if (tp->widget_list.next) {
+		struct list_item *item;
+
+		list_for_item(item, &tp->widget_list) {
+			struct tplg_comp_info *ci = container_of(item, struct tplg_comp_info, item);
+
+			if (off + 160 >= out_cap)
+				break;
+			if (ci->proc_domain == 1 && tb_is_pipeline_enabled(tp, ci->pipeline_id))
+				off += snprintf(out_buf + off, out_cap - off,
+						"DP thread initialized for module %s (0x%x) on DSP core %d (host CPU %d)\n",
+						ci->name ? ci->name : "dp_mod",
+						(uint32_t)IPC4_COMP_ID(ci->module_id, ci->instance_id),
+						ci->core_id, ci->core_id);
+		}
+	}
+
+	if (!tp->fw[0].state) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"error: no active output file component found\n");
+		goto cleanup;
+	}
+	tp->has_output_file = true;
+	tp->last_output_time_ns = 0;
+
+	if (tp->control_file) {
+		FILE *cfh = fopen(tp->control_file, "r");
+
+		if (!cfh) {
+			off += snprintf(out_buf + off, out_cap - off,
+					"error: opening script %s (%s).\n",
+					tp->control_file, strerror(errno));
+			goto cleanup;
+		}
+		char cline[512];
+
+		while (fgets(cline, sizeof(cline), cfh) && off + 192 < out_cap) {
+			char *nl = strpbrk(cline, "\r\n");
+
+			if (nl)
+				*nl = '\0';
+			if (cline[0] != '#' && cline[0] != '\0')
+				off += snprintf(out_buf + off, out_cap - off,
+						"Info: Setting control name from '%s'\n", cline);
+		}
+		rewind(cfh);
+		tp->control_fh = cfh;
+	}
+
+	err = tb_read_controls(tp, &next_control_ns);
+	if (err) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"error: failed to read control commands.\n");
+		goto cleanup;
+	}
+
+	tb_gettime(&td0);
+	while (true) {
+		if (tp->copy_check) {
+			if (tp->copy_iterations-- <= 0)
+				break;
+		}
+		if (tb_schedule_pipeline_check_state(tp))
+			break;
+		if (next_control_ns && tp->has_output_file) {
+			time_ns = tp->last_output_time_ns;
+			if (time_ns >= next_control_ns) {
+				err = tb_read_controls(tp, &next_control_ns);
+				if (err) {
+					off += snprintf(out_buf + off, out_cap - off,
+							"error: failed to read control commands.\n");
+					goto cleanup;
+				}
+				if (next_control_ns)
+					next_control_ns += time_ns;
+			}
+		}
+	}
+	tb_schedule_pipeline_check_state(tp);
+	tb_gettime(&td1);
+
+	delta_t = (td1.tv_sec - td0.tv_sec) * 1000000LL;
+	delta_t += (td1.tv_nsec - td0.tv_nsec) / 1000LL;
+
+	memset(heap_records, 0, sizeof(heap_records));
+	tb_collect_heap_usage(tp, heap_records, &heap_records_count);
+
+	off = format_remote_test_summary(tp, delta_t, heap_records, heap_records_count,
+					 out_buf, off, out_cap);
+
+	err = tb_set_reset_state(tp);
+	if (err < 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"error: pipeline reset 0 failed %d\n", err);
+		goto cleanup;
+	}
+
+cleanup:
+	remote_unload_active_topology(tp);
+	st->sim_cfg = saved_sim_cfg;
+	st->hw_cfg = saved_hw_cfg;
+	st->num_cores = saved_hw_cfg.num_cores;
+	tp->server_wait = saved_server_wait;
+	return off;
+}
+
+static int execute_tb_shell_cmd(const char *cmd, char *out_buf, size_t out_cap)
+{
+	size_t off = 0;
+
+	if (strncmp(cmd, "host:", 5) == 0) {
+		FILE *fp = popen(cmd + 5, "r");
+
+		if (!fp)
+			return -errno;
+		while (off + 1 < out_cap) {
+			size_t n = fread(out_buf + off, 1, out_cap - 1 - off, fp);
+
+			if (n == 0)
+				break;
+			off += n;
+		}
+		out_buf[off] = '\0';
+		pclose(fp);
+		return (int)off;
+	}
+
+	pthread_mutex_lock(&g_tb_lock);
+
+	while (*cmd == ' ' || *cmd == '\t')
+		cmd++;
+
+	if (strcmp(cmd, "help") == 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"SOF Testbench Remote Shell Commands:\n"
+				"  help                         Show this help\n"
+				"  version | info               Show testbench version, platform, topology & core state\n"
+				"  platform-cfg [status|...]    Configure/query platform preset, core count, memory & freq\n"
+				"  pipelines | widgets          List active IPC pipelines, components & widgets\n"
+				"  modules                      List loaded built-in & dynamic LLEXT modules\n"
+				"  io-cfg [-i .. -o .. -r ..]   Configure input/output files, rates, channels & format\n"
+				"  tplg-load <file> [p1,p2,...] Dynamically load topology and start pipelines\n"
+				"  tplg-unload                  Stop, reset and free active topology & pipelines\n"
+				"  run-test -t <file> [...]     Run full topology test to EOF and return summary\n"
+				"  ppl-create <id> [prio] [core] Dynamically create an IPC4 pipeline\n"
+				"  ppl-state <id> <run|pause|reset> Set IPC4 pipeline state\n"
+				"  ppl-delete <id>              Delete an IPC4 pipeline\n"
+				"  mod-init <m> <i> <ppl> [c] [d] Initialize an IPC4 module instance\n"
+				"  mod-bind <sm> <si> <sq> <dm> <di> <dq>   Bind two module instances\n"
+				"  mod-unbind <sm> <si> <sq> <dm> <di> <dq> Unbind two module instances\n"
+				"  mod-delete <mod_id> <inst_id> Delete a module instance\n"
+				"  controls                     List topology ALSA kcontrols\n"
+				"  amixer cset name=\"...\" <val> Set mixer or enum control live\n"
+				"  sof-ctl -c name=\"...\" -s <f> Apply bytes control blob live\n"
+				"  stats | heap                 Show file I/O stats, platform memory & module heap usage\n"
+				"  sched-telem                  Show per-core, per-pipeline & per-module LL/DP telemetry\n"
+				"  sched-telem-reset            Reset scheduling telemetry counters\n"
+				"  workload-sim [status|...]    Configure/query CPC, core freq & SRAM/DRAM workload sim\n"
+				"  mod-buffers [id|name]        Show module entry/exit buffer levels, dBFS & sample taps\n"
+				"  kernel cycles                Show simulated DSP core tick & cycle counters\n"
+				"  kernel threads               Show active LL core & DP module worker threads\n"
+				"  pause | resume | step [N]    Pause, resume, or step N pipeline ticks\n"
+				"  loglevel <0..4>              Set trace print verbosity level\n"
+				"  quit                         Stop testbench simulation\n");
+	} else if (strcmp(cmd, "version") == 0 || strcmp(cmd, "info") == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"SOF Testbench v%d.%d.%d.%d (IPC4)\n"
+				"Platform: %s (%s)\n"
+				"Topology: %s\n"
+				"Enabled DSP Cores Mask: 0x%x (%u configured cores, max %d, C0=%u.%03u MHz)\n"
+				"Memory: HPSRAM=%zu/%zu KB (peak %zu KB), LPSRAM=%zu/%zu KB, DRAM=%zu/%zu KB\n"
+				"State: %s, Total Ticks: %llu, Tone Generator: %s (%u Hz)\n",
+				SOF_MAJOR, SOF_MINOR, SOF_MICRO, SOF_BUILD,
+				st->hw_cfg.platform_name[0] ? st->hw_cfg.platform_name : "default",
+				st->hw_cfg.arch_desc[0] ? st->hw_cfg.arch_desc : "Generic Host Testbench",
+				(g_tp && g_tp->tplg_file) ? g_tp->tplg_file : "none",
+				arch_cpu_enabled_cores(), st->hw_cfg.num_cores, CONFIG_CORE_COUNT,
+				st->sim_cfg.core_freq_hz[0] / 1000000U,
+				(st->sim_cfg.core_freq_hz[0] % 1000000U) / 1000U,
+				st->hw_cfg.hpsram_used_bytes / 1024UL,
+				st->hw_cfg.hpsram_size_bytes / 1024UL,
+				st->hw_cfg.hpsram_peak_bytes / 1024UL,
+				st->hw_cfg.lpsram_used_bytes / 1024UL,
+				st->hw_cfg.lpsram_size_bytes / 1024UL,
+				st->hw_cfg.dram_used_bytes / 1024UL,
+				st->hw_cfg.dram_size_bytes / 1024UL,
+				g_dsp_paused ? "PAUSED (D3)" : "RUNNING (D0)",
+				(unsigned long long)g_total_ticks,
+				g_tone_running ? "ON" : "OFF", g_tone_freq_hz);
+	} else if (strncmp(cmd, "platform-cfg", 12) == 0 || strncmp(cmd, "hw-cfg", 6) == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+		const char *sub = cmd + (strncmp(cmd, "platform-cfg", 12) == 0 ? 12 : 6);
+
+		while (*sub == ' ' || *sub == '\t')
+			sub++;
+
+		if (*sub == '\0' || strcmp(sub, "status") == 0) {
+			uint32_t c;
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"=== Platform Hardware Configuration ===\n"
+					"  Platform Preset:   %s (%s)\n"
+					"  HW IP Version:     0x%x\n"
+					"  Configured Cores:  %u (enabled mask: 0x%x, max supported: %d)\n"
+					"  HPSRAM Capacity:   %zu KB (%zu bytes) | used=%zu B peak=%zu B (%u EBB banks)\n"
+					"  LPSRAM Capacity:   %zu KB (%zu bytes) | used=%zu B peak=%zu B (%u EBB banks)\n"
+					"  DRAM/IMR Capacity: %zu KB (%zu bytes) | used=%zu B peak=%zu B\n"
+					"  Heap Allocations:  %llu total (%llu frees), %u OOM failures\n",
+					st->hw_cfg.platform_name[0] ? st->hw_cfg.platform_name : "default",
+					st->hw_cfg.arch_desc[0] ? st->hw_cfg.arch_desc : "Generic Host Testbench",
+					st->hw_cfg.hw_ip_version,
+					st->hw_cfg.num_cores, arch_cpu_enabled_cores(), CONFIG_CORE_COUNT,
+					st->hw_cfg.hpsram_size_bytes / 1024UL, st->hw_cfg.hpsram_size_bytes,
+					st->hw_cfg.hpsram_used_bytes, st->hw_cfg.hpsram_peak_bytes,
+					(uint32_t)(st->hw_cfg.hpsram_size_bytes / 65536UL),
+					st->hw_cfg.lpsram_size_bytes / 1024UL, st->hw_cfg.lpsram_size_bytes,
+					st->hw_cfg.lpsram_used_bytes, st->hw_cfg.lpsram_peak_bytes,
+					(uint32_t)(st->hw_cfg.lpsram_size_bytes / 65536UL),
+					st->hw_cfg.dram_size_bytes / 1024UL, st->hw_cfg.dram_size_bytes,
+					st->hw_cfg.dram_used_bytes, st->hw_cfg.dram_peak_bytes,
+					(unsigned long long)st->hw_cfg.total_alloc_calls,
+					(unsigned long long)st->hw_cfg.total_free_calls,
+					st->hw_cfg.alloc_failures);
+			for (c = 0; c < st->hw_cfg.num_cores && c < TB_TELEM_MAX_CORES && off + 128 < out_cap; c++) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"  [Core %u] enabled=%u freq=%u.%03u MHz (%u Hz, budget=%u cyc/ms)\n",
+						c, (st->hw_cfg.enabled_cores_mask & BIT(c)) ? 1 : 0,
+						st->sim_cfg.core_freq_hz[c] / 1000000U,
+						(st->sim_cfg.core_freq_hz[c] % 1000000U) / 1000U,
+						st->sim_cfg.core_freq_hz[c],
+						st->sim_cfg.core_freq_hz[c] / 1000U);
+			}
+		} else if (strcmp(sub, "presets") == 0 || strcmp(sub, "list") == 0) {
+			size_t count = 0, i;
+			const struct host_platform_preset *presets = host_platform_get_presets(&count);
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"=== Supported SOF Hardware Platform Presets ===\n"
+					"  %-8s %-14s %-5s %-11s %-10s %-10s %-10s %s\n",
+					"Preset", "Aliases", "Cores", "Clock", "HPSRAM", "LPSRAM", "DRAM/IMR", "Description");
+			for (i = 0; i < count && off + 192 < out_cap; i++) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"  %-8s %-14s %5u %4u.%03uMHz %7zu KB %7zu KB %7zu MB %s\n",
+						presets[i].name,
+						presets[i].aliases ? presets[i].aliases : "-",
+						presets[i].num_cores,
+						presets[i].freq_hz / 1000000U,
+						(presets[i].freq_hz % 1000000U) / 1000U,
+						presets[i].hpsram_size_bytes / 1024UL,
+						presets[i].lpsram_size_bytes / 1024UL,
+						presets[i].dram_size_bytes / (1024UL * 1024UL),
+						presets[i].desc);
+			}
+		} else if (strncmp(sub, "preset ", 7) == 0) {
+			const char *pname = sub + 7;
+
+			while (*pname == ' ' || *pname == '\t')
+				pname++;
+			if (host_platform_apply_preset(pname) < 0) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"Unknown platform preset '%s' (try 'platform-cfg presets')\n",
+						pname);
+			} else {
+				host_telem_reset();
+				off += snprintf(out_buf + off, out_cap - off,
+						"Applied platform preset '%s' (%s): %u cores @ %u.%03u MHz, HPSRAM=%zu KB, LPSRAM=%zu KB, DRAM=%zu KB\n",
+						st->hw_cfg.platform_name, st->hw_cfg.arch_desc,
+						st->hw_cfg.num_cores,
+						st->sim_cfg.core_freq_hz[0] / 1000000U,
+						(st->sim_cfg.core_freq_hz[0] % 1000000U) / 1000U,
+						st->hw_cfg.hpsram_size_bytes / 1024UL,
+						st->hw_cfg.lpsram_size_bytes / 1024UL,
+						st->hw_cfg.dram_size_bytes / 1024UL);
+			}
+		} else if (strncmp(sub, "cores ", 6) == 0) {
+			uint32_t ncores = (uint32_t)strtoul(sub + 6, NULL, 10);
+
+			if (host_platform_set_core_count(ncores) < 0) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"Invalid core count %u (supported: 1..%d)\n",
+						ncores, TB_TELEM_MAX_CORES);
+			} else {
+				host_telem_reset();
+				off += snprintf(out_buf + off, out_cap - off,
+						"Configured DSP core count set to %u (enabled mask: 0x%x)\n",
+						st->hw_cfg.num_cores, arch_cpu_enabled_cores());
+			}
+		} else if (strncmp(sub, "mem ", 4) == 0) {
+			const char *marg = sub + 4;
+
+			while (*marg == ' ' || *marg == '\t')
+				marg++;
+			if (remote_apply_mem_cfg_arg(marg) < 0) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"Invalid memory spec '%s' (expected <hpsram[,lpsram[,dram]]> e.g. 2816K,64K,16M)\n",
+						marg);
+			} else {
+				off += snprintf(out_buf + off, out_cap - off,
+						"Configured memory limits: HPSRAM=%zu KB, LPSRAM=%zu KB, DRAM=%zu KB\n",
+						st->hw_cfg.hpsram_size_bytes / 1024UL,
+						st->hw_cfg.lpsram_size_bytes / 1024UL,
+						st->hw_cfg.dram_size_bytes / 1024UL);
+			}
+		} else if (strncmp(sub, "freq ", 5) == 0) {
+			const char *farg = sub + 5;
+
+			while (*farg == ' ' || *farg == '\t')
+				farg++;
+			remote_apply_freq_arg(farg);
+			host_telem_reset();
+			off += snprintf(out_buf + off, out_cap - off,
+					"Configured core frequencies: C0=%u.%03u MHz C1=%u.%03u MHz C2=%u.%03u MHz C3=%u.%03u MHz\n",
+					st->sim_cfg.core_freq_hz[0] / 1000000U,
+					(st->sim_cfg.core_freq_hz[0] % 1000000U) / 1000U,
+					st->sim_cfg.core_freq_hz[1] / 1000000U,
+					(st->sim_cfg.core_freq_hz[1] % 1000000U) / 1000U,
+					st->sim_cfg.core_freq_hz[2] / 1000000U,
+					(st->sim_cfg.core_freq_hz[2] % 1000000U) / 1000U,
+					st->sim_cfg.core_freq_hz[3] / 1000000U,
+					(st->sim_cfg.core_freq_hz[3] % 1000000U) / 1000U);
+		} else {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage:\n"
+					"  platform-cfg status\n"
+					"  platform-cfg presets\n"
+					"  platform-cfg preset <tgl|tgl-h|mtl|arl|lnl|ptl|wcl|nvl|nvl-s|default>\n"
+					"  platform-cfg cores <1..%d>\n"
+					"  platform-cfg mem <hpsram[,lpsram[,dram]]> (e.g. 2816K,64K,16M)\n"
+					"  platform-cfg freq <mhz_or_hz | core:freq,...> (e.g. 393.216M or 0:442.368M)\n",
+					TB_TELEM_MAX_CORES);
+		}
+	} else if (strcmp(cmd, "pipelines") == 0 || strcmp(cmd, "widgets") == 0) {
+		struct ipc *ipc = sof_get() ? sof_get()->ipc : NULL;
+
+		if (ipc) {
+			struct list_item *clist;
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"=== Active IPC Pipelines & Components ===\n");
+			list_for_item(clist, &ipc->comp_list) {
+				struct ipc_comp_dev *icd =
+					container_of(clist, struct ipc_comp_dev, list);
+
+				if (off + 128 >= out_cap)
+					break;
+				if (icd->type == COMP_TYPE_PIPELINE && icd->pipeline) {
+					off += snprintf(out_buf + off, out_cap - off,
+							"  [PIPELINE] id=0x%06x pipe_id=%u core=%u prio=%u status=%u\n",
+							icd->id, icd->pipeline->pipeline_id,
+							icd->core, icd->pipeline->priority,
+							icd->pipeline->status);
+				} else if (icd->type == COMP_TYPE_COMPONENT && icd->cd) {
+					struct tplg_comp_info *ci =
+						find_comp_info_by_ipc_id(g_tp, icd->id);
+
+					off += snprintf(out_buf + off, out_cap - off,
+							"  [COMP    ] id=0x%06x mod=0x%02x inst=%2u core=%u %s state=%u name=%s\n",
+							icd->id,
+							IPC4_MOD_ID(icd->id),
+							IPC4_INST_ID(icd->id),
+							icd->core,
+							icd->cd->ipc_config.proc_domain ==
+								COMP_PROCESSING_DOMAIN_DP ? "DP" : "LL",
+							icd->cd->state,
+							(ci && ci->name) ? ci->name : "dynamic_mod");
+				}
+			}
+		}
+		off += snprintf(out_buf + off, out_cap - off,
+				"=== Loaded Topology Widgets & Pipelines ===\n");
+		if (g_tp && g_tp->widget_list.next) {
+			struct list_item *item;
+
+			list_for_item(item, &g_tp->widget_list) {
+				struct tplg_comp_info *ci =
+					container_of(item, struct tplg_comp_info, item);
+
+				if (off + 128 >= out_cap)
+					break;
+				if (!tb_is_pipeline_enabled(g_tp, ci->pipeline_id))
+					continue;
+				off += snprintf(out_buf + off, out_cap - off,
+						"  [pipe %2d | core %d | %s] id=0x%06x mod=0x%02x inst=%2d %-32s\n",
+						ci->pipeline_id, ci->core_id,
+						ci->proc_domain == 1 ? "DP" : "LL",
+						(uint32_t)IPC4_COMP_ID(ci->module_id,
+								       ci->instance_id),
+						ci->module_id, ci->instance_id,
+						ci->name ? ci->name : "unnamed");
+			}
+		} else if (g_tp && g_tp->info) {
+			for (int i = 0; i < g_tp->info_elems && off + 128 < out_cap; i++) {
+				struct tplg_comp_info *ci = &g_tp->info[i];
+
+				if (!tb_is_pipeline_enabled(g_tp, ci->pipeline_id))
+					continue;
+				off += snprintf(out_buf + off, out_cap - off,
+						"  [pipe %2d | core %d | %s] id=0x%06x mod=0x%02x inst=%2d %-32s\n",
+						ci->pipeline_id, ci->core_id,
+						ci->proc_domain == 1 ? "DP" : "LL",
+						(uint32_t)IPC4_COMP_ID(ci->module_id,
+								       ci->instance_id),
+						ci->module_id, ci->instance_id,
+						ci->name ? ci->name : "unnamed");
+			}
+		}
+	} else if (strcmp(cmd, "modules") == 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"=== Dynamic LLEXT / Shared Library Modules ===\n");
+		int lcount = 0;
+
+		for (int i = 0; i < TB_MAX_LOADED_LLEXTS && off + 128 < out_cap; i++) {
+			if (!g_loaded_llexts[i].active)
+				continue;
+			lcount++;
+			off += snprintf(out_buf + off, out_cap - off,
+					"  [lib_id=%u] name=%s size=%u path=%s dl=%s\n",
+					g_loaded_llexts[i].lib_id,
+					g_loaded_llexts[i].name,
+					g_loaded_llexts[i].data_size,
+					g_loaded_llexts[i].path,
+					g_loaded_llexts[i].dl_handle ? "loaded" : "registered");
+		}
+		if (lcount == 0)
+			off += snprintf(out_buf + off, out_cap - off, "  (none loaded via llext-load)\n");
+	} else if (strncmp(cmd, "io-cfg", 6) == 0) {
+		off = handle_remote_io_cfg(g_tp, cmd + 6, out_buf, off, out_cap);
+	} else if (strcmp(cmd, "tplg-unload") == 0) {
+		remote_unload_active_topology(g_tp);
+		off += snprintf(out_buf + off, out_cap - off,
+				"tplg-unload -> OK (all pipelines and topology freed)\n");
+	} else if (strncmp(cmd, "run-ipc", 7) == 0) {
+		off = handle_remote_run_ipc(g_tp, cmd + 7, out_buf, off, out_cap);
+	} else if (strncmp(cmd, "run-test", 8) == 0) {
+		off = handle_remote_run_test(g_tp, cmd + 8, out_buf, off, out_cap);
+	} else if (strncmp(cmd, "tplg-load ", 10) == 0) {
+		char tpath[256] = {0};
+		char plist[128] = {0};
+		int n = sscanf(cmd + 10, "%255s %127s", tpath, plist);
+
+		if (n < 1 || !g_tp) {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage: tplg-load <file.tplg> [p1,p2,...]\n");
+		} else {
+			remote_unload_active_topology(g_tp);
+			g_tp->tplg_file = strdup(tpath);
+			if (n >= 2)
+				remote_set_csv_pipelines(g_tp, plist);
+			int err = tb_load_topology(g_tp);
+
+			if (!err) {
+				cache_active_widget_names(g_tp);
+				err = tb_set_up_all_pipelines(g_tp);
+			}
+			if (!err)
+				err = tb_set_running_state(g_tp);
+			if (!err)
+				err = tb_find_file_components(g_tp);
+			if (!err)
+				pthread_cond_broadcast(&g_tb_cond);
+			off += snprintf(out_buf + off, out_cap - off,
+					"tplg-load '%s' -> %s (err=%d)\n",
+					tpath, err == 0 ? "OK" : "FAILED", err);
+		}
+	} else if (strncmp(cmd, "ppl-create ", 11) == 0) {
+		uint32_t inst_id = 0, prio = 0, core = 0;
+		int n = sscanf(cmd + 11, "%u %u %u", &inst_id, &prio, &core);
+
+		if (n < 1 || !sof_get() || !sof_get()->ipc || !sof_get()->ipc->comp_data) {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage: ppl-create <instance_id> [priority] [core_id]\n");
+		} else {
+			struct ipc4_pipeline_create msg = {{0}};
+			uint32_t *mbox = (uint32_t *)sof_get()->ipc->comp_data;
+
+			msg.primary.r.type = SOF_IPC4_GLB_CREATE_PIPELINE;
+			msg.primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG;
+			msg.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+			msg.primary.r.instance_id = inst_id;
+			msg.primary.r.ppl_priority = prio;
+			msg.primary.r.ppl_mem_size = 16;
+			msg.extension.r.core_id = core;
+
+			if (core < (uint32_t)arch_cpu_num_cores())
+				cpu_enable_core(core);
+
+			memcpy(mbox, &msg, sizeof(msg));
+			ipc_cmd((struct ipc_cmd_hdr *)mbox);
+			uint32_t st = mbox[0] & 0x00FFFFFFU;
+
+			pthread_cond_broadcast(&g_tb_cond);
+			off += snprintf(out_buf + off, out_cap - off,
+					"CREATE_PIPELINE(inst=%u, prio=%u, core=%u) -> status=%u (%s)\n",
+					inst_id, prio, core, st, st == 0 ? "IPC4_SUCCESS" : "FAILED");
+		}
+	} else if (strncmp(cmd, "mod-init ", 9) == 0) {
+		uint32_t mid = 0, iid = 0, ppl_id = 0, core = 0, dom = 0;
+		int n = sscanf(cmd + 9, "%i %i %i %i %i", &mid, &iid, &ppl_id, &core, &dom);
+
+		if (n < 3 || !sof_get() || !sof_get()->ipc || !sof_get()->ipc->comp_data) {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage: mod-init <mod_id> <inst_id> <ppl_id> [core_id] [domain(0=LL,1=DP)]\n");
+		} else {
+			struct {
+				struct ipc4_base_module_cfg base_cfg;
+				struct sof_uuid uuid;
+			} init_payload;
+			struct ipc4_module_init_instance msg = {{0}};
+			uint32_t *mbox = (uint32_t *)sof_get()->ipc->comp_data;
+			/* Default to mixin UUID (39656eb2-3b71-4049-8d3f-f92cd5c43c09) or mixout (0x3) */
+			static const struct sof_uuid mixin_uuid = {
+				.a = 0x39656eb2, .b = 0x3b71, .c = 0x4049,
+				.d = { 0x8d, 0x3f, 0xf9, 0x2c, 0xd5, 0xc4, 0x3c, 0x09 }
+			};
+			static const struct sof_uuid mixout_uuid = {
+				.a = 0x3c56505a, .b = 0x24d7, .c = 0x418f,
+				.d = { 0xbd, 0xdc, 0xc1, 0xf5, 0xa3, 0xac, 0x2a, 0xe0 }
+			};
+
+			if (core < (uint32_t)arch_cpu_num_cores())
+				cpu_enable_core(core);
+
+			memset(&init_payload, 0, sizeof(init_payload));
+			init_payload.base_cfg.cpc = 1000;
+			init_payload.base_cfg.ibs = 384;
+			init_payload.base_cfg.obs = 384;
+			init_payload.base_cfg.is_pages = 1;
+			init_payload.base_cfg.audio_fmt.sampling_frequency = 48000;
+			init_payload.base_cfg.audio_fmt.depth = 32;
+			init_payload.base_cfg.audio_fmt.ch_map = 0xFFFFFF10U;
+			init_payload.base_cfg.audio_fmt.ch_cfg = 1; /* STEREO */
+			init_payload.base_cfg.audio_fmt.interleaving_style = 0;
+			init_payload.base_cfg.audio_fmt.channels_count = 2;
+			init_payload.base_cfg.audio_fmt.valid_bit_depth = 32;
+			init_payload.base_cfg.audio_fmt.s_type = 0;
+			init_payload.uuid = (mid == 3) ? mixout_uuid : mixin_uuid;
+
+			if (g_tp && g_tp->widget_list.next) {
+				struct list_item *it;
+
+				list_for_item(it, &g_tp->widget_list) {
+					struct tplg_comp_info *ci =
+						container_of(it, struct tplg_comp_info, item);
+					if ((uint32_t)ci->module_id == mid) {
+						init_payload.uuid = ci->uuid;
+						break;
+					}
+				}
+			}
+
+			msg.primary.r.type = SOF_IPC4_MOD_INIT_INSTANCE;
+			msg.primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_MODULE_MSG;
+			msg.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+			msg.primary.r.module_id = mid;
+			msg.primary.r.instance_id = iid;
+			msg.extension.r.param_block_size = sizeof(init_payload) / sizeof(uint32_t);
+			msg.extension.r.ppl_instance_id = ppl_id;
+			msg.extension.r.core_id = core;
+			msg.extension.r.proc_domain = dom ? 1 : 0;
+
+			memset(mbox, 0, SOF_IPC_MSG_MAX_SIZE);
+			mbox[0] = msg.primary.dat;
+			mbox[1] = msg.extension.dat;
+			memcpy(&mbox[2], &init_payload, sizeof(init_payload));
+			ipc_cmd((struct ipc_cmd_hdr *)mbox);
+			uint32_t st = mbox[0] & 0x00FFFFFFU;
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"MOD_INIT_INSTANCE(mod=0x%x, inst=%u, ppl=%u, core=%u, dom=%s) -> status=%u (%s)\n",
+					mid, iid, ppl_id, core, dom ? "DP" : "LL", st,
+					st == 0 ? "IPC4_SUCCESS" : "FAILED");
+		}
+	} else if (strncmp(cmd, "ppl-state ", 10) == 0) {
+		uint32_t inst_id = 0;
+		char state_str[32] = {0};
+
+		if (sscanf(cmd + 10, "%u %31s", &inst_id, state_str) < 2 ||
+		    !sof_get() || !sof_get()->ipc || !sof_get()->ipc->comp_data) {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage: ppl-state <instance_id> <running|paused|reset>\n");
+		} else {
+			uint32_t pstate = SOF_IPC4_PIPELINE_STATE_PAUSED;
+
+			if (strncmp(state_str, "run", 3) == 0 || strcmp(state_str, "2") == 0)
+				pstate = SOF_IPC4_PIPELINE_STATE_RUNNING;
+			else if (strncmp(state_str, "pause", 5) == 0 || strcmp(state_str, "3") == 0)
+				pstate = SOF_IPC4_PIPELINE_STATE_PAUSED;
+			else if (strncmp(state_str, "reset", 5) == 0 || strcmp(state_str, "1") == 0)
+				pstate = SOF_IPC4_PIPELINE_STATE_RESET;
+
+			struct ipc4_pipeline_set_state msg = {{0}};
+			uint32_t *mbox = (uint32_t *)sof_get()->ipc->comp_data;
+
+			msg.primary.r.type = SOF_IPC4_GLB_SET_PIPELINE_STATE;
+			msg.primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG;
+			msg.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+			msg.primary.r.ppl_state = pstate;
+			msg.primary.r.ppl_id = inst_id;
+			msg.extension.r.multi_ppl = 0;
+			mbox[0] = msg.primary.dat;
+			mbox[1] = msg.extension.dat;
+			ipc_cmd((struct ipc_cmd_hdr *)mbox);
+			uint32_t st = mbox[0] & 0x00FFFFFFU;
+
+			schedule_ll_run_tasks();
+			off += snprintf(out_buf + off, out_cap - off,
+					"SET_PIPELINE_STATE(inst=%u, state=%u) -> status=%u (%s)\n",
+					inst_id, pstate, st, st == 0 ? "IPC4_SUCCESS" : "FAILED");
+		}
+	} else if (strncmp(cmd, "ppl-delete ", 11) == 0) {
+		uint32_t inst_id = (uint32_t)atoi(cmd + 11);
+
+		if (!sof_get() || !sof_get()->ipc || !sof_get()->ipc->comp_data) {
+			off += snprintf(out_buf + off, out_cap - off, "Error: IPC not ready\n");
+		} else {
+			struct ipc4_pipeline_delete msg = {{0}};
+			uint32_t *mbox = (uint32_t *)sof_get()->ipc->comp_data;
+
+			msg.primary.r.type = SOF_IPC4_GLB_DELETE_PIPELINE;
+			msg.primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG;
+			msg.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+			msg.primary.r.instance_id = inst_id;
+			memcpy(mbox, &msg, sizeof(msg));
+			ipc_cmd((struct ipc_cmd_hdr *)mbox);
+			uint32_t st = mbox[0] & 0x00FFFFFFU;
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"DELETE_PIPELINE(inst=%u) -> status=%u (%s)\n",
+					inst_id, st, st == 0 ? "IPC4_SUCCESS" : "FAILED");
+		}
+	} else if (strncmp(cmd, "mod-bind ", 9) == 0 || strncmp(cmd, "mod-unbind ", 11) == 0) {
+		bool is_unbind = strncmp(cmd, "mod-unbind ", 11) == 0;
+		const char *args = cmd + (is_unbind ? 11 : 9);
+		uint32_t sm = 0, si = 0, sq = 0, dm = 0, di = 0, dq = 0;
+
+		if (sscanf(args, "%i %i %i %i %i %i", &sm, &si, &sq, &dm, &di, &dq) < 6 ||
+		    !sof_get() || !sof_get()->ipc || !sof_get()->ipc->comp_data) {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage: %s <src_mod> <src_inst> <src_q> <dst_mod> <dst_inst> <dst_q>\n",
+					is_unbind ? "mod-unbind" : "mod-bind");
+		} else {
+			struct ipc4_module_bind_unbind bu = {{0}};
+			uint32_t *mbox = (uint32_t *)sof_get()->ipc->comp_data;
+
+			bu.primary.r.module_id = sm;
+			bu.primary.r.instance_id = si;
+			bu.primary.r.type = is_unbind ? SOF_IPC4_MOD_UNBIND : SOF_IPC4_MOD_BIND;
+			bu.primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_MODULE_MSG;
+			bu.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+			bu.extension.r.dst_module_id = dm;
+			bu.extension.r.dst_instance_id = di;
+			bu.extension.r.dst_queue = dq;
+			bu.extension.r.src_queue = sq;
+			memcpy(mbox, &bu, sizeof(bu));
+			ipc_cmd((struct ipc_cmd_hdr *)mbox);
+			uint32_t st = mbox[0] & 0x00FFFFFFU;
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"%s(0x%x:%u q%u -> 0x%x:%u q%u) -> status=%u (%s)\n",
+					is_unbind ? "MOD_UNBIND" : "MOD_BIND",
+					sm, si, sq, dm, di, dq, st,
+					st == 0 ? "IPC4_SUCCESS" : "FAILED");
+		}
+	} else if (strncmp(cmd, "mod-delete ", 11) == 0) {
+		uint32_t mid = 0, iid = 0;
+
+		if (sscanf(cmd + 11, "%i %i", &mid, &iid) < 2 ||
+		    !sof_get() || !sof_get()->ipc || !sof_get()->ipc->comp_data) {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage: mod-delete <mod_id> <inst_id>\n");
+		} else {
+			struct ipc4_module_delete_instance del = {{0}};
+			uint32_t *mbox = (uint32_t *)sof_get()->ipc->comp_data;
+
+			del.primary.r.type = SOF_IPC4_MOD_DELETE_INSTANCE;
+			del.primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_MODULE_MSG;
+			del.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+			del.primary.r.module_id = mid;
+			del.primary.r.instance_id = iid;
+			memcpy(mbox, &del, sizeof(del));
+			ipc_cmd((struct ipc_cmd_hdr *)mbox);
+			uint32_t st = mbox[0] & 0x00FFFFFFU;
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"MOD_DELETE_INSTANCE(mod=0x%x, inst=%u) -> status=%u (%s)\n",
+					mid, iid, st, st == 0 ? "IPC4_SUCCESS" : "FAILED");
+		}
+	} else if (strcmp(cmd, "controls") == 0) {
+		off += snprintf(out_buf + off, out_cap - off,
+				"=== Topology Kcontrols (%u total) ===\n",
+				g_tp ? g_tp->glb_ctx.num_ctls : 0);
+		if (g_tp) {
+			for (uint32_t i = 0; i < g_tp->glb_ctx.num_ctls && off + 128 < out_cap; i++) {
+				struct tb_ctl *ctl = &g_tp->glb_ctx.ctl[i];
+				const char *tstr = (ctl->type == SND_SOC_TPLG_TYPE_MIXER) ? "MIXER" :
+						   (ctl->type == SND_SOC_TPLG_TYPE_BYTES) ? "BYTES" :
+						   (ctl->type == SND_SOC_TPLG_TYPE_ENUM)  ? "ENUM" : "OTHER";
+
+				off += snprintf(out_buf + off, out_cap - off,
+						"  [%2u] %-6s mod=0x%02x inst=%u name='%s'\n",
+						i, tstr, ctl->module_id, ctl->instance_id, ctl->name);
+			}
+		}
+	} else if (strncmp(cmd, "amixer ", 7) == 0 ||
+		   strncmp(cmd, "cset ", 5) == 0 ||
+		   strncmp(cmd, "sof-ctl ", 8) == 0) {
+		if (!g_tp) {
+			off += snprintf(out_buf + off, out_cap - off, "Error: testbench not ready\n");
+		} else {
+			int rc = tb_apply_control_line(g_tp, cmd);
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"Control command '%s' -> %s (rc=%d)\n",
+					cmd, rc == 0 ? "OK" : "FAILED", rc);
+		}
+	} else if (strcmp(cmd, "stats") == 0 || strcmp(cmd, "heap") == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"=== Platform Memory Summary (%s) ===\n"
+				"  HPSRAM: used=%8zu B / %8zu B (%zu KB) | peak=%8zu B | EBBs=%u\n"
+				"  LPSRAM: used=%8zu B / %8zu B (%zu KB) | peak=%8zu B | EBBs=%u\n"
+				"  DRAM:   used=%8zu B / %8zu B (%zu KB) | peak=%8zu B\n"
+				"  Allocs: %llu total (%llu frees), %u OOM failures\n",
+				st->hw_cfg.platform_name[0] ? st->hw_cfg.platform_name : "default",
+				st->hw_cfg.hpsram_used_bytes, st->hw_cfg.hpsram_size_bytes,
+				st->hw_cfg.hpsram_size_bytes / 1024UL, st->hw_cfg.hpsram_peak_bytes,
+				(uint32_t)(st->hw_cfg.hpsram_size_bytes / 65536UL),
+				st->hw_cfg.lpsram_used_bytes, st->hw_cfg.lpsram_size_bytes,
+				st->hw_cfg.lpsram_size_bytes / 1024UL, st->hw_cfg.lpsram_peak_bytes,
+				(uint32_t)(st->hw_cfg.lpsram_size_bytes / 65536UL),
+				st->hw_cfg.dram_used_bytes, st->hw_cfg.dram_size_bytes,
+				st->hw_cfg.dram_size_bytes / 1024UL, st->hw_cfg.dram_peak_bytes,
+				(unsigned long long)st->hw_cfg.total_alloc_calls,
+				(unsigned long long)st->hw_cfg.total_free_calls,
+				st->hw_cfg.alloc_failures);
+		if (g_tp) {
+			off += snprintf(out_buf + off, out_cap - off, "\n=== File I/O Stats ===\n");
+			for (int i = 0; i < g_tp->input_file_num && off + 128 < out_cap; i++) {
+				if (g_tp->fr[i].state)
+					off += snprintf(out_buf + off, out_cap - off,
+							"  IN [%d] pipe=%d file=%s samples=%d copies=%d\n",
+							i, g_tp->fr[i].pipeline_id,
+							g_tp->fr[i].state->fn,
+							g_tp->fr[i].state->n,
+							g_tp->fr[i].state->copy_count);
+			}
+			for (int i = 0; i < g_tp->output_file_num && off + 128 < out_cap; i++) {
+				if (g_tp->fw[i].state)
+					off += snprintf(out_buf + off, out_cap - off,
+							"  OUT[%d] pipe=%d file=%s samples=%d copies=%d\n",
+							i, g_tp->fw[i].pipeline_id,
+							g_tp->fw[i].state->fn,
+							g_tp->fw[i].state->n,
+							g_tp->fw[i].state->copy_count);
+			}
+
+			struct tb_heap_usage_record recs[64];
+			int rcount = 0;
+
+			memset(recs, 0, sizeof(recs));
+			tb_collect_heap_usage(g_tp, recs, &rcount);
+			off += snprintf(out_buf + off, out_cap - off, "\n=== Module Heap Usage ===\n");
+			for (int i = 0; i < rcount && off + 96 < out_cap; i++) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"  %-32s %8zu bytes\n",
+						recs[i].module_name, recs[i].heap_max);
+			}
+		}
+	} else if (strcmp(cmd, "sched-telem-reset") == 0) {
+		host_telem_reset();
+		off += snprintf(out_buf + off, out_cap - off,
+				"Scheduling & buffer telemetry counters reset.\n");
+	} else if (strncmp(cmd, "workload-sim", 12) == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+		const char *sub = cmd + 12;
+
+		while (*sub == ' ' || *sub == '\t')
+			sub++;
+
+		if (*sub == '\0' || strcmp(sub, "status") == 0) {
+			const char *mstr =
+				(st->sim_cfg.mode == HOST_WORKLOAD_SIM_REALTIME) ? "REALTIME-PACED" :
+				(st->sim_cfg.mode == HOST_WORKLOAD_SIM_VIRTUAL)  ? "VIRTUAL-SIM" :
+										   "OFF (HOST-MEASURED)";
+			const char *dstr =
+				(st->sim_cfg.default_mem_domain == HOST_MEM_DOMAIN_DRAM) ? "DRAM" : "SRAM";
+			uint32_t i;
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"=== Workload Execution Time Simulation ===\n"
+					"  Platform:          %s (%u cores, HPSRAM=%zu KB, LPSRAM=%zu KB, DRAM=%zu KB)\n"
+					"  Mode:              %s (%u)\n"
+					"  Default Memory:    %s (SRAM=%u.%02ux, DRAM=%u.%02ux + %u cyc/word)\n"
+					"  Module Overrides:  %u active\n",
+					st->hw_cfg.platform_name[0] ? st->hw_cfg.platform_name : "default",
+					st->hw_cfg.num_cores,
+					st->hw_cfg.hpsram_size_bytes / 1024UL,
+					st->hw_cfg.lpsram_size_bytes / 1024UL,
+					st->hw_cfg.dram_size_bytes / 1024UL,
+					mstr, st->sim_cfg.mode, dstr,
+					st->sim_cfg.sram_factor_x100 / 100,
+					st->sim_cfg.sram_factor_x100 % 100,
+					st->sim_cfg.dram_factor_x100 / 100,
+					st->sim_cfg.dram_factor_x100 % 100,
+					st->sim_cfg.dram_cycles_per_word,
+					st->sim_cfg.num_overrides);
+			for (i = 0; i < st->hw_cfg.num_cores && i < TB_TELEM_MAX_CORES && off + 192 < out_cap; i++) {
+				struct host_core_telem *ct = &st->cores[i];
+
+				off += snprintf(out_buf + off, out_cap - off,
+						"  [Core %u] target_freq=%u.%03u MHz (budget=%u cyc/ms) active=%u util=%u.%02u%% overruns=%u LL_exec=%llu.%03llu/%llu.%03lluus DP_exec=%llu.%03llu/%llu.%03lluus\n",
+						i, st->sim_cfg.core_freq_hz[i] / 1000000U,
+						(st->sim_cfg.core_freq_hz[i] % 1000000U) / 1000U,
+						st->sim_cfg.core_freq_hz[i] / 1000U,
+						ct->active ? 1 : 0,
+						ct->total_util_x100 / 100, ct->total_util_x100 % 100,
+						ct->ll_deadline_violations,
+						(unsigned long long)(ct->ll_avg_exec_ns / 1000ULL),
+						(unsigned long long)(ct->ll_avg_exec_ns % 1000ULL),
+						(unsigned long long)(ct->ll_peak_exec_ns / 1000ULL),
+						(unsigned long long)(ct->ll_peak_exec_ns % 1000ULL),
+						(unsigned long long)(ct->dp_avg_exec_ns / 1000ULL),
+						(unsigned long long)(ct->dp_avg_exec_ns % 1000ULL),
+						(unsigned long long)(ct->dp_peak_exec_ns / 1000ULL),
+						(unsigned long long)(ct->dp_peak_exec_ns % 1000ULL));
+			}
+			for (i = 0; i < st->num_mods && off + 192 < out_cap; i++) {
+				struct host_mod_telem *mt = &st->mods[i];
+				struct tplg_comp_info *ci;
+				const char *wname;
+
+				if (!mt->active)
+					continue;
+				ci = find_comp_info_by_ipc_id(g_tp, mt->comp_id);
+				wname = (ci && ci->name) ? ci->name : "comp";
+				off += snprintf(out_buf + off, out_cap - off,
+						"  [Mod 0x%06x %-22s] core=%u %s mem=%s cpc=%u avg_cyc=%llu (%u kcps) exec=%llu.%03llu/%llu.%03lluus viol=%u\n",
+						mt->comp_id, wname, mt->core_id,
+						mt->proc_domain == COMP_PROCESSING_DOMAIN_DP ? "DP" : "LL",
+						mt->mem_domain == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+						mt->effective_cpc,
+						(unsigned long long)mt->avg_cycles, mt->avg_kcps,
+						(unsigned long long)(mt->avg_exec_ns / 1000ULL),
+						(unsigned long long)(mt->avg_exec_ns % 1000ULL),
+						(unsigned long long)(mt->peak_exec_ns / 1000ULL),
+						(unsigned long long)(mt->peak_exec_ns % 1000ULL),
+						mt->cpc_violations);
+			}
+		} else if (strncmp(sub, "enable", 6) == 0 || strncmp(sub, "on", 2) == 0) {
+			const char *arg = sub + (strncmp(sub, "enable", 6) == 0 ? 6 : 2);
+			uint32_t m = HOST_WORKLOAD_SIM_VIRTUAL;
+
+			while (*arg == ' ' || *arg == '\t')
+				arg++;
+			if (strcasecmp(arg, "realtime") == 0 || strcasecmp(arg, "pace") == 0 ||
+			    strcmp(arg, "2") == 0)
+				m = HOST_WORKLOAD_SIM_REALTIME;
+			host_workload_sim_set_mode(m);
+			host_telem_reset();
+			off += snprintf(out_buf + off, out_cap - off,
+					"Workload simulation enabled (mode=%s)\n",
+					m == HOST_WORKLOAD_SIM_REALTIME ? "REALTIME-PACED" : "VIRTUAL-SIM");
+		} else if (strncmp(sub, "disable", 7) == 0 || strncmp(sub, "off", 3) == 0) {
+			host_workload_sim_set_mode(HOST_WORKLOAD_SIM_OFF);
+			host_telem_reset();
+			off += snprintf(out_buf + off, out_cap - off,
+					"Workload simulation disabled (using measured host CPU cycles)\n");
+		} else if (strncmp(sub, "freq ", 5) == 0) {
+			const char *farg = sub + 5;
+
+			while (*farg == ' ' || *farg == '\t')
+				farg++;
+			remote_apply_freq_arg(farg);
+			if (host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+			host_telem_reset();
+			off += snprintf(out_buf + off, out_cap - off,
+					"Target core frequencies updated: C0=%u.%03uMHz C1=%u.%03uMHz C2=%u.%03uMHz C3=%u.%03uMHz\n",
+					st->sim_cfg.core_freq_hz[0] / 1000000U,
+					(st->sim_cfg.core_freq_hz[0] % 1000000U) / 1000U,
+					st->sim_cfg.core_freq_hz[1] / 1000000U,
+					(st->sim_cfg.core_freq_hz[1] % 1000000U) / 1000U,
+					st->sim_cfg.core_freq_hz[2] / 1000000U,
+					(st->sim_cfg.core_freq_hz[2] % 1000000U) / 1000U,
+					st->sim_cfg.core_freq_hz[3] / 1000000U,
+					(st->sim_cfg.core_freq_hz[3] % 1000000U) / 1000U);
+		} else if (strncmp(sub, "mem ", 4) == 0) {
+			const char *marg = sub + 4;
+			char dom_str[16] = {0};
+			uint32_t factor = 0, c_word = 0;
+			uint32_t dom = HOST_MEM_DOMAIN_SRAM;
+
+			while (*marg == ' ' || *marg == '\t')
+				marg++;
+			sscanf(marg, "%15s %u %u", dom_str, &factor, &c_word);
+			if (strncasecmp(dom_str, "dram", 4) == 0 || strcmp(dom_str, "1") == 0)
+				dom = HOST_MEM_DOMAIN_DRAM;
+			host_workload_sim_set_mem_domain(dom, factor, c_word);
+			if (host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+			host_telem_reset();
+			off += snprintf(out_buf + off, out_cap - off,
+					"Memory execution domain set to %s (DRAM factor=%u.%02ux, %u cyc/word)\n",
+					dom == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+					st->sim_cfg.dram_factor_x100 / 100,
+					st->sim_cfg.dram_factor_x100 % 100,
+					st->sim_cfg.dram_cycles_per_word);
+		} else if (strncmp(sub, "mod ", 4) == 0) {
+			const char *marg = sub + 4;
+			char target_tok[64] = {0};
+			uint32_t comp_id = 0xFFFFFFFFU;
+			uint32_t cpc_ov = 0;
+			uint32_t mem_ov = HOST_MEM_DOMAIN_AUTO;
+			const char *p_cpc, *p_mem;
+
+			while (*marg == ' ' || *marg == '\t')
+				marg++;
+			sscanf(marg, "%63s", target_tok);
+			if (target_tok[0] >= '0' && target_tok[0] <= '9') {
+				comp_id = (uint32_t)strtoul(target_tok, NULL, 0);
+			} else if (g_tp) {
+				for (uint32_t i = 0; i < st->num_mods; i++) {
+					struct tplg_comp_info *ci =
+						find_comp_info_by_ipc_id(g_tp, st->mods[i].comp_id);
+					if (ci && ci->name && strstr(ci->name, target_tok)) {
+						comp_id = st->mods[i].comp_id;
+						break;
+					}
+				}
+			}
+			p_cpc = strstr(marg, "cpc=");
+			if (p_cpc)
+				cpc_ov = (uint32_t)strtoul(p_cpc + 4, NULL, 0);
+			p_mem = strstr(marg, "mem=");
+			if (p_mem) {
+				if (strncasecmp(p_mem + 4, "dram", 4) == 0)
+					mem_ov = HOST_MEM_DOMAIN_DRAM;
+				else if (strncasecmp(p_mem + 4, "sram", 4) == 0)
+					mem_ov = HOST_MEM_DOMAIN_SRAM;
+			}
+			if (comp_id == 0xFFFFFFFFU) {
+				off += snprintf(out_buf + off, out_cap - off,
+						"Usage: workload-sim mod <comp_id|name> [cpc=<cycles>] [mem=<sram|dram>]\n");
+			} else {
+				host_workload_sim_set_mod_override(comp_id, cpc_ov, mem_ov);
+				if (host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+					host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+				host_telem_reset();
+				off += snprintf(out_buf + off, out_cap - off,
+						"Override set for module 0x%06x: cpc=%u mem=%s\n",
+						comp_id, cpc_ov,
+						mem_ov == HOST_MEM_DOMAIN_DRAM ? "DRAM" :
+						(mem_ov == HOST_MEM_DOMAIN_SRAM ? "SRAM" : "AUTO"));
+			}
+		} else if (strcmp(sub, "reset") == 0) {
+			host_workload_sim_clear_overrides();
+			host_telem_reset();
+			off += snprintf(out_buf + off, out_cap - off,
+					"Cleared module workload overrides and reset telemetry.\n");
+		} else {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Usage:\n"
+					"  workload-sim status\n"
+					"  workload-sim enable [virtual|realtime]\n"
+					"  workload-sim disable\n"
+					"  workload-sim freq <mhz | core:mhz,...>\n"
+					"  workload-sim mem <sram|dram> [dram_factor_x100] [cycles_per_word]\n"
+					"  workload-sim mod <comp_id|name> [cpc=<cycles>] [mem=<sram|dram>]\n"
+					"  workload-sim reset\n");
+		}
+	} else if (strcmp(cmd, "sched-telem") == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+		const char *mode_str =
+			(st->sim_cfg.mode == HOST_WORKLOAD_SIM_REALTIME) ? "REALTIME-PACED" :
+			(st->sim_cfg.mode == HOST_WORKLOAD_SIM_VIRTUAL)  ? "VIRTUAL-SIM" :
+									   "HOST-MEASURED";
+		const char *mem_str =
+			(st->sim_cfg.default_mem_domain == HOST_MEM_DOMAIN_DRAM) ? "DRAM" : "SRAM";
+		uint32_t i;
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"=== Per-Core LL & DP Scheduler Telemetry [Platform=%s(%uc) Mode=%s Mem=%s DRAM_Factor=%u.%02ux] ===\n",
+				st->hw_cfg.platform_name[0] ? st->hw_cfg.platform_name : "default",
+				st->hw_cfg.num_cores,
+				mode_str, mem_str,
+				st->sim_cfg.dram_factor_x100 / 100,
+				st->sim_cfg.dram_factor_x100 % 100);
+		for (i = 0; i < st->hw_cfg.num_cores && i < TB_TELEM_MAX_CORES && off + 256 < out_cap; i++) {
+			struct host_core_telem *ct = &st->cores[i];
+
+			if (!ct->active && !(arch_cpu_enabled_cores() & BIT(i)))
+				continue;
+			off += snprintf(out_buf + off, out_cap - off,
+					"  [Core %u %u.%03uMHz] util=%u.%02u%% overruns=%u | LL: ticks=%u tasks=%u avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus | DP: runs=%u thr=%u avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus\n",
+					i, ct->freq_hz / 1000000U, (ct->freq_hz % 1000000U) / 1000U,
+					ct->total_util_x100 / 100, ct->total_util_x100 % 100,
+					ct->ll_deadline_violations,
+					ct->ll_tick_count, ct->ll_active_tasks,
+					(unsigned long long)ct->ll_avg_cycles,
+					(unsigned long long)ct->ll_peak_cycles,
+					(unsigned long long)ct->ll_total_cycles,
+					ct->ll_avg_kcps, ct->ll_peak_kcps,
+					(unsigned long long)(ct->ll_avg_exec_ns / 1000ULL),
+					(unsigned long long)(ct->ll_avg_exec_ns % 1000ULL),
+					(unsigned long long)(ct->ll_peak_exec_ns / 1000ULL),
+					(unsigned long long)(ct->ll_peak_exec_ns % 1000ULL),
+					ct->dp_run_count, ct->dp_active_threads,
+					(unsigned long long)ct->dp_avg_cycles,
+					(unsigned long long)ct->dp_peak_cycles,
+					(unsigned long long)ct->dp_total_cycles,
+					ct->dp_avg_kcps, ct->dp_peak_kcps,
+					(unsigned long long)(ct->dp_avg_exec_ns / 1000ULL),
+					(unsigned long long)(ct->dp_avg_exec_ns % 1000ULL),
+					(unsigned long long)(ct->dp_peak_exec_ns / 1000ULL),
+					(unsigned long long)(ct->dp_peak_exec_ns % 1000ULL));
+		}
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"\n=== Per-Pipeline Scheduling Telemetry (%u active) ===\n",
+				st->num_pipes);
+		for (i = 0; i < st->num_pipes && off + 224 < out_cap; i++) {
+			struct host_pipe_telem *pt = &st->pipes[i];
+
+			if (!pt->active)
+				continue;
+			off += snprintf(out_buf + off, out_cap - off,
+					"  [Pipe %2u] core=%u prio=%u per=%uus mem=%s mods=%uLL/%uDP copies=%llu avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus xruns=%u\n",
+					pt->pipeline_id, pt->core_id, pt->priority, pt->period_us,
+					pt->mem_domain == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+					pt->num_ll_modules, pt->num_dp_modules,
+					(unsigned long long)pt->copy_iterations,
+					(unsigned long long)pt->avg_cycles,
+					(unsigned long long)pt->peak_cycles,
+					(unsigned long long)pt->total_cycles,
+					pt->avg_kcps, pt->peak_kcps,
+					(unsigned long long)(pt->avg_exec_ns / 1000ULL),
+					(unsigned long long)(pt->avg_exec_ns % 1000ULL),
+					(unsigned long long)(pt->peak_exec_ns / 1000ULL),
+					(unsigned long long)(pt->peak_exec_ns % 1000ULL),
+					pt->xrun_count);
+		}
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"\n=== Per-Module LL & DP Scheduling + Entry/Exit Buffer Telemetry (%u active) ===\n",
+				st->num_mods);
+		for (i = 0; i < st->num_mods && off + 288 < out_cap; i++) {
+			struct host_mod_telem *mt = &st->mods[i];
+			const char *wname;
+
+			if (!mt->active)
+				continue;
+			wname = resolve_comp_widget_name(g_tp, mt->comp_id);
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"  [0x%06x %-24s] pipe=%u core=%u %s mem=%s iters=%llu avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus last=%llu.%03llu->%llu.%03lluus(dl=%llu.%03lluus) ibs=%u obs=%u cpc=%u(viol=%u)",
+					mt->comp_id, wname, mt->pipeline_id, mt->core_id,
+					mt->proc_domain == COMP_PROCESSING_DOMAIN_DP ? "DP" : "LL",
+					mt->mem_domain == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+					(unsigned long long)mt->iterations,
+					(unsigned long long)mt->avg_cycles,
+					(unsigned long long)mt->peak_cycles,
+					(unsigned long long)mt->total_cycles,
+					mt->avg_kcps, mt->peak_kcps,
+					(unsigned long long)(mt->avg_exec_ns / 1000ULL),
+					(unsigned long long)(mt->avg_exec_ns % 1000ULL),
+					(unsigned long long)(mt->peak_exec_ns / 1000ULL),
+					(unsigned long long)(mt->peak_exec_ns % 1000ULL),
+					(unsigned long long)(mt->last_start_ns / 1000ULL),
+					(unsigned long long)(mt->last_start_ns % 1000ULL),
+					(unsigned long long)(mt->last_complete_ns / 1000ULL),
+					(unsigned long long)(mt->last_complete_ns % 1000ULL),
+					(unsigned long long)(mt->last_deadline_ns / 1000ULL),
+					(unsigned long long)(mt->last_deadline_ns % 1000ULL),
+					mt->ibs, mt->obs, mt->effective_cpc, mt->cpc_violations);
+			if (mt->proc_domain == COMP_PROCESSING_DOMAIN_DP) {
+				off += snprintf(out_buf + off, out_cap - off,
+						" ll_sync=%llu(%llu cyc)",
+						(unsigned long long)mt->ll_ring_sync_iterations,
+						(unsigned long long)mt->ll_ring_sync_total_cycles);
+			}
+			if (mt->num_in_pins > 0 && mt->in_pins[0].active) {
+				struct host_mod_pin_telem *pin = &mt->in_pins[0];
+
+				off += snprintf(out_buf + off, out_cap - off,
+						" | IN0: %u->%uB xfer=%uB(tot=%lluB) rms=%d.%02ddBFS",
+						pin->dp_ring_size ? pin->dp_ring_entry_avail :
+								    pin->entry_avail_bytes,
+						pin->dp_ring_size ? pin->dp_ring_exit_avail :
+								    pin->exit_avail_bytes,
+						pin->last_bytes_transferred,
+						(unsigned long long)pin->total_bytes_transferred,
+						pin->entry_rms_dbfs_x100 / 100,
+						abs(pin->entry_rms_dbfs_x100 % 100));
+			}
+			if (mt->num_out_pins > 0 && mt->out_pins[0].active) {
+				struct host_mod_pin_telem *pin = &mt->out_pins[0];
+
+				off += snprintf(out_buf + off, out_cap - off,
+						" | OUT0: %u->%uB xfer=%uB(tot=%lluB) rms=%d.%02ddBFS",
+						pin->dp_ring_size ? pin->dp_ring_entry_avail :
+								    pin->entry_avail_bytes,
+						pin->dp_ring_size ? pin->dp_ring_exit_avail :
+								    pin->exit_avail_bytes,
+						pin->last_bytes_transferred,
+						(unsigned long long)pin->total_bytes_transferred,
+						pin->exit_rms_dbfs_x100 / 100,
+						abs(pin->exit_rms_dbfs_x100 % 100));
+			}
+			off += snprintf(out_buf + off, out_cap - off, "\n");
+		}
+	} else if (strncmp(cmd, "sched-trace", 11) == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+		const char *arg = cmd + 11;
+		uint32_t max_ev = 64;
+		struct host_sched_trace_event *ev_buf;
+		uint64_t total_ev = st ? st->trace_total_events : 0;
+		uint32_t avail_ev = st ? st->trace_count : 0;
+		uint32_t n_ev, e;
+
+		while (*arg == ' ' || *arg == '\t')
+			arg++;
+		if (strcmp(arg, "clear") == 0 || strcmp(arg, "--clear") == 0) {
+			host_telem_trace_clear();
+			off += snprintf(out_buf + off, out_cap - off,
+					"Cleared per-iteration scheduling timeline ring buffer.\n");
+		} else {
+			if (*arg >= '0' && *arg <= '9') {
+				max_ev = (uint32_t)strtoul(arg, NULL, 10);
+				if (max_ev == 0)
+					max_ev = 64;
+				if (max_ev > TB_TELEM_TRACE_CAPACITY)
+					max_ev = TB_TELEM_TRACE_CAPACITY;
+			}
+			ev_buf = calloc(max_ev, sizeof(*ev_buf));
+			if (ev_buf) {
+				n_ev = host_telem_trace_read(ev_buf, max_ev, 0, -1, -1, -1, -1);
+				off += snprintf(out_buf + off, out_cap - off,
+						"=== Per-Iteration LL & DP Module Scheduling Timeline (showing %u of %llu events, ring=%u) ===\n"
+						"  %-5s %-5s %-5s %-4s %-4s %-7s %-32s %12s %12s %10s %12s %21s %13s %11s\n",
+						n_ev, (unsigned long long)total_ev, avail_ev,
+						"Seq", "Tick", "Iter", "Core", "Pipe", "Domain",
+						"Module", "Start(us)", "Complete(us)", "Dur(us)",
+						"Deadline(us)", "Start->End(cyc)", "Cyc/Budget",
+						"In->Out(B)");
+				for (e = 0; e < n_ev && off + 224 < out_cap; e++) {
+					struct host_sched_trace_event *ev = &ev_buf[e];
+					const char *ename = resolve_comp_widget_name(g_tp, ev->comp_id);
+					const char *dom =
+						(ev->event_type == HOST_SCHED_EVT_DP_RUN) ? "DP-RUN" :
+						(ev->event_type == HOST_SCHED_EVT_DP_SYNC) ? "DP-SYNC" :
+											     "LL-COPY";
+					uint64_t dur_ns = (ev->complete_ns >= ev->start_ns) ?
+							  (ev->complete_ns - ev->start_ns) : 0;
+					char mod_col[48];
+					char cyc_col[48];
+					char bud_col[32];
+					char io_col[32];
+
+					snprintf(mod_col, sizeof(mod_col), "0x%06x %.22s",
+						 ev->comp_id, ename);
+					snprintf(cyc_col, sizeof(cyc_col), "%llu->%llu",
+						 (unsigned long long)ev->start_cycles,
+						 (unsigned long long)ev->complete_cycles);
+					snprintf(bud_col, sizeof(bud_col), "%u/%u%s",
+						 ev->duration_cycles, ev->cpc_budget,
+						 ev->cpc_violation ? "!" : "");
+					snprintf(io_col, sizeof(io_col), "%u->%u",
+						 ev->bytes_in, ev->bytes_out);
+
+					off += snprintf(out_buf + off, out_cap - off,
+							"  %-5u %-5u %-5u C%-3u P%-3u %-7s %-32s %8llu.%03llu %8llu.%03llu %6llu.%03llu %8llu.%03llu %21s %13s %11s\n",
+							ev->seq_id, ev->ll_tick_nr, ev->mod_iter_nr,
+							ev->core_id, ev->pipeline_id, dom, mod_col,
+							(unsigned long long)(ev->start_ns / 1000ULL),
+							(unsigned long long)(ev->start_ns % 1000ULL),
+							(unsigned long long)(ev->complete_ns / 1000ULL),
+							(unsigned long long)(ev->complete_ns % 1000ULL),
+							(unsigned long long)(dur_ns / 1000ULL),
+							(unsigned long long)(dur_ns % 1000ULL),
+							(unsigned long long)(ev->deadline_ns / 1000ULL),
+							(unsigned long long)(ev->deadline_ns % 1000ULL),
+							cyc_col, bud_col, io_col);
+				}
+				free(ev_buf);
+			}
+		}
+	} else if (strncmp(cmd, "mod-buffers", 11) == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+		const char *filter = cmd + 11;
+		uint32_t filter_id = 0xFFFFFFFFU;
+		uint32_t i, p, s;
+
+		while (*filter == ' ' || *filter == '\t')
+			filter++;
+		if (*filter >= '0' && *filter <= '9')
+			filter_id = (uint32_t)strtoul(filter, NULL, 0);
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"=== Module Entry/Exit Buffer Data & Sample Taps ===\n");
+		for (i = 0; i < st->num_mods && off + 384 < out_cap; i++) {
+			struct host_mod_telem *mt = &st->mods[i];
+			struct tplg_comp_info *ci;
+			const char *wname;
+
+			if (!mt->active)
+				continue;
+			ci = find_comp_info_by_ipc_id(g_tp, mt->comp_id);
+			wname = (ci && ci->name) ? ci->name : "comp";
+
+			if (*filter) {
+				if (filter_id != 0xFFFFFFFFU) {
+					if (mt->comp_id != filter_id)
+						continue;
+				} else if (!strstr(wname, filter)) {
+					continue;
+				}
+			}
+
+			off += snprintf(out_buf + off, out_cap - off,
+					"[0x%06x %s] pipe=%u core=%u domain=%s iters=%llu cyc(last=%llu avg=%llu peak=%llu)\n",
+					mt->comp_id, wname, mt->pipeline_id, mt->core_id,
+					mt->proc_domain == COMP_PROCESSING_DOMAIN_DP ? "DP" : "LL",
+					(unsigned long long)mt->iterations,
+					(unsigned long long)mt->last_cycles,
+					(unsigned long long)mt->avg_cycles,
+					(unsigned long long)mt->peak_cycles);
+
+			for (p = 0; p < mt->num_in_pins && off + 256 < out_cap; p++) {
+				struct host_mod_pin_telem *pin = &mt->in_pins[p];
+
+				if (!pin->active)
+					continue;
+				off += snprintf(out_buf + off, out_cap - off,
+						"  IN [%u] buf=%u peer=0x%x %uHz/%uch/fmt=%u size=%uB LL(entry=%u/%uB -> exit=%u/%uB)",
+						p, pin->buf_id, pin->peer_comp_id,
+						pin->rate, pin->channels, pin->frame_fmt,
+						pin->buf_size,
+						pin->entry_avail_bytes, pin->entry_free_bytes,
+						pin->exit_avail_bytes, pin->exit_free_bytes);
+				if (pin->dp_ring_size > 0) {
+					off += snprintf(out_buf + off, out_cap - off,
+							" DP_RING(size=%uB entry=%u/%uB -> exit=%u/%uB)",
+							pin->dp_ring_size,
+							pin->dp_ring_entry_avail,
+							pin->dp_ring_entry_free,
+							pin->dp_ring_exit_avail,
+							pin->dp_ring_exit_free);
+				}
+				off += snprintf(out_buf + off, out_cap - off,
+						" consumed=%uB(tot=%lluB) entry_rms=%d.%02ddB(pk=%d.%02ddB) exit_rms=%d.%02ddB\n",
+						pin->last_bytes_transferred,
+						(unsigned long long)pin->total_bytes_transferred,
+						pin->entry_rms_dbfs_x100 / 100,
+						abs(pin->entry_rms_dbfs_x100 % 100),
+						pin->entry_peak_dbfs_x100 / 100,
+						abs(pin->entry_peak_dbfs_x100 % 100),
+						pin->exit_rms_dbfs_x100 / 100,
+						abs(pin->exit_rms_dbfs_x100 % 100));
+				if (pin->entry_num_samples > 0 && off + 160 < out_cap) {
+					uint16_t n = pin->entry_num_samples < 8 ?
+						     pin->entry_num_samples : 8;
+					off += snprintf(out_buf + off, out_cap - off,
+							"         entry_samples[%u]:",
+							pin->entry_num_samples);
+					for (s = 0; s < n; s++)
+						off += snprintf(out_buf + off, out_cap - off,
+								" %d", pin->entry_samples[s]);
+					off += snprintf(out_buf + off, out_cap - off, "\n");
+				}
+			}
+
+			for (p = 0; p < mt->num_out_pins && off + 256 < out_cap; p++) {
+				struct host_mod_pin_telem *pin = &mt->out_pins[p];
+
+				if (!pin->active)
+					continue;
+				off += snprintf(out_buf + off, out_cap - off,
+						"  OUT[%u] buf=%u peer=0x%x %uHz/%uch/fmt=%u size=%uB LL(entry=%u/%uB -> exit=%u/%uB)",
+						p, pin->buf_id, pin->peer_comp_id,
+						pin->rate, pin->channels, pin->frame_fmt,
+						pin->buf_size,
+						pin->entry_avail_bytes, pin->entry_free_bytes,
+						pin->exit_avail_bytes, pin->exit_free_bytes);
+				if (pin->dp_ring_size > 0) {
+					off += snprintf(out_buf + off, out_cap - off,
+							" DP_RING(size=%uB entry=%u/%uB -> exit=%u/%uB)",
+							pin->dp_ring_size,
+							pin->dp_ring_entry_avail,
+							pin->dp_ring_entry_free,
+							pin->dp_ring_exit_avail,
+							pin->dp_ring_exit_free);
+				}
+				off += snprintf(out_buf + off, out_cap - off,
+						" produced=%uB(tot=%lluB) entry_rms=%d.%02ddB exit_rms=%d.%02ddB(pk=%d.%02ddB)\n",
+						pin->last_bytes_transferred,
+						(unsigned long long)pin->total_bytes_transferred,
+						pin->entry_rms_dbfs_x100 / 100,
+						abs(pin->entry_rms_dbfs_x100 % 100),
+						pin->exit_rms_dbfs_x100 / 100,
+						abs(pin->exit_rms_dbfs_x100 % 100),
+						pin->exit_peak_dbfs_x100 / 100,
+						abs(pin->exit_peak_dbfs_x100 % 100));
+				if (pin->exit_num_samples > 0 && off + 160 < out_cap) {
+					uint16_t n = pin->exit_num_samples < 8 ?
+						     pin->exit_num_samples : 8;
+					off += snprintf(out_buf + off, out_cap - off,
+							"         exit_samples[%u]: ",
+							pin->exit_num_samples);
+					for (s = 0; s < n; s++)
+						off += snprintf(out_buf + off, out_cap - off,
+								" %d", pin->exit_samples[s]);
+					off += snprintf(out_buf + off, out_cap - off, "\n");
+				}
+			}
+		}
+	} else if (strcmp(cmd, "kernel cycles") == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+		uint32_t mask = arch_cpu_enabled_cores();
+		uint32_t ncores = st ? st->hw_cfg.num_cores : CONFIG_CORE_COUNT;
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"Simulated DSP Clock: %u Hz (%u.%03u MHz, Platform: %s, %u cores), Total LL Ticks: %llu\n",
+				st ? st->sim_cfg.core_freq_hz[0] : (uint32_t)TB_DSP_NOMINAL_HZ,
+				(st ? st->sim_cfg.core_freq_hz[0] : (uint32_t)TB_DSP_NOMINAL_HZ) / 1000000U,
+				((st ? st->sim_cfg.core_freq_hz[0] : (uint32_t)TB_DSP_NOMINAL_HZ) % 1000000U) / 1000U,
+				(st && st->hw_cfg.platform_name[0]) ? st->hw_cfg.platform_name : "default",
+				ncores, (unsigned long long)g_total_ticks);
+		for (int c = 0; c < (int)ncores && c < CONFIG_CORE_COUNT && off + 128 < out_cap; c++) {
+			if (!(mask & BIT(c)))
+				continue;
+			off += snprintf(out_buf + off, out_cap - off,
+					"  Core %d (%u.%03u MHz): ticks=%u last_cyc=%u max_cyc=%u avg_kcps=%u peak_kcps=%u\n",
+					c,
+					st ? st->sim_cfg.core_freq_hz[c] / 1000000U : 400U,
+					st ? (st->sim_cfg.core_freq_hz[c] % 1000000U) / 1000U : 0U,
+					g_core_ticks[c].count,
+					g_core_ticks[c].last_time_elapsed,
+					g_core_ticks[c].max_time_elapsed,
+					g_core_ticks[c].avg_utilization,
+					g_core_ticks[c].peak_utilization);
+		}
+	} else if (strcmp(cmd, "kernel threads") == 0) {
+		struct host_sched_telemetry *st = host_telem_get();
+		uint32_t ncores = st ? st->hw_cfg.num_cores : CONFIG_CORE_COUNT;
+		uint32_t mask = arch_cpu_enabled_cores();
+
+		off += snprintf(out_buf + off, out_cap - off,
+				"=== Active Testbench Worker Threads (%s, %u configured cores) ===\n",
+				(st && st->hw_cfg.platform_name[0]) ? st->hw_cfg.platform_name : "default",
+				ncores);
+		for (int c = 0; c < (int)ncores && c < CONFIG_CORE_COUNT && off + 128 < out_cap; c++) {
+			if (mask & BIT(c))
+				off += snprintf(out_buf + off, out_cap - off,
+						"  [LL Worker Core %d] state=%s ticks=%u\n",
+						c, g_dsp_paused ? "SUSPENDED" : "RUNNING",
+						g_core_ticks[c].count);
+		}
+		if (g_tp && g_tp->widget_list.next) {
+			struct list_item *item;
+
+			list_for_item(item, &g_tp->widget_list) {
+				struct tplg_comp_info *ci =
+					container_of(item, struct tplg_comp_info, item);
+
+				if (off + 128 >= out_cap)
+					break;
+				if (ci->proc_domain == 1 &&
+				    tb_is_pipeline_enabled(g_tp, ci->pipeline_id))
+					off += snprintf(out_buf + off, out_cap - off,
+							"  [DP Worker Core %d] module=%s (0x%x)\n",
+							ci->core_id,
+							ci->name ? ci->name : "dp_mod",
+							(uint32_t)IPC4_COMP_ID(ci->module_id,
+									       ci->instance_id));
+			}
+		} else if (g_tp && g_tp->info) {
+			for (int i = 0; i < g_tp->info_elems && off + 128 < out_cap; i++) {
+				struct tplg_comp_info *ci = &g_tp->info[i];
+
+				if (ci->proc_domain == 1 &&
+				    tb_is_pipeline_enabled(g_tp, ci->pipeline_id))
+					off += snprintf(out_buf + off, out_cap - off,
+							"  [DP Worker Core %d] module=%s (0x%x)\n",
+							ci->core_id,
+							ci->name ? ci->name : "dp_mod",
+							(uint32_t)IPC4_COMP_ID(ci->module_id,
+									       ci->instance_id));
+			}
+		}
+	} else if (strcmp(cmd, "pause") == 0) {
+		g_dsp_paused = true;
+		off += snprintf(out_buf + off, out_cap - off, "Testbench paused (D3)\n");
+	} else if (strcmp(cmd, "resume") == 0) {
+		g_dsp_paused = false;
+		pthread_cond_broadcast(&g_tb_cond);
+		off += snprintf(out_buf + off, out_cap - off, "Testbench resumed (D0)\n");
+	} else if (strncmp(cmd, "step", 4) == 0) {
+		int n = atoi(cmd + 4);
+
+		if (n <= 0)
+			n = 1;
+		g_step_ticks_remaining = n;
+		pthread_cond_broadcast(&g_tb_cond);
+		off += snprintf(out_buf + off, out_cap - off, "Stepping %d tick(s)\n", n);
+	} else if (strncmp(cmd, "loglevel ", 9) == 0) {
+		int lvl = atoi(cmd + 9);
+
+		if (lvl >= 0 && lvl <= 4) {
+			tb_enable_trace((unsigned int)lvl);
+			off += snprintf(out_buf + off, out_cap - off,
+					"Trace level set to %d\n", lvl);
+		} else {
+			off += snprintf(out_buf + off, out_cap - off,
+					"Invalid loglevel (expected 0..4)\n");
+		}
+	} else if (strcmp(cmd, "quit") == 0) {
+		g_quit_requested = true;
+		g_dsp_paused = false;
+		pthread_cond_broadcast(&g_tb_cond);
+		off += snprintf(out_buf + off, out_cap - off, "Stopping testbench...\n");
+	} else {
+		off += snprintf(out_buf + off, out_cap - off,
+				"Unknown command '%s' (try 'help')\n", cmd);
+	}
+
+	snprintf(g_last_shell_output, sizeof(g_last_shell_output), "%s\nuart:~$ ", out_buf);
+	pthread_mutex_unlock(&g_tb_lock);
+	return (int)off;
+}
+
+/* -------------------------------------------------------------------------
+ * Per-Opcode RPC Handlers
+ * -------------------------------------------------------------------------
+ */
+
+static int handle_ipc_large_cfg(int sock, uint32_t req_id, const uint8_t *req_buf,
+				uint32_t req_len)
+{
+	if (req_len < sizeof(struct sof_net_large_cfg_req))
+		return send_reply(sock, SOF_NET_OP_IPC_LARGE_CFG, req_id, -EINVAL, NULL, 0);
+
+	const struct sof_net_large_cfg_req *lreq = (const struct sof_net_large_cfg_req *)req_buf;
+
+	if (!lreq->data_size || lreq->data_size > (256 * 1024))
+		return send_reply(sock, SOF_NET_OP_IPC_LARGE_CFG, req_id, -EINVAL, NULL, 0);
+
+	uint8_t *dbuf = calloc(1, lreq->data_size);
+
+	if (!dbuf)
+		return send_reply(sock, SOF_NET_OP_IPC_LARGE_CFG, req_id, -ENOMEM, NULL, 0);
+
+	uint32_t out_len = 0;
+	int st = 0;
+
+	pthread_mutex_lock(&g_tb_lock);
+
+	if (lreq->module_id == 0) {
+		/* BaseFW Large Config */
+		uint32_t param_type = lreq->param_id & 0xFF;
+
+		if (lreq->set_get == SOF_CDEV_LARGE_CFG_SET) {
+			if (req_len < sizeof(*lreq) + lreq->data_size) {
+				st = -EINVAL;
+			} else if (param_type == TB_IPC4_PERF_MEASUREMENTS_STATE) {
+				g_perf_meas_state = *(const uint8_t *)(req_buf + sizeof(*lreq));
+				if (g_perf_meas_state == 1 /* STOPPED */) {
+					memset(g_core_ticks, 0, sizeof(g_core_ticks));
+					host_telem_reset();
+				}
+			}
+		} else {
+			switch (param_type) {
+			case TB_IPC4_FW_CONFIG:
+			case TB_IPC4_HW_CONFIG_GET:
+				out_len = build_hw_config_tlv(dbuf, lreq->data_size);
+				break;
+			case TB_IPC4_MODULES_INFO_GET:
+				out_len = build_modules_info_tlv(g_tp, dbuf, lreq->data_size);
+				break;
+			case TB_IPC4_MEMORY_STATE_INFO_GET:
+				out_len = build_memory_state_tlv(g_tp, dbuf, lreq->data_size);
+				break;
+			case TB_IPC4_POWER_STATE_INFO_GET:
+				out_len = build_power_state_tlv(dbuf, lreq->data_size);
+				break;
+			case TB_IPC4_GLOBAL_PERF_DATA:
+			case TB_IPC4_EXTENDED_GLOBAL_PERF_DATA:
+				out_len = build_ext_perf_tlv(g_tp, dbuf, lreq->data_size);
+				break;
+			case TB_IPC4_PERF_MEASUREMENTS_STATE:
+				if (lreq->data_size >= 4) {
+					memcpy(dbuf, &g_perf_meas_state, 4);
+					out_len = 4;
+				}
+				break;
+			default:
+				st = -ENOENT;
+				break;
+			}
+		}
+	} else {
+		/* Module Instance Large Config */
+		uint32_t comp_id = IPC4_COMP_ID(lreq->module_id, lreq->instance_id);
+		struct ipc_comp_dev *icd = sof_get()->ipc ?
+					   ipc_get_comp_by_id(sof_get()->ipc, comp_id) : NULL;
+
+		if (!icd || !icd->cd || !icd->cd->drv) {
+			st = -ENOENT;
+		} else if (lreq->set_get == SOF_CDEV_LARGE_CFG_SET) {
+			if (req_len < sizeof(*lreq) + lreq->data_size) {
+				st = -EINVAL;
+			} else if (icd->cd->drv->ops.set_large_config) {
+				int rc = icd->cd->drv->ops.set_large_config(
+					icd->cd, lreq->param_id, true, true, lreq->data_size,
+					(const char *)(req_buf + sizeof(*lreq)));
+				st = (rc == 0) ? 0 : -EIO;
+			} else {
+				st = -ENOTSUP;
+			}
+		} else {
+			if (icd->cd->drv->ops.get_large_config) {
+				out_len = lreq->data_size;
+				int rc = icd->cd->drv->ops.get_large_config(
+					icd->cd, lreq->param_id, true, true,
+					&out_len, (char *)dbuf);
+				st = (rc == 0) ? 0 : -EIO;
+			} else {
+				st = -ENOTSUP;
+			}
+		}
+	}
+
+	pthread_mutex_unlock(&g_tb_lock);
+
+	int ret = send_reply(sock, SOF_NET_OP_IPC_LARGE_CFG, req_id, st,
+			     (st == 0 && lreq->set_get == SOF_CDEV_LARGE_CFG_GET) ? dbuf : NULL,
+			     (st == 0 && lreq->set_get == SOF_CDEV_LARGE_CFG_GET) ? out_len : 0);
+	free(dbuf);
+	return ret;
+}
+
+static int handle_workload_sim_cfg(int sock, uint32_t req_id, const uint8_t *req_buf,
+				   uint32_t req_len)
+{
+	struct sof_net_workload_sim_req req = {0};
+	struct sof_net_workload_sim_rsp rsp = {0};
+	struct host_sched_telemetry *st;
+	int c;
+
+	if (req_len >= sizeof(req))
+		memcpy(&req, req_buf, sizeof(req));
+
+	pthread_mutex_lock(&g_tb_lock);
+	st = host_telem_get();
+
+	if (req.op == SOF_WORKLOAD_SIM_OP_SET) {
+		host_workload_sim_set_mode(req.mode);
+		host_workload_sim_set_mem_domain(req.default_mem_domain,
+						 req.dram_factor_x100,
+						 req.dram_cycles_per_word);
+		for (c = 0; c < TB_TELEM_MAX_CORES && c < 8; c++) {
+			if (req.core_freq_hz[c] > 0) {
+				uint32_t hz = (req.core_freq_hz[c] < 100000U) ?
+					      (req.core_freq_hz[c] * 1000000U) :
+					      req.core_freq_hz[c];
+				host_workload_sim_set_core_freq(c, hz);
+			}
+		}
+		host_telem_reset();
+	} else if (req.op == SOF_WORKLOAD_SIM_OP_MOD_SET) {
+		host_workload_sim_set_mod_override(req.target_comp_id,
+						   req.cpc_override,
+						   req.mem_domain_override);
+		if (host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+			host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+		host_telem_reset();
+	} else if (req.op == SOF_WORKLOAD_SIM_OP_RESET_OVERRIDES) {
+		host_workload_sim_clear_overrides();
+		host_telem_reset();
+	}
+
+	rsp.status = 0;
+	rsp.mode = st->sim_cfg.mode;
+	rsp.default_mem_domain = st->sim_cfg.default_mem_domain;
+	rsp.sram_factor_x100 = st->sim_cfg.sram_factor_x100;
+	rsp.dram_factor_x100 = st->sim_cfg.dram_factor_x100;
+	rsp.dram_cycles_per_word = st->sim_cfg.dram_cycles_per_word;
+	rsp.num_cores = st->hw_cfg.num_cores;
+	rsp.num_overrides = st->sim_cfg.num_overrides;
+
+	for (c = 0; c < TB_TELEM_MAX_CORES && c < 8; c++) {
+		rsp.cores[c].active = st->cores[c].active ? 1 : 0;
+		rsp.cores[c].freq_hz = st->sim_cfg.core_freq_hz[c];
+		rsp.cores[c].total_util_x100 = st->cores[c].total_util_x100;
+		rsp.cores[c].ll_deadline_violations = st->cores[c].ll_deadline_violations;
+		rsp.cores[c].ll_avg_kcps = st->cores[c].ll_avg_kcps;
+		rsp.cores[c].ll_peak_kcps = st->cores[c].ll_peak_kcps;
+		rsp.cores[c].ll_avg_exec_ns = st->cores[c].ll_avg_exec_ns;
+		rsp.cores[c].ll_peak_exec_ns = st->cores[c].ll_peak_exec_ns;
+		rsp.cores[c].dp_avg_kcps = st->cores[c].dp_avg_kcps;
+		rsp.cores[c].dp_peak_kcps = st->cores[c].dp_peak_kcps;
+		rsp.cores[c].dp_avg_exec_ns = st->cores[c].dp_avg_exec_ns;
+		rsp.cores[c].dp_peak_exec_ns = st->cores[c].dp_peak_exec_ns;
+	}
+
+	pthread_mutex_unlock(&g_tb_lock);
+	return send_reply(sock, SOF_NET_OP_WORKLOAD_SIM_CFG, req_id, 0, &rsp, sizeof(rsp));
+}
+
+static int handle_sched_trace(int sock, uint32_t req_id, const uint8_t *req_buf,
+			      uint32_t req_len)
+{
+	struct sof_net_sched_trace_req req = {
+		.op = SOF_SCHED_TRACE_OP_READ,
+		.max_events = 256,
+		.filter_core_id = 0xFFFFFFFFU,
+		.filter_pipe_id = 0xFFFFFFFFU,
+		.filter_comp_id = 0xFFFFFFFFU,
+		.filter_domain  = 0xFFFFFFFFU,
+	};
+	struct host_sched_trace_event *raw_events = NULL;
+	struct host_sched_telemetry *st;
+	uint64_t total_recorded = 0;
+	uint32_t avail_in_ring = 0;
+	uint32_t raw_count = 0;
+	uint32_t matched_count = 0;
+	uint32_t max_ret;
+	uint32_t start_idx = 0;
+	uint32_t out_idx = 0;
+	uint32_t i;
+
+	if (req_len >= sizeof(req))
+		memcpy(&req, req_buf, sizeof(req));
+
+	max_ret = (req.max_events > 0 && req.max_events <= TB_TELEM_TRACE_CAPACITY) ?
+		  req.max_events : 256;
+
+	pthread_mutex_lock(&g_tb_lock);
+	st = host_telem_get();
+
+	if (req.op == SOF_SCHED_TRACE_OP_CLEAR) {
+		host_telem_trace_clear();
+		struct sof_net_sched_trace_hdr chdr = {0};
+
+		if (st) {
+			chdr.num_cores = st->hw_cfg.num_cores;
+			chdr.sim_mode = st->sim_cfg.mode;
+			chdr.current_ll_tick = st->current_ll_tick;
+			snprintf(chdr.platform_name, sizeof(chdr.platform_name), "%s",
+				 st->hw_cfg.platform_name[0] ?
+				 st->hw_cfg.platform_name : "default");
+		}
+		pthread_mutex_unlock(&g_tb_lock);
+		return send_reply(sock, SOF_NET_OP_SCHED_TRACE, req_id, 0, &chdr, sizeof(chdr));
+	}
+
+	raw_events = calloc(max_ret, sizeof(*raw_events));
+	if (!raw_events) {
+		pthread_mutex_unlock(&g_tb_lock);
+		return send_reply(sock, SOF_NET_OP_SCHED_TRACE, req_id, -ENOMEM, NULL, 0);
+	}
+
+	total_recorded = st ? st->trace_total_events : 0;
+	avail_in_ring = st ? st->trace_count : 0;
+	raw_count = host_telem_trace_read(raw_events, max_ret, req.since_seq_id,
+					  (req.filter_core_id == 0xFFFFFFFFU) ?
+					  -1 : (int)req.filter_core_id,
+					  (req.filter_pipe_id == 0xFFFFFFFFU) ?
+					  -1 : (int)req.filter_pipe_id,
+					  (req.filter_comp_id == 0xFFFFFFFFU) ?
+					  -1 : (int)req.filter_comp_id,
+					  (req.filter_domain == 0xFFFFFFFFU) ?
+					  -1 : (int)req.filter_domain);
+	matched_count = raw_count;
+
+	uint32_t ret_events = matched_count - start_idx;
+	uint32_t rsp_len = sizeof(struct sof_net_sched_trace_hdr) +
+			   ret_events * sizeof(struct sof_net_sched_trace_entry);
+	uint8_t *rsp_buf = calloc(1, rsp_len);
+
+	if (!rsp_buf) {
+		free(raw_events);
+		pthread_mutex_unlock(&g_tb_lock);
+		return send_reply(sock, SOF_NET_OP_SCHED_TRACE, req_id, -ENOMEM, NULL, 0);
+	}
+
+	struct sof_net_sched_trace_hdr *hdr = (struct sof_net_sched_trace_hdr *)rsp_buf;
+	struct sof_net_sched_trace_entry *entries =
+		(struct sof_net_sched_trace_entry *)(rsp_buf + sizeof(*hdr));
+
+	hdr->status = 0;
+	hdr->total_recorded_events = (uint32_t)total_recorded;
+	hdr->avail_in_ring = avail_in_ring;
+	hdr->returned_events = ret_events;
+	hdr->current_ll_tick = st ? st->current_ll_tick : 0;
+	hdr->num_cores = st ? st->hw_cfg.num_cores : CONFIG_CORE_COUNT;
+	hdr->sim_mode = st ? st->sim_cfg.mode : 0;
+	snprintf(hdr->platform_name, sizeof(hdr->platform_name), "%s",
+		 (st && st->hw_cfg.platform_name[0]) ? st->hw_cfg.platform_name : "default");
+
+	for (i = start_idx; i < matched_count; i++) {
+		const struct host_sched_trace_event *src = &raw_events[i];
+		struct sof_net_sched_trace_entry *dst = &entries[out_idx++];
+		const char *wname = resolve_comp_widget_name(g_tp, src->comp_id);
+
+		dst->seq_id = src->seq_id;
+		dst->ll_tick_nr = src->ll_tick_nr;
+		dst->mod_iter_nr = src->mod_iter_nr;
+		dst->comp_id = src->comp_id;
+		dst->pipeline_id = src->pipeline_id;
+		dst->core_id = src->core_id;
+		dst->event_type = src->event_type;
+		dst->mem_domain = src->mem_domain;
+		dst->cpc_violation = src->cpc_violation;
+		dst->period_us = src->period_us;
+		dst->start_cycles = src->start_cycles;
+		dst->complete_cycles = src->complete_cycles;
+		dst->duration_cycles = src->duration_cycles;
+		dst->cpc_budget = src->cpc_budget;
+		dst->start_ns = src->start_ns;
+		dst->complete_ns = src->complete_ns;
+		dst->deadline_ns = src->deadline_ns;
+		dst->wall_start_ns = src->wall_start_ns;
+		dst->wall_complete_ns = src->wall_complete_ns;
+		dst->bytes_in = src->bytes_in;
+		dst->bytes_out = src->bytes_out;
+		dst->ret_status = src->ret_status;
+		snprintf(dst->widget_name, sizeof(dst->widget_name), "%s", wname);
+	}
+
+	free(raw_events);
+	pthread_mutex_unlock(&g_tb_lock);
+
+	int ret = send_reply(sock, SOF_NET_OP_SCHED_TRACE, req_id, 0, rsp_buf, rsp_len);
+
+	free(rsp_buf);
+	return ret;
+}
+
+static int handle_telem_snapshot(int sock, uint32_t req_id, const uint8_t *req_buf,
+				 uint32_t req_len)
+{
+	struct sof_net_telem_req req = {
+		.query_mask = SOF_TELEM_FL_FW_REGS |
+			      SOF_TELEM_FL_TELEM_SLOT |
+			      SOF_TELEM_FL_EXT_PERF_TLV,
+		.flags = 0,
+	};
+
+	if (req_len >= sizeof(req))
+		memcpy(&req, req_buf, sizeof(req));
+
+	struct sof_net_telem_snapshot *snap = calloc(1, sizeof(*snap));
+
+	if (!snap)
+		return send_reply(sock, SOF_NET_OP_TELEM_SNAPSHOT, req_id, -ENOMEM, NULL, 0);
+
+	pthread_mutex_lock(&g_tb_lock);
+
+	populate_cdev_info(g_tp, &snap->dev_info);
+	refresh_emulated_windows(g_tp);
+
+	snap->active_pcm_streams = g_tp ? (uint32_t)g_tp->pipeline_num : 1;
+
+	if (req.query_mask & SOF_TELEM_FL_FW_REGS) {
+		memcpy(snap->fw_regs, g_win0_fw_regs, sizeof(snap->fw_regs));
+		snap->flags_present |= SOF_TELEM_FL_FW_REGS;
+	}
+
+	if (req.query_mask & SOF_TELEM_FL_TELEM_SLOT) {
+		memcpy(snap->telem_slot, g_win2_debug + 4096, sizeof(snap->telem_slot));
+		snap->flags_present |= SOF_TELEM_FL_TELEM_SLOT;
+	}
+
+	if (req.query_mask & SOF_TELEM_FL_PERF_WIN3) {
+		memcpy(snap->perf_win3, g_win3_perf, sizeof(snap->perf_win3));
+		snap->flags_present |= SOF_TELEM_FL_PERF_WIN3;
+	}
+
+	if (req.query_mask & SOF_TELEM_FL_MEM_STATE_TLV) {
+		snap->mem_state_len = build_memory_state_tlv(g_tp, snap->mem_state_tlv,
+							     sizeof(snap->mem_state_tlv));
+		if (snap->mem_state_len > 0)
+			snap->flags_present |= SOF_TELEM_FL_MEM_STATE_TLV;
+	}
+
+	if (req.query_mask & SOF_TELEM_FL_PWR_STATE_TLV) {
+		snap->pwr_state_len = build_power_state_tlv(snap->pwr_state_tlv,
+							    sizeof(snap->pwr_state_tlv));
+		if (snap->pwr_state_len > 0)
+			snap->flags_present |= SOF_TELEM_FL_PWR_STATE_TLV;
+	}
+
+	if (req.query_mask & SOF_TELEM_FL_EXT_PERF_TLV) {
+		snap->ext_perf_len = build_ext_perf_tlv(g_tp, snap->ext_perf_tlv,
+							sizeof(snap->ext_perf_tlv));
+		if (snap->ext_perf_len > 0)
+			snap->flags_present |= SOF_TELEM_FL_EXT_PERF_TLV;
+	}
+
+	if (req.query_mask & SOF_TELEM_FL_MODULES_INFO_TLV) {
+		snap->modules_info_len = build_modules_info_tlv(g_tp, snap->modules_info_tlv,
+								sizeof(snap->modules_info_tlv));
+		if (snap->modules_info_len > 0)
+			snap->flags_present |= SOF_TELEM_FL_MODULES_INFO_TLV;
+	}
+
+	pthread_mutex_unlock(&g_tb_lock);
+
+	int ret = send_reply(sock, SOF_NET_OP_TELEM_SNAPSHOT, req_id, 0, snap, sizeof(*snap));
+
+	free(snap);
+	return ret;
+}
+
+static int handle_probe_ctl(int sock, uint32_t req_id, const uint8_t *req_buf, uint32_t req_len)
+{
+	if (req_len < sizeof(struct sof_net_probe_req))
+		return send_reply(sock, SOF_NET_OP_PROBE_CTL, req_id, -EINVAL, NULL, 0);
+
+	const struct sof_net_probe_req *preq = (const struct sof_net_probe_req *)req_buf;
+
+	if (preq->op == SOF_PROBE_OP_READ_BUFFER) {
+		uint32_t target_id = preq->stream_tag;
+		uint32_t max_bytes = (preq->dma_buffer_size && preq->dma_buffer_size <= 8192) ?
+				     preq->dma_buffer_size : 64;
+		uint8_t *out_buf = calloc(1, sizeof(*preq) + max_bytes);
+
+		if (!out_buf)
+			return send_reply(sock, SOF_NET_OP_PROBE_CTL, req_id, -ENOMEM, NULL, 0);
+
+		struct sof_net_probe_req *prsp = (struct sof_net_probe_req *)out_buf;
+		int32_t *dst_samples = (int32_t *)(out_buf + sizeof(*preq));
+		uint32_t copied_bytes = 0;
+
+		*prsp = *preq;
+		pthread_mutex_lock(&g_tb_lock);
+		struct host_sched_telemetry *st = host_telem_get();
+
+		if (st) {
+			for (uint32_t i = 0; i < st->num_mods; i++) {
+				struct host_mod_telem *mt = &st->mods[i];
+
+				if (!mt->active)
+					continue;
+				if (target_id != 0 && mt->comp_id != target_id)
+					continue;
+				if (mt->num_out_pins > 0 && mt->out_pins[0].exit_num_samples > 0) {
+					uint32_t n = mt->out_pins[0].exit_num_samples;
+					uint32_t nb = n * sizeof(int32_t);
+
+					if (nb > max_bytes)
+						nb = max_bytes;
+					memcpy(dst_samples, mt->out_pins[0].exit_samples, nb);
+					copied_bytes = nb;
+					prsp->stream_tag = mt->comp_id;
+					break;
+				}
+			}
+		}
+		pthread_mutex_unlock(&g_tb_lock);
+
+		prsp->dma_buffer_size = copied_bytes;
+		prsp->num_points = copied_bytes / sizeof(int32_t);
+		int ret = send_reply(sock, SOF_NET_OP_PROBE_CTL, req_id, 0,
+				     out_buf, sizeof(*preq) + copied_bytes);
+		free(out_buf);
+		return ret;
+	}
+
+	uint32_t cap = (preq->num_points && preq->num_points <= 64) ? preq->num_points : 64;
+	uint8_t *out_buf = calloc(1, sizeof(*preq) + cap * sizeof(struct sof_cdev_probe_point));
+
+	if (!out_buf)
+		return send_reply(sock, SOF_NET_OP_PROBE_CTL, req_id, -ENOMEM, NULL, 0);
+
+	struct sof_net_probe_req *prsp = (struct sof_net_probe_req *)out_buf;
+	struct sof_cdev_probe_point *pts = (struct sof_cdev_probe_point *)(out_buf + sizeof(*preq));
+	uint32_t count = 0;
+
+	*prsp = *preq;
+
+	pthread_mutex_lock(&g_tb_lock);
+	if ((preq->op == SOF_PROBE_OP_INFO_AVAILABLE || preq->op == SOF_PROBE_OP_INFO_ACTIVE) &&
+	    sof_get() && sof_get()->ipc) {
+		struct host_sched_telemetry *st = host_telem_get();
+		struct list_item *clist;
+
+		list_for_item(clist, &sof_get()->ipc->comp_list) {
+			struct ipc_comp_dev *icd = container_of(clist, struct ipc_comp_dev, list);
+			struct host_mod_telem *mt = NULL;
+			uint32_t i;
+
+			if (icd->type != COMP_TYPE_COMPONENT || !icd->cd || count >= cap)
+				continue;
+
+			struct tplg_comp_info *ci = find_comp_info_by_ipc_id(g_tp, icd->id);
+			const char *wname = (ci && ci->name) ? ci->name : "sof_widget";
+
+			if (st) {
+				for (i = 0; i < st->num_mods; i++) {
+					if (st->mods[i].active && st->mods[i].comp_id == icd->id) {
+						mt = &st->mods[i];
+						break;
+					}
+				}
+			}
+
+			pts[count].buffer_id = icd->id;
+			pts[count].purpose = 0; /* EXTRACTION */
+			pts[count].stream_tag = (uint32_t)(icd->cd->pipeline ?
+							   icd->cd->pipeline->pipeline_id : 0);
+			if (mt && mt->num_out_pins > 0 && mt->out_pins[0].active) {
+				snprintf(pts[count].widget_name, sizeof(pts[count].widget_name),
+					 "%.15s %uB %ddB",
+					 wname,
+					 mt->out_pins[0].last_bytes_transferred & 0xFFFFU,
+					 (int)(mt->out_pins[0].exit_rms_dbfs_x100 / 100));
+			} else {
+				snprintf(pts[count].widget_name, sizeof(pts[count].widget_name),
+					 "%s", wname);
+			}
+			count++;
+		}
+	}
+	pthread_mutex_unlock(&g_tb_lock);
+
+	prsp->num_points = count;
+	uint32_t rsp_len = sizeof(*prsp) + count * sizeof(*pts);
+	int ret = send_reply(sock, SOF_NET_OP_PROBE_CTL, req_id, 0, out_buf, rsp_len);
+
+	free(out_buf);
+	return ret;
+}
+
+static int handle_pcm_ctl(int sock, uint32_t req_id, const uint8_t *req_buf, uint32_t req_len)
+{
+	/* Accept v1 56-byte requests and extended 72-byte requests */
+	if (req_len < 56)
+		return send_reply(sock, SOF_NET_OP_PCM_CTL, req_id, -EINVAL, NULL, 0);
+
+	struct sof_net_pcm_req req;
+	struct sof_net_pcm_rsp rsp;
+	int status = 0;
+
+	memset(&req, 0, sizeof(req));
+	memcpy(&req, req_buf, req_len < sizeof(req) ? req_len : sizeof(req));
+	memset(&rsp, 0, sizeof(rsp));
+
+	switch (req.op) {
+	case SOF_PCM_OP_STATUS:
+		break;
+
+	case SOF_PCM_OP_START_TONE:
+		if (req.device[0])
+			snprintf(g_pcm_device, sizeof(g_pcm_device), "%s", req.device);
+		if (req.freq_hz)
+			g_tone_freq_hz = req.freq_hz;
+		if (req.rate)
+			g_pcm_rate = req.rate;
+		if (req.channels)
+			g_pcm_channels = req.channels;
+		g_pcm_api_used = req.api_backend ? req.api_backend : SOF_AUDIO_API_ALSA;
+		g_pcm_format = req.format ? req.format : SOF_PCM_FMT_S16_LE;
+		g_tone_running = true;
+		break;
+
+	case SOF_PCM_OP_STOP_TONE:
+		g_tone_running = false;
+		break;
+
+	case SOF_PCM_OP_PLAY_BUFFER: {
+		if (req.device[0])
+			snprintf(g_pcm_device, sizeof(g_pcm_device), "%s", req.device);
+		if (req.rate)
+			g_pcm_rate = req.rate;
+		if (req.channels)
+			g_pcm_channels = req.channels;
+		g_pcm_api_used = req.api_backend ? req.api_backend : SOF_AUDIO_API_ALSA;
+		g_pcm_format = req.format ? req.format : SOF_PCM_FMT_S16_LE;
+		if (req.data_size > 0 && req_len >= sizeof(req) + req.data_size) {
+			const int16_t *samples = (const int16_t *)(req_buf + sizeof(req));
+			size_t sample_cnt = req.data_size / sizeof(int16_t);
+
+			tb_remote_record_output_samples_s16(samples, sample_cnt,
+							    (int)g_pcm_channels,
+							    (int)g_pcm_rate);
+		}
+		break;
+	}
+
+	case SOF_PCM_OP_CAPTURE_BUFFER: {
+		uint32_t rate = g_pcm_rate ? g_pcm_rate : 48000;
+		uint32_t ch = g_pcm_channels ? g_pcm_channels : 2;
+		uint32_t dur_ms = (req.duration_ms && req.duration_ms <= 2000) ?
+				  req.duration_ms : 200;
+		size_t req_samples = (size_t)((rate * dur_ms) / 1000) * ch;
+
+		if (req_samples > TB_PCM_CAPTURE_RING_SAMPLES)
+			req_samples = TB_PCM_CAPTURE_RING_SAMPLES;
+
+		uint8_t *out_buf = calloc(1, sizeof(rsp) + req_samples * sizeof(int16_t));
+
+		if (!out_buf)
+			return send_reply(sock, SOF_NET_OP_PCM_CTL, req_id, -ENOMEM, NULL, 0);
+
+		int16_t *dst = (int16_t *)(out_buf + sizeof(rsp));
+		size_t copy_samples;
+
+		pthread_mutex_lock(&g_pcm_ring_lock);
+		copy_samples = (req_samples <= g_pcm_ring_avail) ? req_samples : g_pcm_ring_avail;
+		size_t start_idx = (g_pcm_ring_write_idx + TB_PCM_CAPTURE_RING_SAMPLES -
+				    copy_samples) % TB_PCM_CAPTURE_RING_SAMPLES;
+		for (size_t i = 0; i < copy_samples; i++)
+			dst[i] = g_pcm_capture_ring[(start_idx + i) % TB_PCM_CAPTURE_RING_SAMPLES];
+
+		struct sof_net_pcm_rsp *crsp = (struct sof_net_pcm_rsp *)out_buf;
+
+		crsp->tone_running = g_tone_running ? 1 : 0;
+		snprintf(crsp->active_device, sizeof(crsp->active_device), "%s", g_pcm_device);
+		crsp->rate = rate;
+		crsp->channels = ch;
+		crsp->freq_hz = g_tone_freq_hz;
+		crsp->frames_played = g_pcm_frames_processed;
+		crsp->rms_level = g_pcm_last_rms;
+		crsp->peak_level = g_pcm_last_peak;
+		crsp->data_size = (uint32_t)(copy_samples * sizeof(int16_t));
+		crsp->api_used = g_pcm_api_used;
+		crsp->format = req.format ? req.format : g_pcm_format;
+		crsp->xruns = g_pcm_xruns;
+		pthread_mutex_unlock(&g_pcm_ring_lock);
+
+		int ret = send_reply(sock, SOF_NET_OP_PCM_CTL, req_id, 0,
+				     out_buf, sizeof(rsp) + crsp->data_size);
+		free(out_buf);
+		return ret;
+	}
+
+	default:
+		status = -EINVAL;
+		break;
+	}
+
+	pthread_mutex_lock(&g_pcm_ring_lock);
+	rsp.tone_running = g_tone_running ? 1 : 0;
+	snprintf(rsp.active_device, sizeof(rsp.active_device), "%s", g_pcm_device);
+	rsp.rate = g_pcm_rate;
+	rsp.channels = g_pcm_channels;
+	rsp.freq_hz = g_tone_freq_hz;
+	rsp.frames_played = g_pcm_frames_processed;
+	rsp.rms_level = g_pcm_last_rms;
+	rsp.peak_level = g_pcm_last_peak;
+	rsp.data_size = 0;
+	rsp.api_used = g_pcm_api_used;
+	rsp.format = g_pcm_format;
+	rsp.xruns = g_pcm_xruns;
+	pthread_mutex_unlock(&g_pcm_ring_lock);
+
+	return send_reply(sock, SOF_NET_OP_PCM_CTL, req_id, status, &rsp, sizeof(rsp));
+}
+
+/* -------------------------------------------------------------------------
+ * Sound Card, PCM Capabilities, DAPM Graph, Compress & Kcontrol Handlers
+ * -------------------------------------------------------------------------
+ */
+
+static uint32_t collect_tb_pcm_nodes(struct testbench_prm *tp,
+				     struct sof_net_pcm_node_info *nodes,
+				     uint32_t max_nodes,
+				     uint32_t *out_num_pcm_devs)
+{
+	uint32_t n_nodes = 0;
+	uint32_t n_devs = 0;
+	const char *state_str = g_dsp_paused ? "PAUSED" : "RUNNING";
+
+	if (tp && tp->pcm_list.next && !list_is_empty(&tp->pcm_list)) {
+		struct list_item *item;
+
+		list_for_item(item, &tp->pcm_list) {
+			struct tplg_pcm_info *pi = container_of(item, struct tplg_pcm_info, item);
+			bool has_pb = pi->playback_host || pi->playback_pipeline_list.count > 0;
+			bool has_cp = pi->capture_host || pi->capture_pipeline_list.count > 0;
+
+			n_devs++;
+			if (!has_pb && !has_cp)
+				has_pb = true;
+
+			if (has_pb && n_nodes < max_nodes) {
+				struct sof_net_pcm_node_info *pn = &nodes[n_nodes++];
+
+				memset(pn, 0, sizeof(*pn));
+				pn->card_id = 0;
+				pn->device_id = (uint32_t)pi->id;
+				pn->direction = SOF_STREAM_DIR_PLAYBACK;
+				pn->is_compress = 0;
+				snprintf(pn->id, sizeof(pn->id), "%s (*)",
+					 pi->name ? pi->name : "Port0");
+				snprintf(pn->name, sizeof(pn->name), "%s",
+					 pi->name ? pi->name : "Port0");
+				pn->subdevices_count = 1;
+				pn->subdevices_avail = 1;
+				snprintf(pn->state_str, sizeof(pn->state_str), "%s", state_str);
+				pn->is_running = g_dsp_paused ? 0 : 1;
+				snprintf(pn->active_format, sizeof(pn->active_format), "S16_LE");
+				pn->active_rate = g_pcm_rate ? g_pcm_rate : 48000;
+				pn->active_channels = g_pcm_channels ? g_pcm_channels : 2;
+				pn->period_size = 48;
+				pn->buffer_size = 192;
+				pn->hw_ptr = g_pcm_frames_processed;
+				pn->appl_ptr = g_pcm_frames_processed;
+			}
+			if (has_cp && n_nodes < max_nodes) {
+				struct sof_net_pcm_node_info *cn = &nodes[n_nodes++];
+
+				memset(cn, 0, sizeof(*cn));
+				cn->card_id = 0;
+				cn->device_id = (uint32_t)pi->id;
+				cn->direction = SOF_STREAM_DIR_CAPTURE;
+				cn->is_compress = 0;
+				snprintf(cn->id, sizeof(cn->id), "%s (*)",
+					 pi->name ? pi->name : "Port0");
+				snprintf(cn->name, sizeof(cn->name), "%s",
+					 pi->name ? pi->name : "Port0");
+				cn->subdevices_count = 1;
+				cn->subdevices_avail = 1;
+				snprintf(cn->state_str, sizeof(cn->state_str), "%s", state_str);
+				cn->is_running = g_dsp_paused ? 0 : 1;
+				snprintf(cn->active_format, sizeof(cn->active_format), "S16_LE");
+				cn->active_rate = g_pcm_rate ? g_pcm_rate : 48000;
+				cn->active_channels = g_pcm_channels ? g_pcm_channels : 2;
+				cn->period_size = 48;
+				cn->buffer_size = 192;
+				cn->hw_ptr = g_pcm_frames_processed;
+				cn->appl_ptr = g_pcm_frames_processed;
+			}
+		}
+	}
+
+	if (n_nodes == 0) {
+		n_devs = 1;
+		for (uint32_t dir = 0; dir < 2 && n_nodes < max_nodes; dir++) {
+			struct sof_net_pcm_node_info *pn = &nodes[n_nodes++];
+
+			memset(pn, 0, sizeof(*pn));
+			pn->card_id = 0;
+			pn->device_id = 0;
+			pn->direction = dir;
+			pn->is_compress = 0;
+			snprintf(pn->id, sizeof(pn->id),
+				 dir == 0 ? "Testbench Playback (*)" : "Testbench Capture (*)");
+			snprintf(pn->name, sizeof(pn->name),
+				 dir == 0 ? "Testbench Playback" : "Testbench Capture");
+			pn->subdevices_count = 1;
+			pn->subdevices_avail = 1;
+			snprintf(pn->state_str, sizeof(pn->state_str), "%s", state_str);
+			pn->is_running = g_dsp_paused ? 0 : 1;
+			snprintf(pn->active_format, sizeof(pn->active_format), "S16_LE");
+			pn->active_rate = g_pcm_rate ? g_pcm_rate : 48000;
+			pn->active_channels = g_pcm_channels ? g_pcm_channels : 2;
+			pn->period_size = 48;
+			pn->buffer_size = 192;
+			pn->hw_ptr = g_pcm_frames_processed;
+			pn->appl_ptr = g_pcm_frames_processed;
+		}
+	}
+
+	/* Add 1 virtual Compress Offload node */
+	if (n_nodes < max_nodes) {
+		struct sof_net_pcm_node_info *cn = &nodes[n_nodes++];
+
+		memset(cn, 0, sizeof(*cn));
+		cn->card_id = 0;
+		cn->device_id = 0;
+		cn->direction = SOF_STREAM_DIR_PLAYBACK;
+		cn->is_compress = 1;
+		snprintf(cn->id, sizeof(cn->id), "Testbench Compr (*)");
+		snprintf(cn->name, sizeof(cn->name), "SOF Testbench Compress");
+		cn->subdevices_count = 1;
+		cn->subdevices_avail = 1;
+		snprintf(cn->state_str, sizeof(cn->state_str), "CLOSED");
+	}
+
+	if (out_num_pcm_devs)
+		*out_num_pcm_devs = n_devs;
+	return n_nodes;
+}
+
+static int handle_card_list(int sock, uint32_t req_id)
+{
+	struct sof_net_pcm_node_info nodes[64];
+	struct sof_net_card_info card;
+	struct sof_net_card_list_hdr hdr;
+	uint32_t n_devs = 0;
+	uint32_t n_nodes = 0;
+
+	memset(&hdr, 0, sizeof(hdr));
+	memset(&card, 0, sizeof(card));
+	memset(nodes, 0, sizeof(nodes));
+
+	pthread_mutex_lock(&g_tb_lock);
+	n_nodes = collect_tb_pcm_nodes(g_tp, nodes, 64, &n_devs);
+
+	const char *base_tplg = "headless";
+
+	if (g_tp && g_tp->tplg_file) {
+		const char *slash = strrchr(g_tp->tplg_file, '/');
+
+		base_tplg = slash ? (slash + 1) : g_tp->tplg_file;
+	}
+
+	card.card_id = 0;
+	snprintf(card.id, sizeof(card.id), "softestbench4");
+	snprintf(card.driver, sizeof(card.driver), "sof-testbench4");
+	snprintf(card.name, sizeof(card.name), "SOF Testbench IPC4");
+	snprintf(card.longname, sizeof(card.longname),
+		 "SOF Testbench IPC4 Virtual DSP (%s)", base_tplg);
+	snprintf(card.mixername, sizeof(card.mixername), "SOF Testbench Mixer");
+	snprintf(card.tplg_file, sizeof(card.tplg_file), "%s", base_tplg);
+	card.num_pcm_streams = n_nodes > 0 ? (n_nodes - 1) : n_devs;
+	card.num_compr_streams = 1;
+	card.num_kcontrols = g_tp ? g_tp->glb_ctx.num_ctls : 0;
+	card.active_streams = g_dsp_paused ? 0 : (g_tp ? (uint32_t)g_tp->pipeline_num : 1);
+	pthread_mutex_unlock(&g_tb_lock);
+
+	hdr.num_cards = 1;
+	hdr.num_pcm_nodes = n_nodes;
+
+	size_t total_len = sizeof(hdr) + sizeof(card) + n_nodes * sizeof(nodes[0]);
+	uint8_t *out_buf = calloc(1, total_len);
+
+	if (!out_buf)
+		return send_reply(sock, SOF_NET_OP_CARD_LIST, req_id, -ENOMEM, NULL, 0);
+
+	memcpy(out_buf, &hdr, sizeof(hdr));
+	memcpy(out_buf + sizeof(hdr), &card, sizeof(card));
+	if (n_nodes > 0)
+		memcpy(out_buf + sizeof(hdr) + sizeof(card), nodes, n_nodes * sizeof(nodes[0]));
+
+	int ret = send_reply(sock, SOF_NET_OP_CARD_LIST, req_id, 0, out_buf, (uint32_t)total_len);
+
+	free(out_buf);
+	return ret;
+}
+
+static int handle_pcm_caps(int sock, uint32_t req_id, const uint8_t *req_buf, uint32_t req_len)
+{
+	struct sof_net_pcm_caps_req creq = {
+		.card_id = 0xFFFFFFFFU,
+		.device_id = 0xFFFFFFFFU,
+		.dir_mask = SOF_CAPS_DIR_ALL,
+		.api_backend = SOF_AUDIO_API_ALSA,
+	};
+
+	if (req_len >= sizeof(creq))
+		memcpy(&creq, req_buf, sizeof(creq));
+
+	struct sof_net_pcm_node_info nodes[64];
+	struct sof_net_pcm_caps caps[64];
+	uint32_t n_nodes = 0;
+	uint32_t n_caps = 0;
+
+	memset(nodes, 0, sizeof(nodes));
+	memset(caps, 0, sizeof(caps));
+
+	pthread_mutex_lock(&g_tb_lock);
+	n_nodes = collect_tb_pcm_nodes(g_tp, nodes, 64, NULL);
+	pthread_mutex_unlock(&g_tb_lock);
+
+	for (uint32_t i = 0; i < n_nodes && n_caps < 64; i++) {
+		if (creq.card_id != 0xFFFFFFFFU && nodes[i].card_id != creq.card_id)
+			continue;
+		if (creq.device_id != 0xFFFFFFFFU && nodes[i].device_id != creq.device_id)
+			continue;
+		if (nodes[i].is_compress) {
+			if (!(creq.dir_mask & SOF_CAPS_DIR_COMPRESS))
+				continue;
+		} else {
+			if (!(creq.dir_mask & (1U << nodes[i].direction)))
+				continue;
+		}
+
+		struct sof_net_pcm_caps *cp = &caps[n_caps++];
+
+		cp->card_id = nodes[i].card_id;
+		cp->device_id = nodes[i].device_id;
+		cp->direction = nodes[i].direction;
+		cp->is_compress = nodes[i].is_compress;
+		cp->api_used = creq.api_backend ? creq.api_backend : SOF_AUDIO_API_ALSA;
+		cp->status = 0;
+		snprintf(cp->id, sizeof(cp->id), "%s", nodes[i].id);
+		snprintf(cp->name, sizeof(cp->name), "%s", nodes[i].name);
+
+		if (cp->is_compress) {
+			cp->min_fragment_size = 1024;
+			cp->max_fragment_size = 65536;
+			cp->min_fragments = 2;
+			cp->max_fragments = 16;
+			cp->num_codecs = 3;
+			cp->codecs[0] = 1; /* PCM */
+			cp->codecs[1] = 2; /* MP3 */
+			cp->codecs[2] = 3; /* AAC */
+			snprintf(cp->formats_str, sizeof(cp->formats_str), "PCM MP3 AAC");
+		} else {
+			cp->formats_mask = SOF_FMTBIT_S16_LE | SOF_FMTBIT_S24_LE |
+					   SOF_FMTBIT_S32_LE | SOF_FMTBIT_FLOAT_LE;
+			cp->access_mask = 0x09; /* MMAP_INTERLEAVED | RW_INTERLEAVED */
+			cp->rates_mask = SOF_RATEBIT_8000 | SOF_RATEBIT_16000 |
+					 SOF_RATEBIT_32000 | SOF_RATEBIT_44100 |
+					 SOF_RATEBIT_48000 | SOF_RATEBIT_96000 |
+					 SOF_RATEBIT_192000;
+			cp->rate_min = 8000;
+			cp->rate_max = 192000;
+			cp->channels_min = 1;
+			cp->channels_max = 8;
+			cp->sample_bits_min = 16;
+			cp->sample_bits_max = 32;
+			cp->period_size_min = 48;
+			cp->period_size_max = 16384;
+			cp->period_bytes_min = 192;
+			cp->period_bytes_max = 65536;
+			cp->periods_min = 2;
+			cp->periods_max = 32;
+			cp->buffer_size_min = 96;
+			cp->buffer_size_max = 65536;
+			cp->buffer_bytes_min = 384;
+			cp->buffer_bytes_max = 262144;
+			snprintf(cp->formats_str, sizeof(cp->formats_str),
+				 "S16_LE S24_LE S32_LE FLOAT_LE");
+			snprintf(cp->rates_str, sizeof(cp->rates_str),
+				 "8000 16000 32000 44100 48000 96000 192000");
+		}
+	}
+
+	struct sof_net_pcm_caps_hdr hdr = {
+		.num_entries = n_caps,
+		.api_used = creq.api_backend ? creq.api_backend : SOF_AUDIO_API_ALSA,
+	};
+	size_t total_len = sizeof(hdr) + n_caps * sizeof(caps[0]);
+	uint8_t *out_buf = calloc(1, total_len);
+
+	if (!out_buf)
+		return send_reply(sock, SOF_NET_OP_PCM_CAPS, req_id, -ENOMEM, NULL, 0);
+
+	memcpy(out_buf, &hdr, sizeof(hdr));
+	if (n_caps > 0)
+		memcpy(out_buf + sizeof(hdr), caps, n_caps * sizeof(caps[0]));
+
+	int ret = send_reply(sock, SOF_NET_OP_PCM_CAPS, req_id, 0, out_buf, (uint32_t)total_len);
+
+	free(out_buf);
+	return ret;
+}
+
+static void classify_tb_dapm_widget(const struct tplg_comp_info *ci,
+				    char *wtype_out, size_t wtype_cap,
+				    uint16_t *col_out)
+{
+	*col_out = 1;
+	snprintf(wtype_out, wtype_cap, "widget");
+
+	if (!ci)
+		return;
+
+	switch (ci->type) {
+	case SND_SOC_TPLG_DAPM_AIF_IN:
+		snprintf(wtype_out, wtype_cap, "aif_in");
+		*col_out = 0;
+		break;
+	case SND_SOC_TPLG_DAPM_AIF_OUT:
+		snprintf(wtype_out, wtype_cap, "aif_out");
+		*col_out = 0;
+		break;
+	case SND_SOC_TPLG_DAPM_DAI_IN:
+		snprintf(wtype_out, wtype_cap, "dai_in");
+		*col_out = 3;
+		break;
+	case SND_SOC_TPLG_DAPM_DAI_OUT:
+		snprintf(wtype_out, wtype_cap, "dai_out");
+		*col_out = 3;
+		break;
+	case SND_SOC_TPLG_DAPM_PGA:
+		snprintf(wtype_out, wtype_cap, "pga");
+		*col_out = 1;
+		break;
+	case SND_SOC_TPLG_DAPM_MIXER:
+		snprintf(wtype_out, wtype_cap, "mixer");
+		*col_out = 2;
+		break;
+	case SND_SOC_TPLG_DAPM_MUX:
+		snprintf(wtype_out, wtype_cap, "mux");
+		*col_out = 2;
+		break;
+	case SND_SOC_TPLG_DAPM_BUFFER:
+		snprintf(wtype_out, wtype_cap, "buffer");
+		*col_out = 1;
+		break;
+	case SND_SOC_TPLG_DAPM_SCHEDULER:
+		snprintf(wtype_out, wtype_cap, "scheduler");
+		*col_out = 1;
+		break;
+	case SND_SOC_TPLG_DAPM_EFFECT:
+		snprintf(wtype_out, wtype_cap, "effect");
+		*col_out = 1;
+		break;
+	case SND_SOC_TPLG_DAPM_SRC:
+		snprintf(wtype_out, wtype_cap, "src");
+		*col_out = 1;
+		break;
+	case SND_SOC_TPLG_DAPM_ASRC:
+		snprintf(wtype_out, wtype_cap, "asrc");
+		*col_out = 1;
+		break;
+	default:
+		break;
+	}
+
+	if (ci->name) {
+		if (strncmp(ci->name, "host-copier", 11) == 0)
+			*col_out = 0;
+		else if (strncmp(ci->name, "dai-copier", 10) == 0)
+			*col_out = 3;
+	}
+}
+
+static int handle_dapm_graph(int sock, uint32_t req_id, const uint8_t *req_buf, uint32_t req_len)
+{
+	(void)req_buf;
+	(void)req_len;
+
+	uint32_t max_nodes = 256;
+	uint32_t max_edges = 512;
+	uint32_t max_links = 32;
+
+	struct sof_net_dapm_comp_status comp;
+	struct sof_net_dapm_node *nodes = calloc(max_nodes, sizeof(*nodes));
+	struct sof_net_dapm_edge *edges = calloc(max_edges, sizeof(*edges));
+	struct sof_net_dpcm_link_state *links = calloc(max_links, sizeof(*links));
+	const struct tplg_comp_info **ci_ptrs = calloc(max_nodes, sizeof(*ci_ptrs));
+
+	if (!nodes || !edges || !links || !ci_ptrs) {
+		free(nodes);
+		free(edges);
+		free(links);
+		free(ci_ptrs);
+		return send_reply(sock, SOF_NET_OP_DAPM_GRAPH, req_id, -ENOMEM, NULL, 0);
+	}
+
+	uint32_t n_nodes = 0;
+	uint32_t n_powered = 0;
+	uint32_t n_edges = 0;
+	uint32_t n_active_edges = 0;
+	uint32_t n_links = 0;
+
+	pthread_mutex_lock(&g_tb_lock);
+
+	const char *base_tplg = "headless";
+
+	if (g_tp && g_tp->tplg_file) {
+		const char *slash = strrchr(g_tp->tplg_file, '/');
+
+		base_tplg = slash ? (slash + 1) : g_tp->tplg_file;
+	}
+
+	if (g_tp && g_tp->widget_list.next && !list_is_empty(&g_tp->widget_list)) {
+		struct list_item *item;
+
+		list_for_item(item, &g_tp->widget_list) {
+			struct tplg_comp_info *ci = container_of(item, struct tplg_comp_info, item);
+
+			if (n_nodes >= max_nodes)
+				break;
+
+			struct sof_net_dapm_node *nd = &nodes[n_nodes];
+			uint16_t col = 1;
+
+			ci_ptrs[n_nodes] = ci;
+			nd->node_id = n_nodes;
+			snprintf(nd->name, sizeof(nd->name), "%s",
+				 ci->name ? ci->name : "unnamed");
+			snprintf(nd->component, sizeof(nd->component), "sof-testbench4");
+			snprintf(nd->stream_name, sizeof(nd->stream_name), "%s",
+				 ci->stream_name ? ci->stream_name : "");
+			classify_tb_dapm_widget(ci, nd->widget_type, sizeof(nd->widget_type), &col);
+			nd->layout_col = col;
+			nd->power = (ci->set_up && !g_dsp_paused &&
+				     tb_is_pipeline_enabled(g_tp, ci->pipeline_id)) ? 1 : 0;
+			if (nd->power)
+				n_powered++;
+			nd->stream_active = nd->power;
+			nd->in_ep = 1;
+			nd->out_ep = 1;
+			nd->reg = -1;
+			nd->pipeline_id = ci->pipeline_id;
+			nd->layout_row = (uint16_t)(ci->pipeline_id >= 0 ? ci->pipeline_id : 0);
+
+			/* Attach kcontrols belonging to this widget */
+			for (uint32_t k = 0; k < g_tp->glb_ctx.num_ctls &&
+					     nd->num_kcontrols < 4; k++) {
+				struct tb_ctl *ctl = &g_tp->glb_ctx.ctl[k];
+
+				if (ctl->comp_info == ci ||
+				    ((int)ctl->module_id == ci->module_id &&
+				     (int)ctl->instance_id == ci->instance_id &&
+				     ci->module_id > 0)) {
+					uint32_t slot = nd->num_kcontrols++;
+
+					nd->kcontrol_numids[slot] = k + 1;
+					if (slot < 2)
+						snprintf(nd->kcontrol_names[slot],
+							 sizeof(nd->kcontrol_names[slot]),
+							 "%.47s", ctl->name);
+				}
+			}
+			n_nodes++;
+		}
+	}
+
+	if (g_tp && g_tp->route_list.next && !list_is_empty(&g_tp->route_list)) {
+		struct list_item *item;
+
+		list_for_item(item, &g_tp->route_list) {
+			struct tplg_route_info *rt =
+				container_of(item, struct tplg_route_info, item);
+
+			if (!rt->source || !rt->sink || n_edges >= max_edges)
+				continue;
+
+			int32_t src_idx = -1;
+			int32_t dst_idx = -1;
+
+			for (uint32_t i = 0; i < n_nodes; i++) {
+				if (ci_ptrs[i] == rt->source)
+					src_idx = (int32_t)i;
+				if (ci_ptrs[i] == rt->sink)
+					dst_idx = (int32_t)i;
+			}
+			if (src_idx >= 0 && dst_idx >= 0) {
+				struct sof_net_dapm_edge *ed = &edges[n_edges];
+
+				ed->edge_id = n_edges++;
+				ed->src_node_id = src_idx;
+				ed->dst_node_id = dst_idx;
+				snprintf(ed->src_name, sizeof(ed->src_name), "%s",
+					 rt->source->name ? rt->source->name : "src");
+				snprintf(ed->dst_name, sizeof(ed->dst_name), "%s",
+					 rt->sink->name ? rt->sink->name : "dst");
+				snprintf(ed->src_comp, sizeof(ed->src_comp), "sof-testbench4");
+				snprintf(ed->dst_comp, sizeof(ed->dst_comp), "sof-testbench4");
+				snprintf(ed->control_name, sizeof(ed->control_name), "static");
+				ed->active = (rt->set_up && !g_dsp_paused) ? 1 : 0;
+				if (ed->active)
+					n_active_edges++;
+			}
+		}
+	}
+
+	if (g_tp && g_tp->pcm_list.next && !list_is_empty(&g_tp->pcm_list)) {
+		struct list_item *item;
+
+		list_for_item(item, &g_tp->pcm_list) {
+			struct tplg_pcm_info *pi = container_of(item, struct tplg_pcm_info, item);
+
+			if ((pi->playback_host || pi->playback_pipeline_list.count > 0) &&
+			    n_links < max_links) {
+				struct sof_net_dpcm_link_state *lk = &links[n_links++];
+
+				snprintf(lk->fe_name, sizeof(lk->fe_name), "%s",
+					 pi->name ? pi->name : "Port0");
+				lk->direction = SOF_STREAM_DIR_PLAYBACK;
+				snprintf(lk->state_str, sizeof(lk->state_str), "%s",
+					 g_dsp_paused ? "PAUSED" : "RUNNING");
+				snprintf(lk->fe_format, sizeof(lk->fe_format), "S16_LE");
+				lk->fe_channels = g_pcm_channels ? g_pcm_channels : 2;
+				lk->fe_rate = g_pcm_rate ? g_pcm_rate : 48000;
+				lk->num_backends = 1;
+				snprintf(lk->be_names[0], sizeof(lk->be_names[0]), "SSP0-Codec");
+				snprintf(lk->be_states[0], sizeof(lk->be_states[0]), "%s",
+					 g_dsp_paused ? "PAUSED" : "RUNNING");
+				snprintf(lk->be_formats[0], sizeof(lk->be_formats[0]), "S16_LE");
+				lk->be_channels[0] = lk->fe_channels;
+				lk->be_rates[0] = lk->fe_rate;
+			}
+			if ((pi->capture_host || pi->capture_pipeline_list.count > 0) &&
+			    n_links < max_links) {
+				struct sof_net_dpcm_link_state *lk = &links[n_links++];
+
+				snprintf(lk->fe_name, sizeof(lk->fe_name), "%s",
+					 pi->name ? pi->name : "Port0");
+				lk->direction = SOF_STREAM_DIR_CAPTURE;
+				snprintf(lk->state_str, sizeof(lk->state_str), "%s",
+					 g_dsp_paused ? "PAUSED" : "RUNNING");
+				snprintf(lk->fe_format, sizeof(lk->fe_format), "S16_LE");
+				lk->fe_channels = g_pcm_channels ? g_pcm_channels : 2;
+				lk->fe_rate = g_pcm_rate ? g_pcm_rate : 48000;
+				lk->num_backends = 1;
+				snprintf(lk->be_names[0], sizeof(lk->be_names[0]), "SSP0-Codec");
+				snprintf(lk->be_states[0], sizeof(lk->be_states[0]), "%s",
+					 g_dsp_paused ? "PAUSED" : "RUNNING");
+				snprintf(lk->be_formats[0], sizeof(lk->be_formats[0]), "S16_LE");
+				lk->be_channels[0] = lk->fe_channels;
+				lk->be_rates[0] = lk->fe_rate;
+			}
+		}
+	}
+
+	memset(&comp, 0, sizeof(comp));
+	snprintf(comp.name, sizeof(comp.name), "sof-testbench4");
+	snprintf(comp.bias_str, sizeof(comp.bias_str), "%s", g_dsp_paused ? "Standby" : "On");
+	comp.bias_level = g_dsp_paused ? 1 : 3;
+	comp.widget_count = n_nodes;
+	comp.powered_count = n_powered;
+
+	struct sof_net_dapm_graph_hdr hdr;
+
+	memset(&hdr, 0, sizeof(hdr));
+	hdr.card_id = 0;
+	snprintf(hdr.card_name, sizeof(hdr.card_name), "sof-testbench4");
+	snprintf(hdr.tplg_file, sizeof(hdr.tplg_file), "%s", base_tplg);
+	hdr.num_components = 1;
+	hdr.num_nodes = n_nodes;
+	hdr.num_powered_nodes = n_powered;
+	hdr.num_edges = n_edges;
+	hdr.num_active_edges = n_active_edges;
+	hdr.num_dpcm_links = n_links;
+
+	pthread_mutex_unlock(&g_tb_lock);
+
+	size_t total_len = sizeof(hdr) + sizeof(comp) +
+			   n_nodes * sizeof(*nodes) +
+			   n_edges * sizeof(*edges) +
+			   n_links * sizeof(*links);
+	uint8_t *out_buf = calloc(1, total_len);
+	int ret;
+
+	if (!out_buf) {
+		ret = send_reply(sock, SOF_NET_OP_DAPM_GRAPH, req_id, -ENOMEM, NULL, 0);
+	} else {
+		uint8_t *p = out_buf;
+
+		memcpy(p, &hdr, sizeof(hdr));
+		p += sizeof(hdr);
+		memcpy(p, &comp, sizeof(comp));
+		p += sizeof(comp);
+		if (n_nodes > 0) {
+			memcpy(p, nodes, n_nodes * sizeof(*nodes));
+			p += n_nodes * sizeof(*nodes);
+		}
+		if (n_edges > 0) {
+			memcpy(p, edges, n_edges * sizeof(*edges));
+			p += n_edges * sizeof(*edges);
+		}
+		if (n_links > 0)
+			memcpy(p, links, n_links * sizeof(*links));
+
+		ret = send_reply(sock, SOF_NET_OP_DAPM_GRAPH, req_id, 0,
+				 out_buf, (uint32_t)total_len);
+		free(out_buf);
+	}
+
+	free(nodes);
+	free(edges);
+	free(links);
+	free(ci_ptrs);
+	return ret;
+}
+
+static int handle_compr_ctl(int sock, uint32_t req_id, const uint8_t *req_buf, uint32_t req_len)
+{
+	if (req_len < sizeof(struct sof_net_compr_req))
+		return send_reply(sock, SOF_NET_OP_COMPR_CTL, req_id, -EINVAL, NULL, 0);
+
+	const struct sof_net_compr_req *creq = (const struct sof_net_compr_req *)req_buf;
+	struct sof_net_compr_rsp rsp;
+
+	memset(&rsp, 0, sizeof(rsp));
+	rsp.status = 0;
+	rsp.card_id = creq->card_id;
+	rsp.device_id = creq->device_id;
+	rsp.direction = creq->direction;
+	rsp.codec_id = creq->codec_id ? creq->codec_id : 1;
+	rsp.fragment_size = creq->fragment_size ? creq->fragment_size : 4096;
+	rsp.fragments = creq->fragments ? creq->fragments : 4;
+	rsp.min_fragment_size = 1024;
+	rsp.max_fragment_size = 65536;
+	rsp.num_codecs = 3;
+	rsp.codecs[0] = 1; /* SND_AUDIOCODEC_PCM */
+	rsp.codecs[1] = 2; /* SND_AUDIOCODEC_MP3 */
+	rsp.codecs[2] = 3; /* SND_AUDIOCODEC_AAC */
+	rsp.sampling_rate = creq->rate ? creq->rate : (g_pcm_rate ? g_pcm_rate : 48000);
+
+	if (creq->op == SOF_COMPR_OP_PLAY_BUFFER) {
+		uint32_t dur_ms = creq->duration_ms ? creq->duration_ms : 500;
+		uint32_t frames = (rsp.sampling_rate * dur_ms) / 1000;
+
+		rsp.bytes_transferred = creq->data_size ? creq->data_size : (frames * 4);
+		rsp.rendered_samples = frames;
+	} else if (creq->op == SOF_COMPR_OP_CAPTURE_BUFFER) {
+		uint32_t cap_bytes = creq->data_size ? creq->data_size : 4096;
+
+		if (cap_bytes > 65536)
+			cap_bytes = 65536;
+
+		uint8_t *out_buf = calloc(1, sizeof(rsp) + cap_bytes);
+
+		if (!out_buf)
+			return send_reply(sock, SOF_NET_OP_COMPR_CTL, req_id, -ENOMEM, NULL, 0);
+
+		pthread_mutex_lock(&g_pcm_ring_lock);
+		size_t avail_bytes = g_pcm_ring_avail * sizeof(int16_t);
+		size_t to_copy = cap_bytes < avail_bytes ? cap_bytes : avail_bytes;
+
+		if (to_copy > 0)
+			memcpy(out_buf + sizeof(rsp), g_pcm_capture_ring, to_copy);
+		pthread_mutex_unlock(&g_pcm_ring_lock);
+
+		rsp.bytes_transferred = cap_bytes;
+		rsp.rendered_samples = cap_bytes / 4;
+		rsp.data_size = cap_bytes;
+		memcpy(out_buf, &rsp, sizeof(rsp));
+
+		int ret = send_reply(sock, SOF_NET_OP_COMPR_CTL, req_id, 0,
+				     out_buf, sizeof(rsp) + cap_bytes);
+		free(out_buf);
+		return ret;
+	}
+
+	return send_reply(sock, SOF_NET_OP_COMPR_CTL, req_id, 0, &rsp, sizeof(rsp));
+}
+
+static void populate_tb_kctl_info(uint32_t idx, struct tb_ctl *ctl, struct sof_net_kctl_info *ki)
+{
+	struct tb_kctl_shadow *sh = (idx < TB_REMOTE_MAX_KCTLS) ? &g_kctl_shadow[idx] : NULL;
+
+	memset(ki, 0, sizeof(*ki));
+	ki->card_id = 0;
+	ki->numid = idx + 1;
+	ki->iface = 2; /* SNDRV_CTL_ELEM_IFACE_MIXER */
+	snprintf(ki->iface_str, sizeof(ki->iface_str), "MIXER");
+	ki->index = ctl->index;
+	snprintf(ki->name, sizeof(ki->name), "%.63s", ctl->name);
+
+	if (ctl->type == SND_SOC_TPLG_TYPE_MIXER) {
+		uint32_t nch = ctl->mixer_ctl.num_channels ?
+			       (uint32_t)ctl->mixer_ctl.num_channels : 2;
+		int64_t max_v = ctl->mixer_ctl.max ? ctl->mixer_ctl.max : 32;
+
+		if (nch > 8)
+			nch = 8;
+		ki->count = nch;
+		ki->type = (max_v == 1) ? SOF_KCTL_TYPE_BOOLEAN : SOF_KCTL_TYPE_INTEGER;
+		snprintf(ki->type_str, sizeof(ki->type_str), "%s",
+			 (max_v == 1) ? "BOOLEAN" : "INTEGER");
+		ki->min_val = ctl->mixer_ctl.min;
+		ki->max_val = max_v;
+		ki->step_val = 1;
+		ki->access_mask = SOF_KCTL_ACC_READ | SOF_KCTL_ACC_WRITE | SOF_KCTL_ACC_TLV_READ;
+		snprintf(ki->access_str, sizeof(ki->access_str), "rwR");
+
+		if (ctl->mixer_ctl.hdr.tlv.size > 0) {
+			ki->has_db_scale = 1;
+			ki->db_min_cdb = (int32_t)ctl->mixer_ctl.hdr.tlv.scale.min;
+			ki->db_step_cdb = (int32_t)(ctl->mixer_ctl.hdr.tlv.scale.step ?
+						    ctl->mixer_ctl.hdr.tlv.scale.step : 100);
+			ki->db_mute = ctl->mixer_ctl.hdr.tlv.scale.mute ? 1 : 0;
+		} else if (max_v > 1) {
+			ki->has_db_scale = 1;
+			ki->db_min_cdb = -5000;
+			ki->db_step_cdb = 200;
+			ki->db_mute = 1;
+		}
+
+		if (sh && !sh->initialized) {
+			int64_t def_val = (max_v == 1) ? 1 : (max_v * 3) / 4;
+
+			for (uint32_t c = 0; c < nch; c++)
+				sh->values[c] = def_val;
+			sh->initialized = true;
+		}
+	} else if (ctl->type == SND_SOC_TPLG_TYPE_ENUM) {
+		uint32_t nch = ctl->enum_ctl.num_channels ?
+			       (uint32_t)ctl->enum_ctl.num_channels : 1;
+		uint32_t nitems = (uint32_t)ctl->enum_ctl.items;
+
+		if (nch > 8)
+			nch = 8;
+		if (nitems > 8)
+			nitems = 8;
+		ki->type = SOF_KCTL_TYPE_ENUMERATED;
+		snprintf(ki->type_str, sizeof(ki->type_str), "ENUM");
+		ki->count = nch;
+		ki->access_mask = SOF_KCTL_ACC_READ | SOF_KCTL_ACC_WRITE;
+		snprintf(ki->access_str, sizeof(ki->access_str), "rw");
+		ki->num_enums = nitems;
+		for (uint32_t e = 0; e < nitems; e++)
+			snprintf(ki->enum_names[e], sizeof(ki->enum_names[e]),
+				 "%s", ctl->enum_ctl.texts[e]);
+		if (sh && !sh->initialized)
+			sh->initialized = true;
+	} else {
+		ki->type = SOF_KCTL_TYPE_BYTES;
+		snprintf(ki->type_str, sizeof(ki->type_str), "BYTES");
+		ki->count = ctl->bytes_ctl.size ? (uint32_t)ctl->bytes_ctl.size : 64;
+		ki->access_mask = SOF_KCTL_ACC_READ | SOF_KCTL_ACC_WRITE |
+				  SOF_KCTL_ACC_TLV_READ | SOF_KCTL_ACC_TLV_WRITE;
+		snprintf(ki->access_str, sizeof(ki->access_str), "rwRW");
+		if (sh && !sh->initialized) {
+			if (ctl->bytes_ctl.priv.size > 0) {
+				uint32_t blen = (uint32_t)ctl->bytes_ctl.priv.size;
+
+				if (blen > sizeof(sh->bytes_data))
+					blen = sizeof(sh->bytes_data);
+				memcpy(sh->bytes_data, ctl->bytes_ctl.priv.data, blen);
+				sh->bytes_len = blen;
+			}
+			sh->initialized = true;
+		}
+	}
+
+	if (sh) {
+		for (int c = 0; c < 8; c++)
+			ki->values[c] = sh->values[c];
+	}
+
+	if (ctl->comp_info) {
+		char wtype[24];
+		uint16_t col = 1;
+
+		ki->anchor_type = SOF_KCTL_ANCHOR_WIDGET;
+		snprintf(ki->target_widget, sizeof(ki->target_widget), "%s",
+			 ctl->comp_info->name ? ctl->comp_info->name : "");
+		snprintf(ki->target_component, sizeof(ki->target_component), "sof-testbench4");
+		ki->pipeline_id = ctl->comp_info->pipeline_id;
+		ki->layout_row = (uint16_t)(ctl->comp_info->pipeline_id >= 0 ?
+					    ctl->comp_info->pipeline_id : 0);
+		classify_tb_dapm_widget(ctl->comp_info, wtype, sizeof(wtype), &col);
+		ki->layout_col = col;
+	} else {
+		ki->anchor_type = SOF_KCTL_ANCHOR_CARD;
+		snprintf(ki->target_component, sizeof(ki->target_component), "sof-testbench4");
+		ki->pipeline_id = -1;
+		ki->layout_col = 4;
+	}
+}
+
+static int handle_kctl_list(int sock, uint32_t req_id, const uint8_t *req_buf, uint32_t req_len)
+{
+	uint32_t api_used = SOF_AUDIO_API_ALSA;
+
+	if (req_len >= sizeof(struct sof_net_kctl_list_req)) {
+		const struct sof_net_kctl_list_req *kreq =
+			(const struct sof_net_kctl_list_req *)req_buf;
+
+		if (kreq->api_backend)
+			api_used = kreq->api_backend;
+	}
+
+	pthread_mutex_lock(&g_tb_lock);
+	uint32_t n_ctls = g_tp ? g_tp->glb_ctx.num_ctls : 0;
+
+	if (n_ctls > TB_REMOTE_MAX_KCTLS)
+		n_ctls = TB_REMOTE_MAX_KCTLS;
+
+	size_t total_len = sizeof(struct sof_net_kctl_list_hdr) +
+			   n_ctls * sizeof(struct sof_net_kctl_info);
+	uint8_t *out_buf = calloc(1, total_len);
+
+	if (!out_buf) {
+		pthread_mutex_unlock(&g_tb_lock);
+		return send_reply(sock, SOF_NET_OP_KCTL_LIST, req_id, -ENOMEM, NULL, 0);
+	}
+
+	struct sof_net_kctl_list_hdr *hdr = (struct sof_net_kctl_list_hdr *)out_buf;
+	struct sof_net_kctl_info *items = (struct sof_net_kctl_info *)(out_buf + sizeof(*hdr));
+
+	hdr->card_id = 0;
+	hdr->api_used = api_used;
+	hdr->num_kcontrols = n_ctls;
+
+	for (uint32_t i = 0; i < n_ctls; i++)
+		populate_tb_kctl_info(i, &g_tp->glb_ctx.ctl[i], &items[i]);
+
+	pthread_mutex_unlock(&g_tb_lock);
+
+	int ret = send_reply(sock, SOF_NET_OP_KCTL_LIST, req_id, 0, out_buf, (uint32_t)total_len);
+
+	free(out_buf);
+	return ret;
+}
+
+static int handle_kctl_io(int sock, uint16_t opcode, uint32_t req_id,
+			  const uint8_t *req_buf, uint32_t req_len)
+{
+	if (req_len < sizeof(struct sof_net_kctl_io_req))
+		return send_reply(sock, opcode, req_id, -EINVAL, NULL, 0);
+
+	const struct sof_net_kctl_io_req *kreq = (const struct sof_net_kctl_io_req *)req_buf;
+	struct sof_net_kctl_io_rsp rsp;
+	int status = 0;
+
+	memset(&rsp, 0, sizeof(rsp));
+
+	pthread_mutex_lock(&g_tb_lock);
+	uint32_t n_ctls = g_tp ? g_tp->glb_ctx.num_ctls : 0;
+
+	if (n_ctls > TB_REMOTE_MAX_KCTLS)
+		n_ctls = TB_REMOTE_MAX_KCTLS;
+
+	int32_t found_idx = -1;
+
+	for (uint32_t i = 0; i < n_ctls; i++) {
+		if (kreq->numid > 0 && (i + 1) == kreq->numid) {
+			found_idx = (int32_t)i;
+			break;
+		}
+		if (kreq->name[0] && strcmp(g_tp->glb_ctx.ctl[i].name, kreq->name) == 0) {
+			found_idx = (int32_t)i;
+			break;
+		}
+	}
+
+	if (found_idx < 0) {
+		pthread_mutex_unlock(&g_tb_lock);
+		return send_reply(sock, opcode, req_id, -ENOENT, NULL, 0);
+	}
+
+	uint32_t idx = (uint32_t)found_idx;
+	struct tb_ctl *ctl = &g_tp->glb_ctx.ctl[idx];
+	struct sof_net_kctl_info kinfo;
+
+	populate_tb_kctl_info(idx, ctl, &kinfo);
+
+	if (opcode == SOF_NET_OP_KCTL_SET) {
+		struct tb_kctl_shadow *sh = &g_kctl_shadow[idx];
+
+		if (kinfo.type == SOF_KCTL_TYPE_BYTES || kreq->bytes_len > 0) {
+			uint32_t blen = kreq->bytes_len;
+
+			if (blen > sizeof(sh->bytes_data))
+				blen = sizeof(sh->bytes_data);
+			memcpy(sh->bytes_data, kreq->bytes_data, blen);
+			sh->bytes_len = blen;
+		} else {
+			uint32_t cnt = kreq->count ? kreq->count : kinfo.count;
+
+			if (cnt > 8)
+				cnt = 8;
+			for (uint32_t c = 0; c < cnt; c++) {
+				int64_t v = kreq->values[c];
+
+				if (kinfo.type == SOF_KCTL_TYPE_INTEGER && kinfo.max_val > 0) {
+					if (v < kinfo.min_val)
+						v = kinfo.min_val;
+					if (v > kinfo.max_val)
+						v = kinfo.max_val;
+				}
+				sh->values[c] = v;
+			}
+			/* Propagate live control change to the active SOF DSP component */
+			char cmd_line[256];
+
+			if (ctl->type == SND_SOC_TPLG_TYPE_MIXER) {
+				if (kinfo.count >= 2)
+					snprintf(cmd_line, sizeof(cmd_line),
+						 "cset name=\"%s\" %lld,%lld",
+						 ctl->name,
+						 (long long)sh->values[0],
+						 (long long)sh->values[1]);
+				else
+					snprintf(cmd_line, sizeof(cmd_line),
+						 "cset name=\"%s\" %lld",
+						 ctl->name,
+						 (long long)sh->values[0]);
+				tb_apply_control_line(g_tp, cmd_line);
+			} else if (ctl->type == SND_SOC_TPLG_TYPE_ENUM) {
+				uint32_t eidx = (uint32_t)sh->values[0];
+
+				if (eidx < kinfo.num_enums) {
+					snprintf(cmd_line, sizeof(cmd_line),
+						 "cset name=\"%s\" %s",
+						 ctl->name, kinfo.enum_names[eidx]);
+					tb_apply_control_line(g_tp, cmd_line);
+				}
+			}
+		}
+		populate_tb_kctl_info(idx, ctl, &kinfo);
+	}
+
+	rsp.status = status;
+	rsp.api_used = kreq->api_backend ? kreq->api_backend : SOF_AUDIO_API_ALSA;
+	rsp.info = kinfo;
+	rsp.bytes_len = g_kctl_shadow[idx].bytes_len;
+	if (rsp.bytes_len > 0)
+		memcpy(rsp.bytes_data, g_kctl_shadow[idx].bytes_data, rsp.bytes_len);
+
+	pthread_mutex_unlock(&g_tb_lock);
+
+	return send_reply(sock, opcode, req_id, status, &rsp, sizeof(rsp));
+}
+
+/* -------------------------------------------------------------------------
+ * Per-Client Worker Thread & Accept Loop
+ * -------------------------------------------------------------------------
+ */
+
+struct tb_client_ctx {
+	int sock;
+};
+
+static void *tb_client_worker_fn(void *arg)
+{
+	struct tb_client_ctx *ctx = (struct tb_client_ctx *)arg;
+	int sock = ctx->sock;
+	int one = 1;
+
+	free(ctx);
+	g_in_remote_rpc = true;
+	setsockopt(sock, IPPROTO_TCP, TCP_NODELAY, &one, sizeof(one));
+
+	while (g_srv_running) {
+		struct sof_net_hdr hdr;
+
+		if (read_exact(sock, &hdr, sizeof(hdr)) < 0)
+			break;
+
+		if (hdr.magic != SOF_NET_MAGIC || hdr.version != SOF_NET_VERSION) {
+			send_reply(sock, hdr.opcode, hdr.req_id, -EPROTO, NULL, 0);
+			break;
+		}
+
+		if (hdr.payload_len > (16 * 1024 * 1024)) {
+			send_reply(sock, hdr.opcode, hdr.req_id, -E2BIG, NULL, 0);
+			break;
+		}
+
+		uint8_t *req_buf = NULL;
+
+		if (hdr.payload_len > 0) {
+			req_buf = malloc(hdr.payload_len + 1);
+			if (!req_buf)
+				break;
+			if (read_exact(sock, req_buf, hdr.payload_len) < 0) {
+				free(req_buf);
+				break;
+			}
+			req_buf[hdr.payload_len] = '\0';
+		}
+
+		int rc = 0;
+
+		switch (hdr.opcode) {
+		case SOF_NET_OP_PING:
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0, "PONG", 4);
+			break;
+
+		case SOF_NET_OP_GET_INFO: {
+			struct sof_cdev_info info;
+
+			pthread_mutex_lock(&g_tb_lock);
+			populate_cdev_info(g_tp, &info);
+			pthread_mutex_unlock(&g_tb_lock);
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0, &info, sizeof(info));
+			break;
+		}
+
+		case SOF_NET_OP_PM_CTL: {
+			if (hdr.payload_len < sizeof(struct sof_cdev_pm_ctl)) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			struct sof_cdev_pm_ctl ctl;
+
+			memcpy(&ctl, req_buf, sizeof(ctl));
+			pthread_mutex_lock(&g_tb_lock);
+			if (ctl.op == SOF_PM_OP_WAKE_HOLD || ctl.op == SOF_PM_OP_BOOT_DSP) {
+				g_dsp_paused = false;
+				pthread_cond_broadcast(&g_tb_cond);
+			} else if (ctl.op == SOF_PM_OP_RELEASE_HOLD) {
+				g_dsp_paused = true;
+			} else if (ctl.op == SOF_PM_OP_CORE_GET && ctl.core_id < CONFIG_CORE_COUNT) {
+				cpu_enable_core(ctl.core_id);
+			} else if (ctl.op == SOF_PM_OP_CORE_PUT && ctl.core_id > 0 &&
+				   ctl.core_id < CONFIG_CORE_COUNT) {
+				cpu_disable_core(ctl.core_id);
+			}
+			ctl.fw_state = 7;
+			ctl.dsp_power_state = g_dsp_paused ? 4 : 1;
+			ctl.pm_runtime_active = g_dsp_paused ? 0 : 1;
+			ctl.enabled_cores_mask = arch_cpu_enabled_cores();
+			ctl.fd_holding_d0 = g_dsp_paused ? 0 : 1;
+			pthread_mutex_unlock(&g_tb_lock);
+
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0, &ctl, sizeof(ctl));
+			break;
+		}
+
+		case SOF_NET_OP_IPC_TX: {
+			if (hdr.payload_len < sizeof(struct sof_net_ipc_tx_req)) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			const struct sof_net_ipc_tx_req *ireq =
+				(const struct sof_net_ipc_tx_req *)req_buf;
+			if (hdr.payload_len < sizeof(*ireq) + ireq->tx_size ||
+			    ireq->rx_size > 65536) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+
+			uint32_t rx_cap = ireq->rx_size <= SOF_IPC_MSG_MAX_SIZE - 8 ?
+					  ireq->rx_size : 0;
+			uint8_t *out_buf = calloc(1, sizeof(struct sof_net_ipc_tx_rsp) + rx_cap);
+
+			if (!out_buf) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -ENOMEM, NULL, 0);
+				break;
+			}
+			struct sof_net_ipc_tx_rsp *rsp = (struct sof_net_ipc_tx_rsp *)out_buf;
+
+			pthread_mutex_lock(&g_tb_lock);
+			if (sof_get() && sof_get()->ipc && sof_get()->ipc->comp_data) {
+				uint32_t *mbox = (uint32_t *)sof_get()->ipc->comp_data;
+				uint32_t msg_tgt = (ireq->primary >> 30) & 0x1;
+				uint32_t msg_type = (ireq->primary >> 24) & 0x1F;
+				uint32_t mod_id = ireq->primary & 0xFFFFU;
+				uint32_t inst_id = (ireq->primary >> 16) & 0xFFU;
+				uint32_t ppl_id = (ireq->extension >> 16) & 0xFFU;
+				int file_slot_idx = -1;
+				uint32_t file_mode = 0;
+
+				/* Enable target core automatically on CREATE_PIPELINE / MOD_INIT */
+				if (msg_tgt == SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG &&
+				    msg_type == SOF_IPC4_GLB_CREATE_PIPELINE) {
+					uint32_t core = (ireq->extension >> 20) & 0xF;
+
+					if (core < CONFIG_CORE_COUNT)
+						cpu_enable_core(core);
+				} else if (msg_tgt == SOF_IPC4_MESSAGE_TARGET_MODULE_MSG &&
+					   msg_type == SOF_IPC4_MOD_INIT_INSTANCE) {
+					uint32_t core = (ireq->extension >> 24) & 0xF;
+
+					if (core < CONFIG_CORE_COUNT)
+						cpu_enable_core(core);
+				}
+
+				memset(mbox, 0, SOF_IPC_MSG_MAX_SIZE);
+				mbox[0] = ireq->primary;
+				mbox[1] = ireq->extension;
+				if (ireq->tx_size > 0 &&
+				    ireq->tx_size + 8 <= SOF_IPC_MSG_MAX_SIZE) {
+					memcpy(&mbox[2], req_buf + sizeof(*ireq), ireq->tx_size);
+				}
+
+				/* Resolve file path pointer for testbench file modules (0x9a..0x9d) */
+				if (msg_tgt == SOF_IPC4_MESSAGE_TARGET_MODULE_MSG &&
+				    msg_type == SOF_IPC4_MOD_INIT_INSTANCE &&
+				    (mod_id == TB_FILE_OUT_AIF_MODULE_ID ||
+				     mod_id == TB_FILE_IN_AIF_MODULE_ID ||
+				     mod_id == TB_FILE_OUT_DAI_MODULE_ID ||
+				     mod_id == TB_FILE_IN_DAI_MODULE_ID) &&
+				    ireq->tx_size >= sizeof(struct ipc4_file_module_cfg) && g_tp) {
+					struct ipc4_file_module_cfg *fcfg =
+						(struct ipc4_file_module_cfg *)&mbox[2];
+					uintptr_t raw_fn = (uintptr_t)fcfg->config.fn;
+
+					file_mode = fcfg->config.mode;
+					if (file_mode == FILE_READ) {
+						file_slot_idx = (raw_fn > 0 &&
+								 raw_fn <= (uintptr_t)g_tp->input_file_num) ?
+								(int)(raw_fn - 1) : g_tp->input_file_index;
+						if (file_slot_idx < 0 ||
+						    file_slot_idx >= g_tp->input_file_num)
+							file_slot_idx = 0;
+						if (file_slot_idx < g_tp->input_file_num &&
+						    g_tp->input_file[file_slot_idx])
+							fcfg->config.fn = g_tp->input_file[file_slot_idx];
+						else
+							fcfg->config.fn = "/tmp/sof_tb_srv_in.raw";
+					} else {
+						file_slot_idx = (raw_fn > 0 &&
+								 raw_fn <= (uintptr_t)g_tp->output_file_num) ?
+								(int)(raw_fn - 1) : g_tp->output_file_index;
+						if (file_slot_idx < 0 ||
+						    file_slot_idx >= g_tp->output_file_num)
+							file_slot_idx = 0;
+						if (file_slot_idx < g_tp->output_file_num &&
+						    g_tp->output_file[file_slot_idx])
+							fcfg->config.fn = g_tp->output_file[file_slot_idx];
+						else
+							fcfg->config.fn = "/tmp/sof_tb_srv_out0.raw";
+					}
+				}
+
+				ipc_cmd((struct ipc_cmd_hdr *)mbox);
+
+				/* Track active file component state for IPC-created file modules */
+				if (msg_tgt == SOF_IPC4_MESSAGE_TARGET_MODULE_MSG &&
+				    msg_type == SOF_IPC4_MOD_INIT_INSTANCE &&
+				    file_slot_idx >= 0 && (mbox[0] & 0x00FFFFFFU) == 0 && g_tp) {
+					struct ipc_comp_dev *ficd =
+						ipc_get_comp_by_id(sof_get()->ipc,
+								   IPC4_COMP_ID(mod_id, inst_id));
+					struct file_state *fstate = NULL;
+
+					if (ficd && ficd->cd && comp_mod(ficd->cd)) {
+						struct copier_data *ccd =
+							module_get_private_data(comp_mod(ficd->cd));
+						if (ccd && get_file_comp_data(ccd))
+							fstate = &get_file_comp_data(ccd)->fs;
+					}
+					if (file_mode == FILE_READ &&
+					    file_slot_idx < TB_MAX_INPUT_FILE_NUM) {
+						g_tp->fr[file_slot_idx].id =
+							IPC4_COMP_ID(mod_id, inst_id);
+						g_tp->fr[file_slot_idx].instance_id = inst_id;
+						g_tp->fr[file_slot_idx].pipeline_id = ppl_id;
+						g_tp->fr[file_slot_idx].state = fstate;
+						if (file_slot_idx >= g_tp->input_file_index)
+							g_tp->input_file_index = file_slot_idx + 1;
+					} else if (file_mode == FILE_WRITE &&
+						   file_slot_idx < TB_MAX_OUTPUT_FILE_NUM) {
+						g_tp->fw[file_slot_idx].id =
+							IPC4_COMP_ID(mod_id, inst_id);
+						g_tp->fw[file_slot_idx].instance_id = inst_id;
+						g_tp->fw[file_slot_idx].pipeline_id = ppl_id;
+						g_tp->fw[file_slot_idx].state = fstate;
+						if (file_slot_idx >= g_tp->output_file_index)
+							g_tp->output_file_index = file_slot_idx + 1;
+					}
+				}
+
+				/* Clean up file component tracking when a pipeline is deleted */
+				if (msg_tgt == SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG &&
+				    msg_type == SOF_IPC4_GLB_DELETE_PIPELINE && g_tp) {
+					int fi;
+
+					for (fi = 0; fi < TB_MAX_INPUT_FILE_NUM; fi++) {
+						if (g_tp->fr[fi].id >= 0 &&
+						    (g_tp->fr[fi].pipeline_id == (int)inst_id ||
+						     !ipc_get_comp_by_id(sof_get()->ipc,
+									 g_tp->fr[fi].id))) {
+							g_tp->fr[fi].id = -1;
+							g_tp->fr[fi].state = NULL;
+						}
+					}
+					for (fi = 0; fi < TB_MAX_OUTPUT_FILE_NUM; fi++) {
+						if (g_tp->fw[fi].id >= 0 &&
+						    (g_tp->fw[fi].pipeline_id == (int)inst_id ||
+						     !ipc_get_comp_by_id(sof_get()->ipc,
+									 g_tp->fw[fi].id))) {
+							g_tp->fw[fi].id = -1;
+							g_tp->fw[fi].state = NULL;
+						}
+					}
+					if (list_is_empty(&sof_get()->ipc->comp_list)) {
+						g_tp->input_file_index = 0;
+						g_tp->output_file_index = 0;
+					}
+				}
+
+				/* If SET_PIPELINE_STATE was sent, run one LL scheduler tick so
+				 * the compound pipeline trigger task completes immediately.
+				 */
+				if (msg_tgt == SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG &&
+				    msg_type == SOF_IPC4_GLB_SET_PIPELINE_STATE)
+					schedule_ll_run_tasks();
+				if (msg_tgt == SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG &&
+				    msg_type == SOF_IPC4_GLB_CREATE_PIPELINE)
+					pthread_cond_broadcast(&g_tb_cond);
+
+				rsp->reply_primary = mbox[0];
+				rsp->reply_extension = mbox[1];
+				rsp->ipc_status = (int32_t)(mbox[0] & 0x00FFFFFFU);
+				rsp->rx_size = rx_cap;
+				if (rx_cap > 0)
+					memcpy(out_buf + sizeof(*rsp), &mbox[2], rx_cap);
+			}
+			pthread_mutex_unlock(&g_tb_lock);
+
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0,
+					out_buf, sizeof(*rsp) + rx_cap);
+			free(out_buf);
+			break;
+		}
+
+		case SOF_NET_OP_IPC_LARGE_CFG:
+			rc = handle_ipc_large_cfg(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_WIN_INFO: {
+			struct sof_cdev_info info;
+			struct sof_cdev_win_info winfo;
+
+			pthread_mutex_lock(&g_tb_lock);
+			populate_cdev_info(g_tp, &info);
+			pthread_mutex_unlock(&g_tb_lock);
+			memcpy(winfo.windows, info.windows, sizeof(winfo.windows));
+			memcpy(winfo.debug_slots, info.debug_slots, sizeof(winfo.debug_slots));
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0, &winfo, sizeof(winfo));
+			break;
+		}
+
+		case SOF_NET_OP_WIN_READ: {
+			if (hdr.payload_len < sizeof(struct sof_net_win_io_req)) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			const struct sof_net_win_io_req *wreq =
+				(const struct sof_net_win_io_req *)req_buf;
+			if (!wreq->size || wreq->size > 65536) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			uint8_t *rbuf = calloc(1, wreq->size);
+
+			if (!rbuf) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -ENOMEM, NULL, 0);
+				break;
+			}
+
+			pthread_mutex_lock(&g_tb_lock);
+			refresh_emulated_windows(g_tp);
+			const uint8_t *src_win = g_win0_fw_regs;
+			size_t win_cap = sizeof(g_win0_fw_regs);
+
+			if (wreq->win_id == SOF_CDEV_WIN_OUTBOX) {
+				src_win = g_win1_outbox;
+				win_cap = sizeof(g_win1_outbox);
+			} else if (wreq->win_id == SOF_CDEV_WIN_DEBUG) {
+				src_win = g_win2_debug;
+				win_cap = sizeof(g_win2_debug);
+			} else if (wreq->win_id == SOF_CDEV_WIN_PERF) {
+				src_win = g_win3_perf;
+				win_cap = sizeof(g_win3_perf);
+			} else if (wreq->win_id == SOF_CDEV_WIN_BY_SLOT_TYPE) {
+				if (wreq->slot_type == SOF_CDEV_SLOT_TELEMETRY) {
+					src_win = g_win2_debug + 4096;
+					win_cap = 4096;
+				} else if (wreq->slot_type == SOF_CDEV_SLOT_SHELL) {
+					src_win = g_win2_debug + 8192;
+					win_cap = 4096;
+				}
+			}
+
+			if (wreq->offset < win_cap) {
+				size_t avail = win_cap - wreq->offset;
+				size_t to_copy = wreq->size < avail ? wreq->size : avail;
+
+				memcpy(rbuf, src_win + wreq->offset, to_copy);
+			}
+			pthread_mutex_unlock(&g_tb_lock);
+
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0, rbuf, wreq->size);
+			free(rbuf);
+			break;
+		}
+
+		case SOF_NET_OP_WIN_WRITE:
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0, NULL, 0);
+			break;
+
+		case SOF_NET_OP_WINSTREAM_IO: {
+			if (hdr.payload_len < sizeof(struct sof_net_winstream_req)) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			const struct sof_net_winstream_req *wsreq =
+				(const struct sof_net_winstream_req *)req_buf;
+			if (wsreq->tx_len > 0 &&
+			    hdr.payload_len >= sizeof(*wsreq) + wsreq->tx_len) {
+				char cmd_line[256];
+				char sh_out[4096];
+				size_t clen = wsreq->tx_len < sizeof(cmd_line) - 1 ?
+					      wsreq->tx_len : sizeof(cmd_line) - 1;
+
+				memcpy(cmd_line, req_buf + sizeof(*wsreq), clen);
+				cmd_line[clen] = '\0';
+				/* Strip trailing CR/LF */
+				while (clen > 0 && (cmd_line[clen - 1] == '\r' ||
+						    cmd_line[clen - 1] == '\n'))
+					cmd_line[--clen] = '\0';
+				memset(sh_out, 0, sizeof(sh_out));
+				execute_tb_shell_cmd(cmd_line, sh_out, sizeof(sh_out));
+				g_shell_seq++;
+			}
+
+			size_t slen = strlen(g_last_shell_output);
+			size_t rx_len = (wsreq->rx_buf_len > 0 && slen > 0) ?
+					(slen < wsreq->rx_buf_len ? slen : wsreq->rx_buf_len) : 0;
+			uint8_t *out_buf = calloc(1, sizeof(struct sof_net_winstream_rsp) + rx_len);
+
+			if (!out_buf) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -ENOMEM, NULL, 0);
+				break;
+			}
+			struct sof_net_winstream_rsp *wsrsp =
+				(struct sof_net_winstream_rsp *)out_buf;
+			wsrsp->rx_bytes_read = (uint32_t)rx_len;
+			wsrsp->seq_out = g_shell_seq;
+			if (rx_len > 0) {
+				memcpy(out_buf + sizeof(*wsrsp), g_last_shell_output, rx_len);
+				g_last_shell_output[0] = '\0';
+			}
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0,
+					out_buf, sizeof(*wsrsp) + (uint32_t)rx_len);
+			free(out_buf);
+			break;
+		}
+
+		case SOF_NET_OP_TELEM_SNAPSHOT:
+			rc = handle_telem_snapshot(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_WORKLOAD_SIM_CFG:
+			rc = handle_workload_sim_cfg(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_SCHED_TRACE:
+			rc = handle_sched_trace(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_LLEXT_LOAD: {
+			if (hdr.payload_len < sizeof(struct sof_net_llext_req)) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			const struct sof_net_llext_req *lreq =
+				(const struct sof_net_llext_req *)req_buf;
+			if (hdr.payload_len < sizeof(*lreq) + lreq->data_size) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			struct sof_net_llext_rsp rsp;
+			uint32_t lid = lreq->lib_id ? lreq->lib_id : 1;
+			uint32_t slot = (lid - 1) % TB_MAX_LOADED_LLEXTS;
+			const uint8_t *mod_bytes = req_buf + sizeof(*lreq);
+			char tmp_path[128];
+			void *dl_h = NULL;
+
+			memset(&rsp, 0, sizeof(rsp));
+			rsp.lib_id = lid;
+			rsp.fw_state = 7;
+
+			if (g_tp && g_tp->server_tmp_dir[0]) {
+				snprintf(tmp_path, sizeof(tmp_path), "%s/llext_%u.so",
+					 g_tp->server_tmp_dir, lid);
+				FILE *fp = fopen(tmp_path, "wb");
+
+				if (fp) {
+					fwrite(mod_bytes, 1, lreq->data_size, fp);
+					fclose(fp);
+					dl_h = dlopen(tmp_path, RTLD_NOW | RTLD_GLOBAL);
+				}
+			} else {
+				snprintf(tmp_path, sizeof(tmp_path),
+					 "/tmp/sof-tb-llext-%u-XXXXXX.so", lid);
+				int lfd = mkstemps(tmp_path, 3);
+
+				if (lfd >= 0) {
+					ssize_t wr = write(lfd, mod_bytes, lreq->data_size);
+
+					(void)wr;
+					close(lfd);
+					dl_h = dlopen(tmp_path, RTLD_NOW | RTLD_GLOBAL);
+				}
+			}
+
+			pthread_mutex_lock(&g_tb_lock);
+			if (g_loaded_llexts[slot].dl_handle)
+				dlclose(g_loaded_llexts[slot].dl_handle);
+			g_loaded_llexts[slot].active = true;
+			g_loaded_llexts[slot].lib_id = lid;
+			g_loaded_llexts[slot].data_size = lreq->data_size;
+			g_loaded_llexts[slot].dl_handle = dl_h;
+			snprintf(g_loaded_llexts[slot].path, sizeof(g_loaded_llexts[slot].path),
+				 "%s", tmp_path);
+			snprintf(g_loaded_llexts[slot].name, sizeof(g_loaded_llexts[slot].name),
+				 "llext%u", lid);
+			pthread_mutex_unlock(&g_tb_lock);
+
+			snprintf(rsp.shell_out, sizeof(rsp.shell_out),
+				 "Testbench loaded module image (%u bytes) at lib_id %u (%s)\n",
+				 lreq->data_size, rsp.lib_id,
+				 dl_h ? "dlopen active" : "registered in LLEXT table");
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, 0, &rsp, sizeof(rsp));
+			break;
+		}
+
+		case SOF_NET_OP_SHELL_EXEC: {
+			if (hdr.payload_len < sizeof(struct sof_net_shell_req)) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -EINVAL, NULL, 0);
+				break;
+			}
+			const struct sof_net_shell_req *sreq =
+				(const struct sof_net_shell_req *)req_buf;
+			const char *cmd_str = (const char *)(req_buf + sizeof(*sreq));
+			size_t out_cap = 32768;
+			char *out_text = calloc(1, out_cap);
+
+			if (!out_text) {
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, -ENOMEM, NULL, 0);
+				break;
+			}
+			int n = execute_tb_shell_cmd(cmd_str, out_text, out_cap);
+
+			if (n < 0)
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, n, NULL, 0);
+			else
+				rc = send_reply(sock, hdr.opcode, hdr.req_id, 0,
+						out_text, (uint32_t)n);
+			free(out_text);
+			break;
+		}
+
+		case SOF_NET_OP_PROBE_CTL:
+			rc = handle_probe_ctl(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_PCM_CTL:
+			rc = handle_pcm_ctl(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_CARD_LIST:
+			rc = handle_card_list(sock, hdr.req_id);
+			break;
+
+		case SOF_NET_OP_PCM_CAPS:
+			rc = handle_pcm_caps(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_DAPM_GRAPH:
+			rc = handle_dapm_graph(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_COMPR_CTL:
+			rc = handle_compr_ctl(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_KCTL_LIST:
+			rc = handle_kctl_list(sock, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		case SOF_NET_OP_KCTL_GET:
+		case SOF_NET_OP_KCTL_SET:
+			rc = handle_kctl_io(sock, hdr.opcode, hdr.req_id, req_buf, hdr.payload_len);
+			break;
+
+		default:
+			rc = send_reply(sock, hdr.opcode, hdr.req_id, -ENOSYS, NULL, 0);
+			break;
+		}
+
+		free(req_buf);
+		if (rc < 0)
+			break;
+	}
+
+	close(sock);
+	return NULL;
+}
+
+static void *tb_accept_worker_fn(void *arg)
+{
+	(void)arg;
+	while (g_srv_running && g_srv_fd >= 0) {
+		struct sockaddr_in cli_addr;
+		socklen_t cli_len = sizeof(cli_addr);
+		int cli_fd = accept(g_srv_fd, (struct sockaddr *)&cli_addr, &cli_len);
+
+		if (cli_fd < 0) {
+			if (errno == EINTR && g_srv_running)
+				continue;
+			break;
+		}
+
+		struct tb_client_ctx *ctx = malloc(sizeof(*ctx));
+
+		if (!ctx) {
+			close(cli_fd);
+			continue;
+		}
+		ctx->sock = cli_fd;
+
+		pthread_t tid;
+		pthread_attr_t attr;
+
+		pthread_attr_init(&attr);
+		pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_DETACHED);
+		if (pthread_create(&tid, &attr, tb_client_worker_fn, ctx) != 0) {
+			close(cli_fd);
+			free(ctx);
+		}
+		pthread_attr_destroy(&attr);
+	}
+	return NULL;
+}
+
+int tb_remote_server_start(struct testbench_prm *tp)
+{
+	struct sockaddr_in bind_addr;
+	int one = 1;
+	int port;
+
+	if (!tp || tp->server_port <= 0)
+		return 0;
+
+	port = tp->server_port;
+	g_tp = tp;
+	signal(SIGPIPE, SIG_IGN);
+
+	g_srv_fd = socket(AF_INET, SOCK_STREAM, 0);
+	if (g_srv_fd < 0) {
+		perror("tb_remote_server: socket");
+		return -errno;
+	}
+
+	setsockopt(g_srv_fd, SOL_SOCKET, SO_REUSEADDR, &one, sizeof(one));
+
+	memset(&bind_addr, 0, sizeof(bind_addr));
+	bind_addr.sin_family = AF_INET;
+	bind_addr.sin_addr.s_addr = htonl(INADDR_ANY);
+	bind_addr.sin_port = htons((uint16_t)port);
+
+	if (bind(g_srv_fd, (struct sockaddr *)&bind_addr, sizeof(bind_addr)) < 0) {
+		perror("tb_remote_server: bind");
+		close(g_srv_fd);
+		g_srv_fd = -1;
+		return -errno;
+	}
+
+	if (listen(g_srv_fd, 16) < 0) {
+		perror("tb_remote_server: listen");
+		close(g_srv_fd);
+		g_srv_fd = -1;
+		return -errno;
+	}
+
+	g_srv_running = true;
+	g_quit_requested = false;
+	if (pthread_create(&g_accept_thread, NULL, tb_accept_worker_fn, NULL) != 0) {
+		g_srv_running = false;
+		close(g_srv_fd);
+		g_srv_fd = -1;
+		return -EIO;
+	}
+
+	printf("sof-testbench4 remote server listening on 0.0.0.0:%d (SOFR protocol v%d)\n",
+	       port, SOF_NET_VERSION);
+	fflush(stdout);
+	return 0;
+}
+
+void tb_remote_server_stop(void)
+{
+	if (!g_srv_running || g_in_remote_rpc)
+		return;
+
+	g_srv_running = false;
+	g_dsp_paused = false;
+	pthread_cond_broadcast(&g_tb_cond);
+
+	if (g_srv_fd >= 0) {
+		shutdown(g_srv_fd, SHUT_RDWR);
+		close(g_srv_fd);
+		g_srv_fd = -1;
+	}
+
+	pthread_join(g_accept_thread, NULL);
+}
+
+#endif /* !__XTENSA__ && !CONFIG_XT_SIMULATOR */
diff --git a/tools/testbench/run_test_suite.sh b/tools/testbench/run_test_suite.sh
new file mode 100755
index 000000000000..86730067828e
--- /dev/null
+++ b/tools/testbench/run_test_suite.sh
@@ -0,0 +1,859 @@
+#!/usr/bin/env bash
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2026 Intel Corporation. All rights reserved.
+#
+# Comprehensive SOF Testbench4 Topology & Module Test Suite
+# Covers:
+#   Tier 1: All 26 built-in audio modules across S16_LE, S24_LE, S32_LE,
+#           rate conversion (44.1k <-> 48k), and multi-channel (4ch -> 2ch)
+#   Tier 2: Simple to complex multi-pipeline DAG topologies (passthrough,
+#           cascaded 3-pipeline chain, 6-module EFX chain, 1-to-2 fan-out
+#           crossover, 2-to-1 fan-in RTC AEC, 4ch DMIC TDFB, 11-pipeline
+#           concurrent HDA multi-stream)
+#   Tier 3: Combinations of LL and DP modules (single DP, duplex multi-thread
+#           DP for phase_vocoder & stft_process variants, mixed LL+DP SRC)
+#   Tier 4: Multi-Core LL and Cross-Core DP execution across DSP Cores 0, 1, 2
+#           (HDA, MTL, LNL, PTL, and Dolby DAX + Google CTC)
+#   Tier 5: Runtime control scripts (-s amixer/sof-ctl) and live SOFR TCP
+#           remote network control & telemetry inspection (-S <port> -W)
+
+set -euo pipefail
+
+SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+SOF_TOP="$(cd "${SCRIPT_DIR}/../.." && pwd)"
+
+# Locate sof-testbench4 binary
+if [[ -z "${TB_BIN:-}" ]]; then
+	if [[ -x "${SCRIPT_DIR}/build_testbench/sof-testbench4" ]]; then
+		TB_BIN="${SCRIPT_DIR}/build_testbench/sof-testbench4"
+	elif [[ -x "${SCRIPT_DIR}/build_testbench/install/bin/sof-testbench4" ]]; then
+		TB_BIN="${SCRIPT_DIR}/build_testbench/install/bin/sof-testbench4"
+	elif [[ -x "${SCRIPT_DIR}/build_upstream/sof-testbench4" ]]; then
+		TB_BIN="${SCRIPT_DIR}/build_upstream/sof-testbench4"
+	elif [[ -x "${SCRIPT_DIR}/build_upstream/install/bin/sof-testbench4" ]]; then
+		TB_BIN="${SCRIPT_DIR}/build_upstream/install/bin/sof-testbench4"
+	else
+		echo "ERROR: sof-testbench4 binary not found under ${SCRIPT_DIR}/build_testbench or build_upstream" >&2
+		exit 1
+	fi
+fi
+
+# Locate sof-tb-ctl binary
+if [[ -z "${TB_CTL_BIN:-}" ]]; then
+	if [[ -x "${SCRIPT_DIR}/build_testbench/sof-tb-ctl" ]]; then
+		TB_CTL_BIN="${SCRIPT_DIR}/build_testbench/sof-tb-ctl"
+	elif [[ -x "${SCRIPT_DIR}/build_testbench/install/bin/sof-tb-ctl" ]]; then
+		TB_CTL_BIN="${SCRIPT_DIR}/build_testbench/install/bin/sof-tb-ctl"
+	elif [[ -x "${SCRIPT_DIR}/build_upstream/sof-tb-ctl" ]]; then
+		TB_CTL_BIN="${SCRIPT_DIR}/build_upstream/sof-tb-ctl"
+	elif [[ -x "${SCRIPT_DIR}/build_upstream/install/bin/sof-tb-ctl" ]]; then
+		TB_CTL_BIN="${SCRIPT_DIR}/build_upstream/install/bin/sof-tb-ctl"
+	else
+		echo "ERROR: sof-tb-ctl binary not found under ${SCRIPT_DIR}/build_testbench or build_upstream" >&2
+		exit 1
+	fi
+fi
+
+TPLG_DIR="${TPLG_DIR:-${SOF_TOP}/tools/build_tools/topology/topology2}"
+DEV_TPLG="${TPLG_DIR}/development"
+PROD_TPLG="${TPLG_DIR}/production"
+
+TIER_FILTER="all"
+NAME_FILTER=""
+LIST_ONLY=0
+VERBOSE=0
+SINGLE_SESSION=1
+
+usage() {
+	cat <<EOF
+Usage: $(basename "$0") [options]
+
+Options:
+  --tier <1|2|3|4|5|all>  Run only the specified test tier (default: all)
+  --filter <regex>        Run only tests whose name matches <regex>
+  --single-session        Run all tests in 1 persistent sof-testbench4 -I session (default)
+  --per-process           Spawn a fresh sof-testbench4 process per test
+  --list                  List all registered test cases and exit
+  -v, --verbose           Show full testbench output for passing tests
+  -h, --help              Show this help message
+EOF
+}
+
+while [[ $# -gt 0 ]]; do
+	case "$1" in
+		--tier)
+			TIER_FILTER="$2"
+			shift 2
+			;;
+		--filter)
+			NAME_FILTER="$2"
+			shift 2
+			;;
+		--single-session)
+			SINGLE_SESSION=1
+			shift
+			;;
+		--per-process)
+			SINGLE_SESSION=0
+			shift
+			;;
+		--list)
+			LIST_ONLY=1
+			shift
+			;;
+		-v|--verbose)
+			VERBOSE=1
+			shift
+			;;
+		-h|--help)
+			usage
+			exit 0
+			;;
+		*)
+			echo "Unknown option: $1" >&2
+			usage >&2
+			exit 1
+			;;
+	esac
+done
+
+WORK_DIR="$(mktemp -d /tmp/sof_tb_suite_XXXXXX)"
+TB_PORT=$((19400 + (RANDOM % 500)))
+TB_SERVER_PID=""
+TB_SERVER_LOG="${WORK_DIR}/persistent_server.log"
+
+cleanup() {
+	if [[ -n "${TB_SERVER_PID}" ]] && kill -0 "${TB_SERVER_PID}" 2>/dev/null; then
+		"${TB_CTL_BIN}" -H 127.0.0.1 -p "${TB_PORT}" quit >/dev/null 2>&1 || true
+		wait "${TB_SERVER_PID}" 2>/dev/null || true
+	fi
+	rm -rf "${WORK_DIR}"
+}
+trap cleanup EXIT
+
+start_persistent_server() {
+	"${TB_BIN}" -I -S "${TB_PORT}" >"${TB_SERVER_LOG}" 2>&1 &
+	TB_SERVER_PID=$!
+	local ready=0
+	for _ in {1..40}; do
+		if "${TB_CTL_BIN}" -H 127.0.0.1 -p "${TB_PORT}" ping >/dev/null 2>&1; then
+			ready=1
+			break
+		fi
+		sleep 0.05
+	done
+	if [[ "${ready}" -ne 1 ]]; then
+		echo "ERROR: persistent sof-testbench4 -I failed to start on port ${TB_PORT}" >&2
+		cat "${TB_SERVER_LOG}" >&2 || true
+		exit 1
+	fi
+}
+
+# Generate deterministic multi-tone PCM input files
+generate_inputs() {
+	python3 - "${WORK_DIR}" <<'PYEOF'
+import math, os, struct, sys
+
+work_dir = sys.argv[1]
+
+def synth_tone(n_frames, rate, channels, bits):
+    buf = bytearray()
+    for i in range(n_frames):
+        # 500 Hz + 1500 Hz + 4000 Hz composite signal for crossover/MBDRC/STFT/TDFB
+        t = i / float(rate)
+        sig = (0.45 * math.sin(2.0 * math.pi * 500.0 * t) +
+               0.30 * math.sin(2.0 * math.pi * 1500.0 * t) +
+               0.15 * math.sin(2.0 * math.pi * 4000.0 * t))
+        if bits == 16:
+            val = int(max(-32767, min(32767, sig * 24000.0)))
+            frame = [val if (ch % 2 == 0) else -val for ch in range(channels)]
+            buf.extend(struct.pack("<" + "h" * channels, *frame))
+        elif bits == 24:
+            # S24_LE stored in 32-bit signed container (lower 24 bits significant)
+            val = int(max(-8388607, min(8388607, sig * 6000000.0)))
+            frame = [val if (ch % 2 == 0) else -val for ch in range(channels)]
+            buf.extend(struct.pack("<" + "i" * channels, *frame))
+        else:
+            val = int(max(-2147483647, min(2147483647, sig * 1500000000.0)))
+            frame = [val if (ch % 2 == 0) else -val for ch in range(channels)]
+            buf.extend(struct.pack("<" + "i" * channels, *frame))
+    return bytes(buf)
+
+with open(os.path.join(work_dir, "in_48k_2ch_s32.raw"), "wb") as f:
+    f.write(synth_tone(4800, 48000, 2, 32))
+with open(os.path.join(work_dir, "in_48k_2ch_s24.raw"), "wb") as f:
+    f.write(synth_tone(4800, 48000, 2, 24))
+with open(os.path.join(work_dir, "in_48k_2ch_s16.raw"), "wb") as f:
+    f.write(synth_tone(4800, 48000, 2, 16))
+with open(os.path.join(work_dir, "in_48k_4ch_s32.raw"), "wb") as f:
+    f.write(synth_tone(4800, 48000, 4, 32))
+with open(os.path.join(work_dir, "in_44k1_2ch_s32.raw"), "wb") as f:
+    f.write(synth_tone(4410, 44100, 2, 32))
+with open(os.path.join(work_dir, "in_16k_2ch_s16.raw"), "wb") as f:
+    f.write(synth_tone(1600, 16000, 2, 16))
+PYEOF
+}
+
+TOTAL_RUN=0
+TOTAL_PASS=0
+TOTAL_FAIL=0
+declare -a FAILED_TESTS=()
+declare -A TIER_PASS=([1]=0 [2]=0 [3]=0 [4]=0 [5]=0)
+declare -A TIER_TOTAL=([1]=0 [2]=0 [3]=0 [4]=0 [5]=0)
+
+should_run() {
+	local tier="$1"
+	local name="$2"
+	if [[ "${TIER_FILTER}" != "all" && "${TIER_FILTER}" != "${tier}" ]]; then
+		return 1
+	fi
+	if [[ -n "${NAME_FILTER}" ]] && ! [[ "${name}" =~ ${NAME_FILTER} ]]; then
+		return 1
+	fi
+	return 0
+}
+
+# run_tb_case <tier> <name> <description> <tplg_path> <pipelines> <num_in> <in_file> <num_out> <expect_regex> [extra_args...]
+run_tb_case() {
+	local tier="$1"
+	local name="$2"
+	local desc="$3"
+	local tplg="$4"
+	local pipelines="$5"
+	local num_in="$6"
+	local in_file="$7"
+	local num_out="$8"
+	local expect_regex="$9"
+	shift 9
+	local extra_args=("$@")
+
+	if ! should_run "${tier}" "${name}"; then
+		return 0
+	fi
+
+	if [[ "${LIST_ONLY}" -eq 1 ]]; then
+		printf "  [Tier %s] %-36s : %s\n" "${tier}" "${name}" "${desc}"
+		return 0
+	fi
+
+	TOTAL_RUN=$((TOTAL_RUN + 1))
+	TIER_TOTAL[${tier}]=$((TIER_TOTAL[${tier}] + 1))
+
+	if [[ ! -f "${tplg}" ]]; then
+		printf "  [FAIL] [T%s] %-36s (missing topology: %s)\n" "${tier}" "${name}" "${tplg}"
+		TOTAL_FAIL=$((TOTAL_FAIL + 1))
+		FAILED_TESTS+=("${name}")
+		return 0
+	fi
+
+	local in_arg=""
+	for ((idx = 1; idx <= num_in; idx++)); do
+		[[ -n "${in_arg}" ]] && in_arg+=","
+		in_arg+="${in_file}"
+	done
+
+	local out_arg=""
+	local -a out_files=()
+	for ((idx = 1; idx <= num_out; idx++)); do
+		local of="${WORK_DIR}/out_${name}_${idx}.raw"
+		rm -f "${of}"
+		out_files+=("${of}")
+		[[ -n "${out_arg}" ]] && out_arg+=","
+		out_arg+="${of}"
+	done
+
+	local log_file="${WORK_DIR}/log_${name}.txt"
+	local rc=0
+	local fail_reason=""
+
+	if [[ "${SINGLE_SESSION}" -eq 1 ]]; then
+		if [[ -z "${TB_SERVER_PID}" ]] || ! kill -0 "${TB_SERVER_PID}" 2>/dev/null; then
+			fail_reason="persistent sof-testbench4 server (PID ${TB_SERVER_PID:-none}) is not running"
+		else
+			"${TB_CTL_BIN}" -H 127.0.0.1 -p "${TB_PORT}" \
+				run-test -t "${tplg}" -p "${pipelines}" -i "${in_arg}" -o "${out_arg}" "${extra_args[@]}" \
+				>"${log_file}" 2>&1 || rc=$?
+			if ! kill -0 "${TB_SERVER_PID}" 2>/dev/null; then
+				fail_reason="persistent sof-testbench4 server (PID ${TB_SERVER_PID}) died during test"
+			fi
+		fi
+	else
+		"${TB_BIN}" -t "${tplg}" -p "${pipelines}" -i "${in_arg}" -o "${out_arg}" "${extra_args[@]}" >"${log_file}" 2>&1 || rc=$?
+	fi
+
+	if [[ -z "${fail_reason}" ]]; then
+		if [[ "${rc}" -ne 0 ]]; then
+			fail_reason="exit code ${rc}"
+		elif grep -q "^error:" "${log_file}"; then
+			fail_reason="error in testbench output"
+		elif [[ "${name}" != "mod_igo_nr32" ]]; then
+			for of in "${out_files[@]}"; do
+				if [[ ! -s "${of}" ]]; then
+					fail_reason="empty or missing output file $(basename "${of}")"
+					break
+				fi
+			done
+		fi
+	fi
+
+	if [[ -z "${fail_reason}" && -n "${expect_regex}" ]]; then
+		if ! grep -Eq "${expect_regex}" "${log_file}"; then
+			fail_reason="missing expected pattern '${expect_regex}'"
+		fi
+	fi
+
+	if [[ -z "${fail_reason}" ]]; then
+		local perf_summary
+		perf_summary="$(grep "Total execution time:" "${log_file}" 2>/dev/null | tail -n 1 | sed 's/Total execution time: //' || true)"
+		printf "  [PASS] [T%s] %-36s | %-44s | %s\n" "${tier}" "${name}" "${desc}" "${perf_summary:-OK}"
+		TOTAL_PASS=$((TOTAL_PASS + 1))
+		TIER_PASS[${tier}]=$((TIER_PASS[${tier}] + 1))
+		if [[ "${VERBOSE}" -eq 1 ]]; then
+			cat "${log_file}"
+		fi
+	else
+		printf "  [FAIL] [T%s] %-36s | %-44s | %s\n" "${tier}" "${name}" "${desc}" "${fail_reason}"
+		cat "${log_file}" >&2
+		TOTAL_FAIL=$((TOTAL_FAIL + 1))
+		FAILED_TESTS+=("${name}")
+	fi
+}
+
+# ==============================================================================
+# Tier 5 Helper: Live Remote Server & Control Tests
+# ==============================================================================
+run_tier5_tests() {
+	# 5.1 Control script (-s) with amixer and sof-ctl on sof-hda-generic.tplg
+	if should_run 5 "ctrl_script_hda_generic"; then
+		if [[ "${LIST_ONLY}" -eq 1 ]]; then
+			printf "  [Tier 5] %-36s : %s\n" "ctrl_script_hda_generic" "Runtime -s amixer & sof-ctl script on sof-hda-generic"
+		else
+			local ctl_script="${WORK_DIR}/controls.sh"
+			cat >"${ctl_script}" <<EOF
+amixer -c0 cset name='Pre Mixer Analog Playback Volume' 30,30
+amixer -c0 cset name='Post Mixer Analog Playback Volume' 40,40
+sof-ctl -c name='Post Mixer Analog Playback IIR Eq bytes' -s ${SOF_TOP}/tools/ctl/ipc4/eq_iir/pass.txt
+EOF
+			run_tb_case 5 "ctrl_script_hda_generic" \
+				"Runtime -s amixer & sof-ctl script" \
+				"${PROD_TPLG}/sof-hda-generic.tplg" "1,2" \
+				1 "${WORK_DIR}/in_48k_2ch_s32.raw" 1 \
+				"Setting control name.*Post Mixer Analog Playback IIR Eq bytes" \
+				-r 48000 -R 48000 -c 2 -n 2 -b S32_LE -s "${ctl_script}"
+		fi
+	fi
+
+	# 5.2 Live SOFR v1 TCP remote control & telemetry on 3-core LL+DP topology
+	if should_run 5 "remote_tcp_multicore_dp"; then
+		if [[ "${LIST_ONLY}" -eq 1 ]]; then
+			printf "  [Tier 5] %-36s : %s\n" "remote_tcp_multicore_dp" "Live SOFR TCP remote control & telemetry on 3-core DP"
+		else
+			TOTAL_RUN=$((TOTAL_RUN + 1))
+			TIER_TOTAL[5]=$((TIER_TOTAL[5] + 1))
+			local cli_log="${WORK_DIR}/remote_cli.log"
+			local dot_file="${WORK_DIR}/dapm.dot"
+			local port="${TB_PORT}"
+			local tb_pid=""
+			local fail_reason=""
+
+			if [[ "${SINGLE_SESSION}" -eq 1 ]]; then
+				if [[ -z "${TB_SERVER_PID}" ]] || ! kill -0 "${TB_SERVER_PID}" 2>/dev/null; then
+					fail_reason="persistent sof-testbench4 server is not running"
+				fi
+			else
+				port=$((19900 + (RANDOM % 500)))
+				local srv_log="${WORK_DIR}/remote_srv.log"
+				"${TB_BIN}" -I -S "${port}" >"${srv_log}" 2>&1 &
+				tb_pid=$!
+				local ready=0
+				for _ in {1..30}; do
+					if "${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" ping >/dev/null 2>&1; then
+						ready=1
+						break
+					fi
+					sleep 0.1
+				done
+				[[ "${ready}" -ne 1 ]] && fail_reason="TCP server did not come up on port ${port}"
+			fi
+
+			if [[ -z "${fail_reason}" ]]; then
+				{
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" io-cfg \
+						-r 48000 -R 48000 -c 2 -n 2 -b S32_LE \
+						-p 5,6,7,8,11,12 \
+						-i "${WORK_DIR}/in_48k_2ch_s32.raw,${WORK_DIR}/in_48k_2ch_s32.raw,${WORK_DIR}/in_48k_2ch_s32.raw" \
+						-o "${WORK_DIR}/ro1.raw,${WORK_DIR}/ro2.raw,${WORK_DIR}/ro3.raw"
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" tplg-load \
+						"${DEV_TPLG}/sof-mtl-nocodec-dp-core-test.tplg" 5,6,7,8,11,12
+					sleep 0.05
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" ping
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" info
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" pm query
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" win-info
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" win-read 0 0 32
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" large-cfg-get 0 0 9 512
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" cards
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" pcm-caps
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" dapm "${dot_file}"
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" compr caps
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" kctl list
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" kctl get 1
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" kctl set 1 25 25
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" telem
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" probes avail
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" probes extract
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" pcm status
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" pipelines
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" modules
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" shell "kernel threads"
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" sched-telem
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" sched-trace 24 --json "${WORK_DIR}/sched_trace.json"
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" mod-buffers src
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" workload-sim set virtual dram 200 180
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" workload-sim freq 0:400,1:200,2:120
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" workload-sim status
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" tplg-unload
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" workload-sim reset
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" workload-sim disable
+				} >"${cli_log}" 2>&1 || fail_reason="sof-tb-ctl command failed"
+			fi
+
+			if [[ -n "${tb_pid}" ]]; then
+				"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" quit >/dev/null 2>&1 || true
+				wait "${tb_pid}" 2>/dev/null || true
+			fi
+
+			if [[ -z "${fail_reason}" ]]; then
+				if ! grep -q "digraph DAPM" "${dot_file}"; then
+					fail_reason="DAPM DOT graph missing"
+				elif ! grep -q "DP Worker Core 1" "${cli_log}"; then
+					fail_reason="Cross-core DP Worker Core 1 thread missing in telemetry"
+				elif ! grep -q "Per-Module LL & DP Scheduling" "${cli_log}"; then
+					fail_reason="sched-telem output missing in remote shell"
+				elif ! grep -q "Per-Iteration LL & DP Module Scheduling Timeline" "${cli_log}"; then
+					fail_reason="sched-trace timeline output missing in remote shell"
+				elif ! grep -q '"traceEvents"' "${WORK_DIR}/sched_trace.json"; then
+					fail_reason="sched-trace Chrome Trace JSON export missing"
+				elif ! grep -q "DP_RING(" "${cli_log}"; then
+					fail_reason="mod-buffers DP_RING telemetry missing in remote shell"
+				elif ! grep -q "Workload Execution Time Simulation" "${cli_log}"; then
+					fail_reason="workload-sim status output missing in remote shell"
+				fi
+			fi
+
+			if [[ -z "${fail_reason}" ]]; then
+				printf "  [PASS] [T5] %-36s | %-44s | 25 RPCs OK\n" \
+					"remote_tcp_multicore_dp" "Live SOFR TCP control & 3-core telemetry"
+				TOTAL_PASS=$((TOTAL_PASS + 1))
+				TIER_PASS[5]=$((TIER_PASS[5] + 1))
+			else
+				printf "  [FAIL] [T5] %-36s | %-44s | %s\n" \
+					"remote_tcp_multicore_dp" "Live SOFR TCP control & 3-core telemetry" "${fail_reason}"
+				cat "${cli_log}" >&2 || true
+				TOTAL_FAIL=$((TOTAL_FAIL + 1))
+				FAILED_TESTS+=("remote_tcp_multicore_dp")
+			fi
+		fi
+	fi
+
+	# 5.3 CLI Workload Execution Time Simulation (-w 1 -F 0:400,1:200,2:120 -M dram:160)
+	run_tb_case 5 "workload_sim_cli_dram_multicore" \
+		"CPC Workload Sim (DRAM 1.6x, C0=400/C1=200/C2=120MHz)" \
+		"${DEV_TPLG}/sof-mtl-nocodec-dp-core-test.tplg" "5,6,7,8,11,12" \
+		3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 \
+		"Mode=VIRTUAL-SIM Mem=DRAM DRAM_Factor=1.60x" \
+		-r 48000 -R 48000 -c 2 -n 2 -b S32_LE -w 1 -F 0:400,1:200,2:120 -M dram:160
+
+	# 5.4 Hardware Platform Preset & Core/Memory Config (-A ptl -T 20)
+	run_tb_case 5 "platform_preset_ptl_multicore" \
+		"Hardware Platform Preset PTL (5c @ 442.368MHz, 4608KB HPSRAM)" \
+		"${DEV_TPLG}/sof-mtl-nocodec-dp-core-test.tplg" "5,6,7,8,11,12" \
+		3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 \
+		"Per-Iteration LL & DP Module Scheduling Timeline" \
+		-r 48000 -R 48000 -c 2 -n 2 -b S32_LE -A ptl -T 20
+
+	# 5.5 Interactive sof-tb-ctl Batch Script (-f), REPL & Dynamic IPC4 Pipeline/Module Ops
+	if should_run 5 "interactive_tb_ctl_batch_repl"; then
+		if [[ "${LIST_ONLY}" -eq 1 ]]; then
+			printf "  [Tier 5] %-36s : %s\n" "interactive_tb_ctl_batch_repl" "Interactive sof-tb-ctl batch (-f), REPL & dynamic IPC4 ops"
+		else
+			TOTAL_RUN=$((TOTAL_RUN + 1))
+			TIER_TOTAL[5]=$((TIER_TOTAL[5] + 1))
+			local batch_file="${WORK_DIR}/tb_batch.cmd"
+			local batch_log="${WORK_DIR}/tb_batch.log"
+			local port="${TB_PORT}"
+			local tb_pid=""
+			local fail_reason=""
+
+			if [[ "${SINGLE_SESSION}" -ne 1 ]]; then
+				port=$((19900 + (RANDOM % 500)))
+				"${TB_BIN}" -I -S "${port}" >"${WORK_DIR}/batch_srv.log" 2>&1 &
+				tb_pid=$!
+				for _ in {1..30}; do
+					"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" ping >/dev/null 2>&1 && break
+					sleep 0.05
+				done
+			fi
+
+			cat >"${batch_file}" <<EOF
+ping
+info
+platform-cfg presets
+platform-cfg preset arl
+platform-cfg status
+platform-cfg preset default
+core enable 1
+core enable 2
+ppl-create 99 0 1
+mod-init 0x2 0 99 1 0
+mod-init 0x3 0 99 1 0
+mod-bind 0x2 0 0 0x3 0 0
+pipelines
+ppl-state 99 paused
+ppl-state 99 reset
+mod-unbind 0x2 0 0 0x3 0 0
+mod-delete 0x2 0
+mod-delete 0x3 0
+ppl-delete 99
+winstream version
+win-write 1 0 0xdeadbeef
+pcm start-tone hw:0,0 1000 48000 2
+pcm status
+pcm stop-tone
+pause
+step 2
+resume
+tplg-unload
+EOF
+			"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" -f "${batch_file}" >"${batch_log}" 2>&1 || \
+				fail_reason="sof-tb-ctl -f batch script failed"
+
+			if [[ -z "${fail_reason}" ]]; then
+				"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" repl >>"${batch_log}" 2>&1 <<EOF || fail_reason="sof-tb-ctl repl failed"
+ping
+info
+exit
+EOF
+			fi
+
+			if [[ -n "${tb_pid}" ]]; then
+				"${TB_CTL_BIN}" -H 127.0.0.1 -p "${port}" quit >/dev/null 2>&1 || true
+				wait "${tb_pid}" 2>/dev/null || true
+			fi
+
+			if [[ -z "${fail_reason}" ]]; then
+				if ! grep -q "CREATE_PIPELINE(inst=99, prio=0, core=1) -> status=0 (IPC4_SUCCESS)" "${batch_log}"; then
+					fail_reason="Dynamic CREATE_PIPELINE failed"
+				elif ! grep -q "MOD_INIT_INSTANCE(mod=0x2, inst=0, ppl=99, core=1, dom=LL) -> status=0 (IPC4_SUCCESS)" "${batch_log}"; then
+					fail_reason="Dynamic MOD_INIT_INSTANCE failed"
+				elif ! grep -q "MOD_BIND(0x2:0 q0 -> 0x3:0 q0) -> status=0 (IPC4_SUCCESS)" "${batch_log}"; then
+					fail_reason="Dynamic MOD_BIND failed"
+				elif ! grep -q "DELETE_PIPELINE(inst=99) -> status=0 (IPC4_SUCCESS)" "${batch_log}"; then
+					fail_reason="Dynamic DELETE_PIPELINE failed"
+				fi
+			fi
+
+			if [[ -z "${fail_reason}" ]]; then
+				printf "  [PASS] [T5] %-36s | %-44s | Batch+REPL OK\n" \
+					"interactive_tb_ctl_batch_repl" "Interactive sof-tb-ctl batch, REPL & IPC4 ops"
+				TOTAL_PASS=$((TOTAL_PASS + 1))
+				TIER_PASS[5]=$((TIER_PASS[5] + 1))
+			else
+				printf "  [FAIL] [T5] %-36s | %-44s | %s\n" \
+					"interactive_tb_ctl_batch_repl" "Interactive sof-tb-ctl batch, REPL & IPC4 ops" "${fail_reason}"
+				cat "${batch_log}" >&2 || true
+				TOTAL_FAIL=$((TOTAL_FAIL + 1))
+				FAILED_TESTS+=("interactive_tb_ctl_batch_repl")
+			fi
+		fi
+	fi
+}
+
+# ==============================================================================
+# Execute Test Suite
+# ==============================================================================
+if [[ "${LIST_ONLY}" -eq 0 ]]; then
+	generate_inputs
+	if [[ "${SINGLE_SESSION}" -eq 1 ]]; then
+		start_persistent_server
+	fi
+fi
+
+echo "=========================================================================================================="
+echo " SOF Testbench4 Comprehensive Topology & Module Test Suite"
+echo " Binary   : ${TB_BIN}"
+echo " Ctl Tool : ${TB_CTL_BIN}"
+echo " Topologies: ${TPLG_DIR}"
+if [[ "${SINGLE_SESSION}" -eq 1 && -n "${TB_SERVER_PID}" ]]; then
+	echo " Session  : Single Persistent sof-testbench4 -I Server (PID ${TB_SERVER_PID}, TCP port ${TB_PORT}, 0 restarts)"
+fi
+echo "=========================================================================================================="
+
+# ------------------------------------------------------------------------------
+# TIER 1: All 26 Built-In Modules & Sample Formats (S32_LE, S24_LE, S16_LE, Rates, Multi-Channel)
+# ------------------------------------------------------------------------------
+echo ""
+echo "--- Tier 1: All Built-In Audio Modules & Sample Formats (LL & Single-Module Benchmarks) ---"
+
+# 1.1 Standard S32_LE Full-Duplex (Playback + Capture: -p 1,2,3,4) Module Benchmarks
+for entry in \
+	"dcblock32:DC Blocking Filter (dcblock)" \
+	"drc32:Dynamic Range Compressor (drc)" \
+	"drc_multiband32:Multi-Band DRC (drc_multiband)" \
+	"dolby-dax32:Dolby DAX Audio Processing (dolby-dax)" \
+	"eqfir32:FIR Equalizer (eqfir)" \
+	"eqiir32:IIR Equalizer (eqiir)" \
+	"gain32:Volume / Gain (gain)" \
+	"igo_nr32:iGo Noise Reduction (igo_nr)" \
+	"level_multiplier32:Level Multiplier (level_multiplier)" \
+	"mfcc32:Mel-Frequency Cepstral Coeffs (mfcc)" \
+	"mfccmel32:MFCC Mel Filterbank (mfccmel)" \
+	"micsel32:Microphone Selector 2ch (micsel)" \
+	"rtnr32:Realtek Noise Reduction (rtnr)" \
+	"sound_dose32:Sound Dose Monitor (sound_dose)" \
+	"tdfb32:Time-Domain Fixed Beamformer (tdfb)" \
+	"template_comp32:Template Component (template_comp)"; do
+	mod="${entry%%:*}"
+	desc="${entry#*:}"
+	run_tb_case 1 "mod_${mod}" "${desc} [S32 duplex]" \
+		"${DEV_TPLG}/sof-hda-benchmark-${mod}.tplg" "1,2,3,4" \
+		2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module" \
+		-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+done
+
+# 1.2 S24_LE Full-Duplex Module Benchmarks (including Aria)
+for entry in \
+	"aria24:Aria Attenuation / Delay (aria)" \
+	"gain24:Volume / Gain (gain) [S24_LE]" \
+	"eqiir24:IIR Equalizer (eqiir) [S24_LE]" \
+	"eqfir24:FIR Equalizer (eqfir) [S24_LE]" \
+	"drc24:Dynamic Range Compressor (drc) [S24_LE]" \
+	"dcblock24:DC Blocking Filter (dcblock) [S24_LE]" \
+	"dolby-dax24:Dolby DAX Audio Processing [S24_LE]" \
+	"level_multiplier24:Level Multiplier [S24_LE]" \
+	"micsel24:Microphone Selector 2ch [S24_LE]" \
+	"drc_multiband24:Multi-Band DRC [S24_LE]" \
+	"tdfb24:Beamformer (tdfb) [S24_LE]"; do
+	mod="${entry%%:*}"
+	desc="${entry#*:}"
+	run_tb_case 1 "mod_${mod}" "${desc}" \
+		"${DEV_TPLG}/sof-hda-benchmark-${mod}.tplg" "1,2,3,4" \
+		2 "${WORK_DIR}/in_48k_2ch_s24.raw" 2 "Heap usage for module" \
+		-r 48000 -R 48000 -c 2 -n 2 -b S24_LE
+done
+
+# 1.3 S16_LE Full-Duplex Module Benchmarks
+for entry in \
+	"gain16:Volume / Gain (gain) [S16_LE]" \
+	"eqiir16:IIR Equalizer (eqiir) [S16_LE]" \
+	"eqfir16:FIR Equalizer (eqfir) [S16_LE]" \
+	"drc16:Dynamic Range Compressor (drc) [S16_LE]" \
+	"dcblock16:DC Blocking Filter (dcblock) [S16_LE]" \
+	"dolby-dax16:Dolby DAX Audio Processing [S16_LE]" \
+	"level_multiplier16:Level Multiplier [S16_LE]" \
+	"micsel16:Microphone Selector 2ch [S16_LE]" \
+	"sound_dose16:Sound Dose Monitor [S16_LE]" \
+	"drc_multiband16:Multi-Band DRC [S16_LE]" \
+	"tdfb16:Beamformer (tdfb) [S16_LE]"; do
+	mod="${entry%%:*}"
+	desc="${entry#*:}"
+	run_tb_case 1 "mod_${mod}" "${desc}" \
+		"${DEV_TPLG}/sof-hda-benchmark-${mod}.tplg" "1,2,3,4" \
+		2 "${WORK_DIR}/in_48k_2ch_s16.raw" 2 "Heap usage for module" \
+		-r 48000 -R 48000 -c 2 -n 2 -b S16_LE
+done
+
+# 1.4 Rate-Converting Modules (SRC, SRC Lite, ASRC) & Multi-Channel MicSel + Google CTC
+run_tb_case 1 "mod_src32_pb_44k1_to_48k" "Sample Rate Converter (src) PB 44.1k->48k" \
+	"${DEV_TPLG}/sof-hda-benchmark-src32.tplg" "1,2" \
+	1 "${WORK_DIR}/in_44k1_2ch_s32.raw" 1 "Heap usage for module src" \
+	-r 44100 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 1 "mod_src32_cap_48k_to_44k1" "Sample Rate Converter (src) CAP 48k->44.1k" \
+	"${DEV_TPLG}/sof-hda-benchmark-src32.tplg" "3,4" \
+	1 "${WORK_DIR}/in_48k_2ch_s32.raw" 1 "Heap usage for module src" \
+	-r 48000 -R 44100 -c 2 -n 2 -b S32_LE
+
+run_tb_case 1 "mod_src_lite32_pb_44k1_to_48k" "SRC Lite (src_lite) PB 44.1k->48k" \
+	"${DEV_TPLG}/sof-hda-benchmark-src_lite32.tplg" "1,2" \
+	1 "${WORK_DIR}/in_44k1_2ch_s32.raw" 1 "Heap usage for module src_lite.1.1" \
+	-r 44100 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 1 "mod_src_lite32_cap_48k_to_44k1" "SRC Lite (src_lite) CAP 48k->44.1k" \
+	"${DEV_TPLG}/sof-hda-benchmark-src_lite32.tplg" "3,4" \
+	1 "${WORK_DIR}/in_48k_2ch_s32.raw" 1 "Heap usage for module src_lite.3.2" \
+	-r 48000 -R 44100 -c 2 -n 2 -b S32_LE
+
+run_tb_case 1 "mod_asrc32_pb_44k1_to_48k" "Async Sample Rate Converter (asrc) PB" \
+	"${DEV_TPLG}/sof-hda-benchmark-asrc32.tplg" "1,2" \
+	1 "${WORK_DIR}/in_44k1_2ch_s32.raw" 1 "Heap usage for module asrc.1.1" \
+	-r 44100 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 1 "mod_asrc32_cap_48k_to_44k1" "Async Sample Rate Converter (asrc) CAP" \
+	"${DEV_TPLG}/sof-hda-benchmark-asrc32.tplg" "3,4" \
+	1 "${WORK_DIR}/in_48k_2ch_s32.raw" 1 "Heap usage for module asrc.3.2" \
+	-r 48000 -R 44100 -c 2 -n 2 -b S32_LE
+
+run_tb_case 1 "mod_micsel_multich32_4ch_to_2ch" "Multi-Ch Mic Selector (4ch->2ch duplex)" \
+	"${DEV_TPLG}/sof-hda-benchmark-micsel_multich32.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_4ch_s32.raw" 2 "Heap usage for module micsel" \
+	-r 48000 -R 48000 -c 4 -n 2 -b S32_LE
+
+run_tb_case 1 "mod_google_ctc_audio_processing" "Google CTC Audio Processing + Gain + Mix" \
+	"${DEV_TPLG}/sof-mtl-rt1019-rt5682-ctc.tplg" "3,4" \
+	1 "${WORK_DIR}/in_48k_2ch_s32.raw" 1 "Heap usage for module ctc.4.1" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+# ------------------------------------------------------------------------------
+# TIER 2: Simple to Complex Multi-Pipeline DAG Topologies
+# ------------------------------------------------------------------------------
+echo ""
+echo "--- Tier 2: Simple to Complex Multi-Pipeline DAG Topologies ---"
+
+run_tb_case 2 "dag_hda_passthrough_3x_hdmi" "Passthrough 3x Concurrent HDMI (6 pipelines)" \
+	"${DEV_TPLG}/sof-hda-passthrough.tplg" "50,51,60,61,70,71" \
+	3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 "Total execution time|Per-Core LL & DP Scheduler Telemetry" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 2 "dag_cascaded_3ppl_aria_gain_mix" "3-Pipeline Cascaded (aria->gain->mixin->mixout)" \
+	"${DEV_TPLG}/sof-hda-benchmark-generic.tplg" "1,2,3" \
+	1 "${WORK_DIR}/in_48k_2ch_s24.raw" 1 "Heap usage for module aria" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S24_LE
+
+run_tb_case 2 "dag_efx_mbdrc_6mod_chain" "6-Module EFX Chain (gain+eqiir+eqfir+mbdrc+tdfb+drc)" \
+	"${DEV_TPLG}/sof-hda-efx-mbdrc-generic.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module multiband_drc" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 2 "dag_fanout_1to2_crossover" "1-to-2 Fan-Out Multi-Sink 2-Way Crossover" \
+	"${DEV_TPLG}/sof-tgl-nocodec-crossover-2way.tplg" "1,101,102" \
+	1 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module crossover" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 2 "dag_fanin_2to1_google_rtcaec" "2-to-1 Fan-In Multi-Source Google RTC AEC (DP)" \
+	"${DEV_TPLG}/sof-tgl-nocodec-rtcaec.tplg" "7,8,12" \
+	2 "${WORK_DIR}/in_16k_2ch_s16.raw" 1 "Heap usage for module google-rtc-aec.7.1" \
+	-r 16000 -R 16000 -c 2 -n 2 -b S16_LE
+
+run_tb_case 2 "dag_dmic_4ch_tdfb_drc_eqiir" "4ch DMIC Capture Chain (tdfb->drc->eqiir->gain)" \
+	"${PROD_TPLG}/sof-hda-generic-4ch.tplg" "11,12" \
+	1 "${WORK_DIR}/in_48k_4ch_s32.raw" 1 "Heap usage for module tdfb.11.1" \
+	-r 48000 -R 48000 -c 4 -n 4 -b S32_LE
+
+run_tb_case 2 "dag_hda_generic_11ppl_6in_5out" "11-Pipeline Concurrent HDA (Analog+DeepBuf+Cap+3xHDMI)" \
+	"${PROD_TPLG}/sof-hda-generic.tplg" "1,2,3,4,15,50,51,60,61,70,71" \
+	6 "${WORK_DIR}/in_48k_2ch_s32.raw" 5 "Heap usage for module mixin.15.1" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+# ------------------------------------------------------------------------------
+# TIER 3: Combinations of LL and DP Modules (Single-Thread & Multi-Thread DP)
+# ------------------------------------------------------------------------------
+echo ""
+echo "--- Tier 3: Combinations of LL & DP Modules (Dedicated Per-Module DP Pthreads) ---"
+
+run_tb_case 3 "lldp_phase_vocoder_pb_single_dp" "LL Copiers + Single DP Phase Vocoder (Playback)" \
+	"${DEV_TPLG}/sof-hda-benchmark-phase_vocoder32.tplg" "1,2" \
+	1 "${WORK_DIR}/in_48k_2ch_s32.raw" 1 "Heap usage for module phase_vocoder.1.1" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 3 "lldp_phase_vocoder_duplex_2dp" "LL Copiers + 2 Concurrent DP Phase Vocoder Threads" \
+	"${DEV_TPLG}/sof-hda-benchmark-phase_vocoder32.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module phase_vocoder.3.2" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 3 "lldp_stft_192_48_duplex_2dp" "LL Copiers + 2 Concurrent DP STFT (192/48) Threads" \
+	"${DEV_TPLG}/sof-hda-benchmark-stft_process_192_48_32.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module stft_process.3.2" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 3 "lldp_stft_512_128_duplex_2dp" "LL Copiers + 2 Concurrent DP STFT (512/128) Threads" \
+	"${DEV_TPLG}/sof-hda-benchmark-stft_process_512_128_32.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module stft_process.3.2" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 3 "lldp_stft_1536_240_duplex_2dp" "LL Copiers + 2 Concurrent DP STFT (1536/240) Threads" \
+	"${DEV_TPLG}/sof-hda-benchmark-stft_process_1536_240_32.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module stft_process.3.2" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 3 "lldp_mtl_dual_dp_src_on_core0" "6-Pipeline LL (Cores 0,2) + 2 DP SRC Threads (Core 0)" \
+	"${DEV_TPLG}/sof-mtl-nocodec-dp-test.tplg" "5,6,7,8,11,12" \
+	3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 "Heap usage for module src.11.1" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+# ------------------------------------------------------------------------------
+# TIER 4: Multi-Core LL & Cross-Core DP Topologies (Cores 0, 1, 2)
+# ------------------------------------------------------------------------------
+echo ""
+echo "--- Tier 4: Multi-Core LL & Cross-Core DP Execution (DSP Cores 0, 1, 2) ---"
+
+run_tb_case 4 "mcore_ll_mtl_nocodec_cores_0_2" "Multi-Core LL Only (Core 0 Cap + Core 2 PB/Cap)" \
+	"${DEV_TPLG}/sof-mtl-nocodec.tplg" "5,6,7,8,11,12" \
+	3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 "LL worker thread created for DSP core 2|Core 2 .* LL: ticks=" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 4 "mcore_lldp_hda_src_cores_0_2" "Cross-Core HDA: Core 0 LL + Core 2 LL & DP SRC" \
+	"${DEV_TPLG}/sof-hda-src-generic-dp.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "DP thread initialized for module.*on DSP core 2|Core 2 .* DP: runs=" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 4 "mcore_lldp_mtl_3core_0_1_2" "MTL 3-Core: Core 0 LL + Core 1 Dual DP SRC + Core 2 LL" \
+	"${DEV_TPLG}/sof-mtl-nocodec-dp-core-test.tplg" "5,6,7,8,11,12" \
+	3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 "DP thread initialized for module.*on DSP core 1|Core 1 .* DP: runs=" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 4 "mcore_lldp_lnl_3core_0_1_2" "LNL 3-Core: Core 0 LL + Core 1 Dual DP SRC + Core 2 LL" \
+	"${DEV_TPLG}/sof-lnl-nocodec-dp-core-test.tplg" "5,6,7,8,11,12" \
+	3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 "DP thread initialized for module.*on DSP core 1|Core 1 .* DP: runs=" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 4 "mcore_lldp_ptl_3core_0_1_2" "PTL 3-Core: Core 0 LL + Core 1 Dual DP SRC + Core 2 LL" \
+	"${DEV_TPLG}/sof-ptl-nocodec-dp-core-test.tplg" "5,6,7,8,11,12" \
+	3 "${WORK_DIR}/in_48k_2ch_s32.raw" 3 "DP thread initialized for module.*on DSP core 1|Core 1 .* DP: runs=" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+run_tb_case 4 "mcore_ll_dolby_dax_ctc_cores_0_2" "Multi-Core Dolby DAX (Core 2) + Google CTC (Core 0)" \
+	"${DEV_TPLG}/sof-mtl-rt1019-rt5682-dax.tplg" "1,2,3,4" \
+	2 "${WORK_DIR}/in_48k_2ch_s32.raw" 2 "Heap usage for module dolby-dax.2.1" \
+	-r 48000 -R 48000 -c 2 -n 2 -b S32_LE
+
+# ------------------------------------------------------------------------------
+# TIER 5: Runtime Control Scripts & Live Remote TCP Network Control
+# ------------------------------------------------------------------------------
+echo ""
+echo "--- Tier 5: Runtime Control Scripts (-s) & Live SOFR TCP Remote Control (-S/-W) ---"
+run_tier5_tests
+
+if [[ "${LIST_ONLY}" -eq 1 ]]; then
+	exit 0
+fi
+
+if [[ "${SINGLE_SESSION}" -eq 1 && -n "${TB_SERVER_PID}" ]]; then
+	if ! kill -0 "${TB_SERVER_PID}" 2>/dev/null; then
+		echo "ERROR: persistent sof-testbench4 server (PID ${TB_SERVER_PID}) died before suite completion!" >&2
+		TOTAL_FAIL=$((TOTAL_FAIL + 1))
+	fi
+fi
+
+echo ""
+echo "=========================================================================================================="
+echo " Test Suite Summary by Tier"
+echo "----------------------------------------------------------------------------------------------------------"
+printf "  Tier 1 (All 26 Modules & S16/S24/S32/Rates/4ch) : %2d / %2d passed\n" "${TIER_PASS[1]}" "${TIER_TOTAL[1]}"
+printf "  Tier 2 (Complex Multi-Pipeline DAG Topologies)  : %2d / %2d passed\n" "${TIER_PASS[2]}" "${TIER_TOTAL[2]}"
+printf "  Tier 3 (LL + DP & Multi-Thread DP Combinations) : %2d / %2d passed\n" "${TIER_PASS[3]}" "${TIER_TOTAL[3]}"
+printf "  Tier 4 (Multi-Core LL & Cross-Core DP 0/1/2)    : %2d / %2d passed\n" "${TIER_PASS[4]}" "${TIER_TOTAL[4]}"
+printf "  Tier 5 (Runtime Controls & Remote TCP Server)   : %2d / %2d passed\n" "${TIER_PASS[5]}" "${TIER_TOTAL[5]}"
+echo "----------------------------------------------------------------------------------------------------------"
+if [[ "${SINGLE_SESSION}" -eq 1 && -n "${TB_SERVER_PID}" ]]; then
+	printf "  Session Mode                                    : 1 persistent sof-testbench4 process (PID %s, 0 restarts)\n" "${TB_SERVER_PID}"
+fi
+printf "  TOTAL                                           : %2d / %2d passed (%d failed)\n" \
+	"${TOTAL_PASS}" "${TOTAL_RUN}" "${TOTAL_FAIL}"
+echo "=========================================================================================================="
+
+if [[ "${TOTAL_FAIL}" -gt 0 ]]; then
+	echo "Failed tests: ${FAILED_TESTS[*]}" >&2
+	exit 1
+fi
+exit 0
diff --git a/tools/testbench/tb_ctl.c b/tools/testbench/tb_ctl.c
new file mode 100644
index 000000000000..f0257876752f
--- /dev/null
+++ b/tools/testbench/tb_ctl.c
@@ -0,0 +1,1457 @@
+// SPDX-License-Identifier: BSD-3-Clause
+//
+// Copyright(c) 2026 Intel Corporation. All rights reserved.
+//
+// sof-tb-ctl: Command-Line & Interactive Network Control Tool for SOF Testbench4
+// Supports all SOFR v1 binary opcodes (0x0000 - 0x0076), dynamic IPC4 pipeline
+// and module construction, topology load/unload/run-test, scheduler & buffer
+// telemetry, workload simulation, and persistent interactive REPL / batch scripts.
+
+#include <arpa/inet.h>
+#include <ctype.h>
+#include <errno.h>
+#include <netdb.h>
+#include <netinet/in.h>
+#include <netinet/tcp.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/socket.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "testbench/sof_remote_proto.h"
+
+static uint32_t g_req_seq = 1;
+
+static int read_exact(int fd, void *buf, size_t len)
+{
+	uint8_t *p = (uint8_t *)buf;
+	size_t rem = len;
+
+	while (rem > 0) {
+		ssize_t n = recv(fd, p, rem, 0);
+
+		if (n <= 0) {
+			if (n < 0 && errno == EINTR)
+				continue;
+			return -1;
+		}
+		p += n;
+		rem -= (size_t)n;
+	}
+	return 0;
+}
+
+static int write_exact(int fd, const void *buf, size_t len)
+{
+	const uint8_t *p = (const uint8_t *)buf;
+	size_t rem = len;
+
+	while (rem > 0) {
+		ssize_t n = send(fd, p, rem, MSG_NOSIGNAL);
+
+		if (n <= 0) {
+			if (n < 0 && errno == EINTR)
+				continue;
+			return -1;
+		}
+		p += n;
+		rem -= (size_t)n;
+	}
+	return 0;
+}
+
+static int connect_server(const char *host, int port)
+{
+	struct addrinfo hints, *res = NULL, *rp;
+	char port_str[16];
+	int sock = -1;
+	int one = 1;
+
+	memset(&hints, 0, sizeof(hints));
+	hints.ai_family = AF_INET;
+	hints.ai_socktype = SOCK_STREAM;
+	snprintf(port_str, sizeof(port_str), "%d", port);
+
+	if (getaddrinfo(host, port_str, &hints, &res) != 0)
+		return -1;
+
+	for (rp = res; rp != NULL; rp = rp->ai_next) {
+		sock = socket(rp->ai_family, rp->ai_socktype, rp->ai_protocol);
+		if (sock < 0)
+			continue;
+		if (connect(sock, rp->ai_addr, rp->ai_addrlen) == 0)
+			break;
+		close(sock);
+		sock = -1;
+	}
+	freeaddrinfo(res);
+
+	if (sock >= 0)
+		setsockopt(sock, IPPROTO_TCP, TCP_NODELAY, &one, sizeof(one));
+	return sock;
+}
+
+static int rpc_call(int sock, uint16_t opcode, const void *req_payload, uint32_t req_len,
+		    struct sof_net_hdr *rsp_hdr_out, uint8_t **rsp_payload_out)
+{
+	struct sof_net_hdr req_hdr = {
+		.magic       = SOF_NET_MAGIC,
+		.version     = SOF_NET_VERSION,
+		.opcode      = opcode,
+		.req_id      = g_req_seq++,
+		.payload_len = req_payload ? req_len : 0,
+		.status      = 0,
+	};
+	struct sof_net_hdr rsp_hdr;
+	uint8_t *buf = NULL;
+
+	if (rsp_payload_out)
+		*rsp_payload_out = NULL;
+
+	if (write_exact(sock, &req_hdr, sizeof(req_hdr)) < 0)
+		return -EIO;
+	if (req_payload && req_len > 0) {
+		if (write_exact(sock, req_payload, req_len) < 0)
+			return -EIO;
+	}
+
+	if (read_exact(sock, &rsp_hdr, sizeof(rsp_hdr)) < 0)
+		return -EIO;
+	if (rsp_hdr.magic != SOF_NET_MAGIC)
+		return -EPROTO;
+
+	if (rsp_hdr.payload_len > 0) {
+		buf = calloc(1, rsp_hdr.payload_len + 1);
+		if (!buf)
+			return -ENOMEM;
+		if (read_exact(sock, buf, rsp_hdr.payload_len) < 0) {
+			free(buf);
+			return -EIO;
+		}
+		buf[rsp_hdr.payload_len] = '\0';
+	}
+
+	if (rsp_hdr_out)
+		*rsp_hdr_out = rsp_hdr;
+	if (rsp_payload_out)
+		*rsp_payload_out = buf;
+	else
+		free(buf);
+
+	return rsp_hdr.status;
+}
+
+static uint8_t *load_file_or_hex(const char *arg, uint32_t *len_out)
+{
+	FILE *fp = fopen(arg, "rb");
+
+	*len_out = 0;
+	if (fp) {
+		long sz;
+		uint8_t *buf;
+
+		fseek(fp, 0, SEEK_END);
+		sz = ftell(fp);
+		fseek(fp, 0, SEEK_SET);
+		if (sz <= 0) {
+			fclose(fp);
+			return NULL;
+		}
+		buf = malloc((size_t)sz);
+		if (!buf) {
+			fclose(fp);
+			return NULL;
+		}
+		if (fread(buf, 1, (size_t)sz, fp) != (size_t)sz) {
+			free(buf);
+			fclose(fp);
+			return NULL;
+		}
+		fclose(fp);
+		*len_out = (uint32_t)sz;
+		return buf;
+	}
+
+	/* Parse hex string (with or without 0x/colons/spaces) */
+	size_t slen = strlen(arg);
+	uint8_t *buf = malloc(slen / 2 + 4);
+	uint32_t idx = 0;
+	const char *p = arg;
+
+	if (!buf)
+		return NULL;
+	if (p[0] == '0' && (p[1] == 'x' || p[1] == 'X'))
+		p += 2;
+	while (*p) {
+		while (*p && !isxdigit((unsigned char)*p))
+			p++;
+		if (!*p)
+			break;
+		char h[3] = { p[0], p[1] ? p[1] : '0', '\0' };
+
+		buf[idx++] = (uint8_t)strtoul(h, NULL, 16);
+		p += p[1] ? 2 : 1;
+	}
+	*len_out = idx;
+	return buf;
+}
+
+static void hexdump(const uint8_t *data, uint32_t len, uint32_t base_off)
+{
+	uint32_t i, j;
+
+	for (i = 0; i < len; i += 16) {
+		printf("  %06x: ", base_off + i);
+		for (j = 0; j < 16; j++) {
+			if (i + j < len)
+				printf("%02x ", data[i + j]);
+			else
+				printf("   ");
+		}
+		printf(" |");
+		for (j = 0; j < 16 && i + j < len; j++) {
+			uint8_t c = data[i + j];
+
+			printf("%c", (c >= 32 && c < 127) ? c : '.');
+		}
+		printf("|\n");
+	}
+}
+
+static int exec_shell_cmd(int sock, const char *cmd_str, bool check_err_lines)
+{
+	struct sof_net_hdr rhdr;
+	uint8_t *rbuf = NULL;
+	uint32_t clen = (uint32_t)strlen(cmd_str) + 1;
+	uint32_t req_len = sizeof(struct sof_net_shell_req) + clen;
+	uint8_t *req_buf = calloc(1, req_len);
+	struct sof_net_shell_req *sreq;
+	int st;
+	int ret = 0;
+
+	if (!req_buf)
+		return -ENOMEM;
+	sreq = (struct sof_net_shell_req *)req_buf;
+	sreq->timeout_ms = 30000;
+	sreq->cmd_len = clen;
+	memcpy(req_buf + sizeof(*sreq), cmd_str, clen);
+
+	st = rpc_call(sock, SOF_NET_OP_SHELL_EXEC, req_buf, req_len, &rhdr, &rbuf);
+	free(req_buf);
+
+	if (st < 0) {
+		fprintf(stderr, "error: shell RPC failed (%d)\n", st);
+		free(rbuf);
+		return st;
+	}
+	if (rbuf && rhdr.payload_len > 0) {
+		printf("%s", (char *)rbuf);
+		if (((char *)rbuf)[rhdr.payload_len - 1] != '\n')
+			printf("\n");
+		if (check_err_lines) {
+			if (strncmp((char *)rbuf, "error:", 6) == 0 ||
+			    strstr((char *)rbuf, "\nerror:") != NULL)
+				ret = 1;
+		}
+	}
+	free(rbuf);
+	return ret;
+}
+
+static int exec_joined_shell_cmd(int sock, const char *prefix, int argc, char **argv,
+				 bool check_err_lines)
+{
+	char cmd_buf[8192];
+	size_t off = 0;
+	int i;
+
+	if (prefix && *prefix)
+		off += snprintf(cmd_buf + off, sizeof(cmd_buf) - off, "%s", prefix);
+
+	for (i = 0; i < argc && off + 256 < sizeof(cmd_buf); i++) {
+		bool has_space = strchr(argv[i], ' ') != NULL || strchr(argv[i], '\t') != NULL;
+		bool prev_is_flag = (i > 0 && argv[i - 1][0] == '-');
+
+		if (off > 0)
+			off += snprintf(cmd_buf + off, sizeof(cmd_buf) - off, " ");
+		if (has_space && prev_is_flag && argv[i][0] != '"' && argv[i][0] != '\'')
+			off += snprintf(cmd_buf + off, sizeof(cmd_buf) - off, "\"%s\"", argv[i]);
+		else
+			off += snprintf(cmd_buf + off, sizeof(cmd_buf) - off, "%s", argv[i]);
+	}
+	return exec_shell_cmd(sock, cmd_buf, check_err_lines);
+}
+
+static void print_usage(const char *prog)
+{
+	printf("Usage: %s [-H <host>] [-p <port>] [-f <script_file>] [command [args...]]\n\n"
+	       "Options:\n"
+	       "  -H <host>     Target testbench IP address (default: 127.0.0.1)\n"
+	       "  -p <port>     Target testbench TCP port (default: 9998)\n"
+	       "  -f <file>     Execute batch commands from <file> over 1 connection\n"
+	       "  -h, --help    Show this help message\n\n"
+	       "Core & Device Opcodes:\n"
+	       "  ping                                          Ping server (SOF_NET_OP_PING)\n"
+	       "  info                                          Get device & FW info (SOF_NET_OP_GET_INFO)\n"
+	       "  pm [query|wake|release|boot|core-get|core-put] [core] PM control (SOF_NET_OP_PM_CTL)\n"
+	       "  core <get|put|enable|disable> <core_id>       Enable/disable DSP core\n"
+	       "  win-info                                      List SRAM windows & debug slots\n"
+	       "  win-read <win_id> <offset> <size> [slot_type] Read SRAM window bytes\n"
+	       "  win-write <win_id> <offset> <hex_or_file>     Write SRAM window bytes\n"
+	       "  winstream [cmd_text]                          Exchange Zephyr winstream shell I/O\n\n"
+	       "IPC4, Large Config & Dynamic Module Loading:\n"
+	       "  ipc-tx <prim_hex> <ext_hex> [data_hex|file] [rx_sz] Send raw IPC4 message\n"
+	       "  large-cfg-get <mod> <inst> <param> [sz] [out_file]  Get IPC4 large config\n"
+	       "  large-cfg-set <mod> <inst> <param> <hex_or_file>    Set IPC4 large config\n"
+	       "  llext-load <file.llext|.so> [lib_id] [name]   Load dynamic module (SOF_NET_OP_LLEXT_LOAD)\n\n"
+	       "Interactive Topology, Pipeline, Platform & Module Construction:\n"
+	       "  platform-cfg [status | presets | preset <name> | cores <N> |\n"
+	       "                mem <hpsram[,lpsram[,dram]]> | freq <mhz_or_hz | core:freq,...>]\n"
+	       "                                                Configure/query platform hardware specs\n"
+	       "  run-test -t <tplg> [-A <plat>] [-N <cores>] [-m <mem>] [-F <freq>] [-p <pipes>]\n"
+	       "           [-i <in>] [-o <out>] [-r <rate>] [-R <rate>] [-c <ch>] [-n <ch>]\n"
+	       "           [-b <fmt>] [-s <ctl>] [-w <m>] [-M <m>]\n"
+	       "                                                Run full topology test in persistent server\n"
+	       "  io-cfg [-i <in>] [-o <out>] [-r <rate>] [-R <rate>] [-c <ch>] [-n <ch>] [-b <fmt>]\n"
+	       "  tplg-load <file.tplg> [p1,p2,...]             Load topology and start pipelines\n"
+	       "  tplg-unload                                   Reset and unload active topology\n"
+	       "  pipelines | widgets | modules | controls      Inspect active pipelines, widgets & kctls\n"
+	       "  ppl-create <id> [prio] [core]                 Create IPC4 pipeline\n"
+	       "  ppl-state <id> <run|pause|reset>              Set IPC4 pipeline state\n"
+	       "  ppl-delete <id>                               Delete IPC4 pipeline\n"
+	       "  mod-init <mod> <inst> <ppl> [core] [dom]      Initialize IPC4 module instance\n"
+	       "  mod-bind <sm> <si> <sq> <dm> <di> <dq>        Bind source module queue to destination\n"
+	       "  mod-unbind <sm> <si> <sq> <dm> <di> <dq>      Unbind module instances\n"
+	       "  mod-delete <mod_id> <inst_id>                 Delete module instance\n\n"
+	       "Telemetry, Workload Simulation, Probes & Audio Control:\n"
+	       "  telem [mask_hex]                              Get composite telemetry snapshot\n"
+	       "  sched-telem | sched-telem-reset               Show/reset per-core/pipe/module telemetry\n"
+	       "  sched-trace [N] [--core C] [--pipe P] [--comp ID] [--domain ll|dp|sync] [--json F] [--clear]\n"
+	       "                                                Get per-iteration LL/DP module scheduling timeline\n"
+	       "  mod-buffers [id_or_name]                      Show module entry/exit buffer levels & taps\n"
+	       "  stats | heap                                  Show file I/O stats and module heap usage\n"
+	       "  workload-sim [get | set <off|virtual|realtime> [sram|dram] [factor] [cyc_word] |\n"
+	       "                freq <spec> | mem <sram|dram> [factor] [cyc] | mod <id> <cpc> [mem] | reset]\n"
+	       "  probes [avail | active | extract [comp_id] [out.raw]]\n"
+	       "  pcm [status | start-tone [dev] [freq] [rate] [ch] | stop-tone |\n"
+	       "       play <file.raw> [dev] [rate] [ch] | capture <ms> [out.raw]]\n"
+	       "  compr <status|caps|play|pause|resume|stop> [card] [dev] [file]\n"
+	       "  cards | pcm-caps [card] [dev] | dapm [out.dot]\n"
+	       "  kctl <list | get <id_or_name> | set <id_or_name> <v0> [v1...] | set-bytes <id> <file>>\n"
+	       "  pause | resume | step [N] | loglevel <0..4> | quit\n"
+	       "  shell <cmd...> | repl                         Execute shell command or start REPL\n",
+	       prog);
+}
+
+static int dispatch_command(int sock, int argc, char **argv)
+{
+	struct sof_net_hdr rhdr;
+	uint8_t *rbuf = NULL;
+	const char *cmd;
+	int st;
+
+	if (argc <= 0 || !argv[0])
+		return 0;
+	cmd = argv[0];
+
+	if (strcmp(cmd, "help") == 0 || strcmp(cmd, "-h") == 0 || strcmp(cmd, "--help") == 0) {
+		print_usage("sof-tb-ctl");
+		return 0;
+	}
+
+	if (strcmp(cmd, "ping") == 0) {
+		st = rpc_call(sock, SOF_NET_OP_PING, NULL, 0, &rhdr, &rbuf);
+		if (st == 0 && rbuf)
+			printf("PING -> %s (req_id=%u, status=%d)\n",
+			       (char *)rbuf, rhdr.req_id, rhdr.status);
+		else
+			fprintf(stderr, "error: PING failed (%d)\n", st);
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "info") == 0) {
+		st = rpc_call(sock, SOF_NET_OP_GET_INFO, NULL, 0, &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_cdev_info)) {
+			const struct sof_cdev_info *inf = (const struct sof_cdev_info *)rbuf;
+
+			printf("=== SOF Device & Firmware Info ===\n"
+			       "  Platform:       %s (IPC%u, HW IP v%u)\n"
+			       "  FW Version:     v%u.%u.%u.%u (state=%u)\n"
+			       "  Topology/FW:    %s\n"
+			       "  Power State:    %s (pm_runtime=%u)\n"
+			       "  DSP Cores:      %u total, enabled_mask=0x%x\n"
+			       "  Max IPC Size:   %u bytes\n",
+			       inf->platform, inf->ipc_type == 1 ? 4 : 3, inf->hw_ip_version,
+			       inf->fw_ver_major, inf->fw_ver_minor,
+			       inf->fw_ver_micro, inf->fw_ver_build, inf->fw_state,
+			       inf->fw_filename[0] ? inf->fw_filename : "(none)",
+			       inf->dsp_power_state == 1 ? "D0 (ACTIVE)" : "D3 (SUSPENDED)",
+			       inf->pm_runtime_active,
+			       inf->num_cores, inf->enabled_cores_mask,
+			       inf->max_payload_size);
+		} else {
+			fprintf(stderr, "error: GET_INFO failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "pm") == 0 || strcmp(cmd, "core") == 0) {
+		struct sof_cdev_pm_ctl req = {0};
+		const char *sub = (argc > 1) ? argv[1] : "query";
+
+		if (strcmp(cmd, "core") == 0) {
+			if (strcmp(sub, "get") == 0 || strcmp(sub, "enable") == 0)
+				req.op = SOF_PM_OP_CORE_GET;
+			else if (strcmp(sub, "put") == 0 || strcmp(sub, "disable") == 0)
+				req.op = SOF_PM_OP_CORE_PUT;
+			else
+				req.op = SOF_PM_OP_QUERY;
+			req.core_id = (argc > 2) ? (uint32_t)atoi(argv[2]) : 0;
+		} else {
+			if (strcmp(sub, "wake") == 0)
+				req.op = SOF_PM_OP_WAKE_HOLD;
+			else if (strcmp(sub, "release") == 0)
+				req.op = SOF_PM_OP_RELEASE_HOLD;
+			else if (strcmp(sub, "boot") == 0)
+				req.op = SOF_PM_OP_BOOT_DSP;
+			else if (strcmp(sub, "core-get") == 0)
+				req.op = SOF_PM_OP_CORE_GET;
+			else if (strcmp(sub, "core-put") == 0)
+				req.op = SOF_PM_OP_CORE_PUT;
+			else
+				req.op = SOF_PM_OP_QUERY;
+			req.core_id = (argc > 2) ? (uint32_t)atoi(argv[2]) : 0;
+		}
+
+		st = rpc_call(sock, SOF_NET_OP_PM_CTL, &req, sizeof(req), &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(req)) {
+			const struct sof_cdev_pm_ctl *rsp = (const struct sof_cdev_pm_ctl *)rbuf;
+
+			printf("PM_CTL(op=%u, core=%u) -> fw_state=%u power=%s cores_mask=0x%x d0_hold=%u\n",
+			       rsp->op, rsp->core_id, rsp->fw_state,
+			       rsp->dsp_power_state == 1 ? "D0" : "D3",
+			       rsp->enabled_cores_mask, rsp->fd_holding_d0);
+		} else {
+			fprintf(stderr, "error: PM_CTL failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "ipc-tx") == 0) {
+		if (argc < 3) {
+			fprintf(stderr, "Usage: ipc-tx <primary_hex> <extension_hex> [payload_hex_or_file] [rx_size]\n");
+			return 1;
+		}
+		struct sof_net_ipc_tx_req ireq = {0};
+		uint8_t *tx_data = NULL;
+		uint32_t tx_len = 0;
+
+		ireq.primary = (uint32_t)strtoul(argv[1], NULL, 0);
+		ireq.extension = (uint32_t)strtoul(argv[2], NULL, 0);
+		if (argc > 3 && strcmp(argv[3], "-") != 0 && strcmp(argv[3], "0") != 0)
+			tx_data = load_file_or_hex(argv[3], &tx_len);
+		ireq.tx_size = tx_len;
+		ireq.rx_size = (argc > 4) ? (uint32_t)strtoul(argv[4], NULL, 0) : 0;
+
+		uint8_t *req_buf = calloc(1, sizeof(ireq) + tx_len);
+
+		if (!req_buf) {
+			free(tx_data);
+			return 1;
+		}
+		memcpy(req_buf, &ireq, sizeof(ireq));
+		if (tx_data && tx_len > 0)
+			memcpy(req_buf + sizeof(ireq), tx_data, tx_len);
+		free(tx_data);
+
+		st = rpc_call(sock, SOF_NET_OP_IPC_TX, req_buf, sizeof(ireq) + tx_len, &rhdr, &rbuf);
+		free(req_buf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_ipc_tx_rsp)) {
+			const struct sof_net_ipc_tx_rsp *rsp = (const struct sof_net_ipc_tx_rsp *)rbuf;
+
+			printf("IPC_TX -> reply_primary=0x%08x reply_ext=0x%08x ipc_status=%d rx_size=%u\n",
+			       rsp->reply_primary, rsp->reply_extension, rsp->ipc_status, rsp->rx_size);
+			if (rsp->rx_size > 0 && rhdr.payload_len >= sizeof(*rsp) + rsp->rx_size)
+				hexdump(rbuf + sizeof(*rsp), rsp->rx_size, 0);
+		} else {
+			fprintf(stderr, "error: IPC_TX failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "large-cfg-get") == 0) {
+		if (argc < 4) {
+			fprintf(stderr, "Usage: large-cfg-get <mod_id> <inst_id> <param_id> [max_size] [out_file]\n");
+			return 1;
+		}
+		struct sof_net_large_cfg_req lreq = {
+			.module_id   = (uint32_t)strtoul(argv[1], NULL, 0),
+			.instance_id = (uint32_t)strtoul(argv[2], NULL, 0),
+			.param_id    = (uint32_t)strtoul(argv[3], NULL, 0),
+			.set_get     = SOF_CDEV_LARGE_CFG_GET,
+			.data_size   = (argc > 4) ? (uint32_t)strtoul(argv[4], NULL, 0) : 4096,
+			.flags       = 0,
+		};
+		st = rpc_call(sock, SOF_NET_OP_IPC_LARGE_CFG, &lreq, sizeof(lreq), &rhdr, &rbuf);
+		if (st == 0) {
+			printf("LARGE_CFG_GET(mod=0x%x, inst=%u, param=%u) -> %u bytes\n",
+			       lreq.module_id, lreq.instance_id, lreq.param_id, rhdr.payload_len);
+			if (argc > 5 && rbuf && rhdr.payload_len > 0) {
+				FILE *fp = fopen(argv[5], "wb");
+
+				if (fp) {
+					fwrite(rbuf, 1, rhdr.payload_len, fp);
+					fclose(fp);
+					printf("Saved %u bytes to %s\n", rhdr.payload_len, argv[5]);
+				}
+			} else if (rbuf && rhdr.payload_len > 0) {
+				hexdump(rbuf, rhdr.payload_len < 256 ? rhdr.payload_len : 256, 0);
+			}
+		} else {
+			fprintf(stderr, "error: LARGE_CFG_GET failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "large-cfg-set") == 0) {
+		if (argc < 5) {
+			fprintf(stderr, "Usage: large-cfg-set <mod_id> <inst_id> <param_id> <hex_or_file>\n");
+			return 1;
+		}
+		uint32_t dlen = 0;
+		uint8_t *dbytes = load_file_or_hex(argv[4], &dlen);
+
+		if (!dbytes || dlen == 0) {
+			fprintf(stderr, "error: invalid payload '%s'\n", argv[4]);
+			free(dbytes);
+			return 1;
+		}
+		struct sof_net_large_cfg_req lreq = {
+			.module_id   = (uint32_t)strtoul(argv[1], NULL, 0),
+			.instance_id = (uint32_t)strtoul(argv[2], NULL, 0),
+			.param_id    = (uint32_t)strtoul(argv[3], NULL, 0),
+			.set_get     = SOF_CDEV_LARGE_CFG_SET,
+			.data_size   = dlen,
+			.flags       = 0,
+		};
+		uint8_t *req_buf = calloc(1, sizeof(lreq) + dlen);
+
+		memcpy(req_buf, &lreq, sizeof(lreq));
+		memcpy(req_buf + sizeof(lreq), dbytes, dlen);
+		free(dbytes);
+
+		st = rpc_call(sock, SOF_NET_OP_IPC_LARGE_CFG, req_buf, sizeof(lreq) + dlen, &rhdr, &rbuf);
+		free(req_buf);
+		free(rbuf);
+		if (st == 0)
+			printf("LARGE_CFG_SET(mod=0x%x, inst=%u, param=%u, size=%u) -> OK\n",
+			       lreq.module_id, lreq.instance_id, lreq.param_id, dlen);
+		else
+			fprintf(stderr, "error: LARGE_CFG_SET failed (%d)\n", st);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "win-info") == 0) {
+		st = rpc_call(sock, SOF_NET_OP_WIN_INFO, NULL, 0, &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_cdev_win_info)) {
+			const struct sof_cdev_win_info *wi = (const struct sof_cdev_win_info *)rbuf;
+			int i;
+
+			printf("=== Emulated DSP SRAM Windows ===\n");
+			for (i = 0; i < SOF_CDEV_MAX_WINDOWS; i++) {
+				if (!wi->windows[i].size)
+					continue;
+				printf("  [Window %u] bar_offset=0x%06x size=%6u flags=0x%x\n",
+				       wi->windows[i].win_id, wi->windows[i].bar_offset,
+				       wi->windows[i].size, wi->windows[i].flags);
+			}
+			printf("=== Window 2 Debug Slots ===\n");
+			for (i = 0; i < SOF_CDEV_MAX_DEBUG_SLOTS; i++) {
+				if (!wi->debug_slots[i].type)
+					continue;
+				printf("  [Slot %2d] res_id=0x%08x type=0x%08x vma=0x%08x off=0x%05x size=%u\n",
+				       wi->debug_slots[i].slot_index, wi->debug_slots[i].res_id,
+				       wi->debug_slots[i].type, wi->debug_slots[i].vma,
+				       wi->debug_slots[i].win_offset, wi->debug_slots[i].size);
+			}
+		} else {
+			fprintf(stderr, "error: WIN_INFO failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "win-read") == 0) {
+		if (argc < 4) {
+			fprintf(stderr, "Usage: win-read <win_id> <offset> <size> [slot_type]\n");
+			return 1;
+		}
+		struct sof_net_win_io_req wreq = {
+			.win_id     = (uint32_t)strtoul(argv[1], NULL, 0),
+			.offset     = (uint32_t)strtoul(argv[2], NULL, 0),
+			.size       = (uint32_t)strtoul(argv[3], NULL, 0),
+			.slot_type  = (argc > 4) ? (uint32_t)strtoul(argv[4], NULL, 0) : 0,
+			.slot_index = 0,
+			.flags      = 0,
+		};
+		st = rpc_call(sock, SOF_NET_OP_WIN_READ, &wreq, sizeof(wreq), &rhdr, &rbuf);
+		if (st == 0 && rbuf) {
+			printf("WIN_READ(win=%u, off=0x%x, size=%u):\n",
+			       wreq.win_id, wreq.offset, rhdr.payload_len);
+			hexdump(rbuf, rhdr.payload_len, wreq.offset);
+		} else {
+			fprintf(stderr, "error: WIN_READ failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "win-write") == 0) {
+		if (argc < 4) {
+			fprintf(stderr, "Usage: win-write <win_id> <offset> <hex_or_file>\n");
+			return 1;
+		}
+		uint32_t dlen = 0;
+		uint8_t *dbytes = load_file_or_hex(argv[3], &dlen);
+
+		if (!dbytes || dlen == 0) {
+			free(dbytes);
+			return 1;
+		}
+		struct sof_net_win_io_req wreq = {
+			.win_id = (uint32_t)strtoul(argv[1], NULL, 0),
+			.offset = (uint32_t)strtoul(argv[2], NULL, 0),
+			.size   = dlen,
+		};
+		uint8_t *req_buf = calloc(1, sizeof(wreq) + dlen);
+
+		memcpy(req_buf, &wreq, sizeof(wreq));
+		memcpy(req_buf + sizeof(wreq), dbytes, dlen);
+		free(dbytes);
+		st = rpc_call(sock, SOF_NET_OP_WIN_WRITE, req_buf, sizeof(wreq) + dlen, &rhdr, &rbuf);
+		free(req_buf);
+		free(rbuf);
+		if (st == 0)
+			printf("WIN_WRITE(win=%u, off=0x%x, size=%u) -> OK\n",
+			       wreq.win_id, wreq.offset, dlen);
+		else
+			fprintf(stderr, "error: WIN_WRITE failed (%d)\n", st);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "winstream") == 0) {
+		const char *tx_cmd = (argc > 1) ? argv[1] : "version";
+		uint32_t tx_len = (uint32_t)strlen(tx_cmd);
+		struct sof_net_winstream_req wsreq = {
+			.slot_type   = SOF_CDEV_SLOT_SHELL,
+			.rx_win_size = 4096,
+			.tx_len      = tx_len,
+			.rx_buf_len  = 4096,
+			.seq_in      = 0,
+		};
+		uint8_t *req_buf = calloc(1, sizeof(wsreq) + tx_len);
+
+		memcpy(req_buf, &wsreq, sizeof(wsreq));
+		memcpy(req_buf + sizeof(wsreq), tx_cmd, tx_len);
+		st = rpc_call(sock, SOF_NET_OP_WINSTREAM_IO, req_buf, sizeof(wsreq) + tx_len, &rhdr, &rbuf);
+		free(req_buf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_winstream_rsp)) {
+			const struct sof_net_winstream_rsp *wsrsp =
+				(const struct sof_net_winstream_rsp *)rbuf;
+
+			printf("%.*s\n", (int)wsrsp->rx_bytes_read,
+			       (const char *)(rbuf + sizeof(*wsrsp)));
+		} else {
+			fprintf(stderr, "error: WINSTREAM_IO failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "telem") == 0) {
+		struct sof_net_telem_req treq = {
+			.query_mask = (argc > 1) ? (uint32_t)strtoul(argv[1], NULL, 0) : 0x7FU,
+			.flags      = 0,
+		};
+		st = rpc_call(sock, SOF_NET_OP_TELEM_SNAPSHOT, &treq, sizeof(treq), &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_telem_snapshot)) {
+			const struct sof_net_telem_snapshot *sn =
+				(const struct sof_net_telem_snapshot *)rbuf;
+			const uint32_t *r32 = (const uint32_t *)sn->fw_regs;
+
+			printf("=== SOF Composite Telemetry Snapshot ===\n"
+			       "  Platform:       %s (Topology: %s)\n"
+			       "  Flags Present:  0x%02x, Active PCM Streams: %u\n"
+			       "  FW Regs:        fw_status=0x%08x fps=0x%08x ticks=%u\n"
+			       "  TLV Sizes:      mem=%uB pwr=%uB ext_perf=%uB modules=%uB\n",
+			       sn->dev_info.platform,
+			       sn->dev_info.fw_filename[0] ? sn->dev_info.fw_filename : "(none)",
+			       sn->flags_present, sn->active_pcm_streams,
+			       r32[0], r32[2], r32[4],
+			       sn->mem_state_len, sn->pwr_state_len,
+			       sn->ext_perf_len, sn->modules_info_len);
+		} else {
+			fprintf(stderr, "error: TELEM_SNAPSHOT failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "sched-trace") == 0) {
+		struct sof_net_sched_trace_req sreq = {
+			.op             = SOF_SCHED_TRACE_OP_READ,
+			.max_events     = 128,
+			.filter_core_id = 0xFFFFFFFFU,
+			.filter_pipe_id = 0xFFFFFFFFU,
+			.filter_comp_id = 0xFFFFFFFFU,
+			.filter_domain  = 0xFFFFFFFFU,
+		};
+		const char *json_file = NULL;
+		int i;
+
+		for (i = 1; i < argc; i++) {
+			if (strcmp(argv[i], "clear") == 0 || strcmp(argv[i], "--clear") == 0) {
+				sreq.op = SOF_SCHED_TRACE_OP_CLEAR;
+			} else if ((strcmp(argv[i], "--core") == 0 || strcmp(argv[i], "-c") == 0) &&
+				   i + 1 < argc) {
+				sreq.filter_core_id = (uint32_t)strtoul(argv[++i], NULL, 0);
+			} else if ((strcmp(argv[i], "--pipe") == 0 || strcmp(argv[i], "-p") == 0) &&
+				   i + 1 < argc) {
+				sreq.filter_pipe_id = (uint32_t)strtoul(argv[++i], NULL, 0);
+			} else if ((strcmp(argv[i], "--comp") == 0 || strcmp(argv[i], "-m") == 0) &&
+				   i + 1 < argc) {
+				sreq.filter_comp_id = (uint32_t)strtoul(argv[++i], NULL, 0);
+			} else if ((strcmp(argv[i], "--domain") == 0 || strcmp(argv[i], "-d") == 0) &&
+				   i + 1 < argc) {
+				const char *d = argv[++i];
+
+				if (strcasecmp(d, "ll") == 0 || strcasecmp(d, "ll-copy") == 0 ||
+				    strcmp(d, "0") == 0)
+					sreq.filter_domain = 0;
+				else if (strcasecmp(d, "sync") == 0 ||
+					 strcasecmp(d, "dp-sync") == 0 || strcmp(d, "1") == 0)
+					sreq.filter_domain = 1;
+				else if (strcasecmp(d, "dp") == 0 || strcasecmp(d, "dp-run") == 0 ||
+					 strcmp(d, "2") == 0)
+					sreq.filter_domain = 2;
+			} else if ((strcmp(argv[i], "--json") == 0 || strcmp(argv[i], "-j") == 0) &&
+				   i + 1 < argc) {
+				json_file = argv[++i];
+			} else if (isdigit((unsigned char)argv[i][0])) {
+				sreq.max_events = (uint32_t)strtoul(argv[i], NULL, 0);
+			}
+		}
+
+		st = rpc_call(sock, SOF_NET_OP_SCHED_TRACE, &sreq, sizeof(sreq), &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_sched_trace_hdr)) {
+			const struct sof_net_sched_trace_hdr *thdr =
+				(const struct sof_net_sched_trace_hdr *)rbuf;
+			const struct sof_net_sched_trace_entry *entries =
+				(const struct sof_net_sched_trace_entry *)(rbuf + sizeof(*thdr));
+			const char *mode_str = (thdr->sim_mode == 2) ? "REALTIME-PACED" :
+					       (thdr->sim_mode == 1) ? "VIRTUAL-SIM" :
+								       "HOST-MEASURED";
+			uint32_t e;
+
+			if (sreq.op == SOF_SCHED_TRACE_OP_CLEAR) {
+				printf("SCHED_TRACE -> ring buffer cleared (platform=%s, tick=%u)\n",
+				       thdr->platform_name, thdr->current_ll_tick);
+				free(rbuf);
+				return 0;
+			}
+
+			printf("=== Per-Iteration LL & DP Module Scheduling Timeline [Platform=%s(%uc) Mode=%s Tick=%u Recorded=%u Ring=%u Showing=%u] ===\n",
+			       thdr->platform_name, thdr->num_cores, mode_str,
+			       thdr->current_ll_tick, thdr->total_recorded_events,
+			       thdr->avail_in_ring, thdr->returned_events);
+			printf("  %-5s %-5s %-5s %-4s %-4s %-7s %-32s %12s %12s %10s %12s %21s %13s %11s %19s\n",
+			       "Seq", "Tick", "Iter", "Core", "Pipe", "Domain",
+			       "Module", "Start(us)", "Complete(us)", "Dur(us)",
+			       "Deadline(us)", "Start->End(cyc)", "Cyc/Budget",
+			       "In->Out(B)", "WallStart->End(us)");
+
+			for (e = 0; e < thdr->returned_events; e++) {
+				const struct sof_net_sched_trace_entry *ev = &entries[e];
+				const char *dom = (ev->event_type == 2) ? "DP-RUN" :
+						  (ev->event_type == 1) ? "DP-SYNC" : "LL-COPY";
+				uint64_t dur_ns = (ev->complete_ns >= ev->start_ns) ?
+						  (ev->complete_ns - ev->start_ns) : 0;
+				char mod_col[48];
+				char cyc_col[48];
+				char bud_col[32];
+				char io_col[32];
+				char wall_col[48];
+
+				snprintf(mod_col, sizeof(mod_col), "0x%06x %.22s",
+					 ev->comp_id, ev->widget_name);
+				snprintf(cyc_col, sizeof(cyc_col), "%llu->%llu",
+					 (unsigned long long)ev->start_cycles,
+					 (unsigned long long)ev->complete_cycles);
+				snprintf(bud_col, sizeof(bud_col), "%u/%u%s",
+					 ev->duration_cycles, ev->cpc_budget,
+					 ev->cpc_violation ? "!" : "");
+				snprintf(io_col, sizeof(io_col), "%u->%u",
+					 ev->bytes_in, ev->bytes_out);
+				snprintf(wall_col, sizeof(wall_col), "%llu.%03llu->%llu.%03llu",
+					 (unsigned long long)(ev->wall_start_ns / 1000ULL),
+					 (unsigned long long)(ev->wall_start_ns % 1000ULL),
+					 (unsigned long long)(ev->wall_complete_ns / 1000ULL),
+					 (unsigned long long)(ev->wall_complete_ns % 1000ULL));
+
+				printf("  %-5u %-5u %-5u C%-3u P%-3u %-7s %-32s %8llu.%03llu %8llu.%03llu %6llu.%03llu %8llu.%03llu %21s %13s %11s %19s\n",
+				       ev->seq_id, ev->ll_tick_nr, ev->mod_iter_nr,
+				       ev->core_id, ev->pipeline_id, dom, mod_col,
+				       (unsigned long long)(ev->start_ns / 1000ULL),
+				       (unsigned long long)(ev->start_ns % 1000ULL),
+				       (unsigned long long)(ev->complete_ns / 1000ULL),
+				       (unsigned long long)(ev->complete_ns % 1000ULL),
+				       (unsigned long long)(dur_ns / 1000ULL),
+				       (unsigned long long)(dur_ns % 1000ULL),
+				       (unsigned long long)(ev->deadline_ns / 1000ULL),
+				       (unsigned long long)(ev->deadline_ns % 1000ULL),
+				       cyc_col, bud_col, io_col, wall_col);
+			}
+
+			if (json_file) {
+				FILE *fp = fopen(json_file, "w");
+
+				if (fp) {
+					fprintf(fp, "{\n  \"displayTimeUnit\": \"ns\",\n  \"traceEvents\": [\n");
+					for (e = 0; e < thdr->returned_events; e++) {
+						const struct sof_net_sched_trace_entry *ev = &entries[e];
+						const char *dom = (ev->event_type == 2) ? "DP-RUN" :
+								  (ev->event_type == 1) ? "DP-SYNC" :
+											  "LL-COPY";
+						uint64_t dur_ns = (ev->complete_ns >= ev->start_ns) ?
+								  (ev->complete_ns - ev->start_ns) : 1;
+
+						fprintf(fp,
+							"    {\"name\": \"%s (0x%06x)\", \"cat\": \"%s\", \"ph\": \"X\", \"pid\": %u, \"tid\": %u, \"ts\": %.3f, \"dur\": %.3f, \"args\": {\"seq\": %u, \"ll_tick\": %u, \"mod_iter\": %u, \"start_ns\": %llu, \"complete_ns\": %llu, \"deadline_ns\": %llu, \"start_cycles\": %llu, \"complete_cycles\": %llu, \"duration_cycles\": %u, \"cpc_budget\": %u, \"cpc_violation\": %u, \"bytes_in\": %u, \"bytes_out\": %u, \"wall_start_ns\": %llu, \"wall_complete_ns\": %llu}}%s\n",
+							ev->widget_name, ev->comp_id, dom,
+							ev->core_id, ev->pipeline_id,
+							(double)ev->start_ns / 1000.0,
+							(double)dur_ns / 1000.0,
+							ev->seq_id, ev->ll_tick_nr, ev->mod_iter_nr,
+							(unsigned long long)ev->start_ns,
+							(unsigned long long)ev->complete_ns,
+							(unsigned long long)ev->deadline_ns,
+							(unsigned long long)ev->start_cycles,
+							(unsigned long long)ev->complete_cycles,
+							ev->duration_cycles, ev->cpc_budget,
+							ev->cpc_violation, ev->bytes_in,
+							ev->bytes_out,
+							(unsigned long long)ev->wall_start_ns,
+							(unsigned long long)ev->wall_complete_ns,
+							(e + 1 < thdr->returned_events) ? "," : "");
+					}
+					fprintf(fp, "  ]\n}\n");
+					fclose(fp);
+					printf("Saved Chrome Trace JSON (%u events) to %s\n",
+					       thdr->returned_events, json_file);
+				} else {
+					fprintf(stderr, "error: cannot write JSON trace to '%s'\n",
+						json_file);
+				}
+			}
+		} else {
+			fprintf(stderr, "error: SCHED_TRACE failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "workload-sim") == 0) {
+		const char *sub = (argc > 1) ? argv[1] : "get";
+
+		if (strcmp(sub, "get") == 0 || strcmp(sub, "set") == 0) {
+			struct sof_net_workload_sim_req wreq = {0};
+
+			if (strcmp(sub, "set") == 0) {
+				const char *m_arg = (argc > 2) ? argv[2] : "virtual";
+				const char *d_arg = (argc > 3) ? argv[3] : "sram";
+
+				wreq.op = SOF_WORKLOAD_SIM_OP_SET;
+				if (strcasecmp(m_arg, "off") == 0 || strcmp(m_arg, "0") == 0)
+					wreq.mode = 0; /* OFF */
+				else if (strcasecmp(m_arg, "realtime") == 0 || strcmp(m_arg, "2") == 0)
+					wreq.mode = 2; /* REALTIME */
+				else
+					wreq.mode = 1; /* VIRTUAL */
+
+				wreq.default_mem_domain =
+					(strncasecmp(d_arg, "dram", 4) == 0 || strcmp(d_arg, "1") == 0) ?
+					1 : 0;
+				wreq.dram_factor_x100 = (argc > 4) ? (uint32_t)atoi(argv[4]) : 180;
+				wreq.dram_cycles_per_word = (argc > 5) ? (uint32_t)atoi(argv[5]) : 4;
+			} else {
+				wreq.op = SOF_WORKLOAD_SIM_OP_GET;
+			}
+
+			st = rpc_call(sock, SOF_NET_OP_WORKLOAD_SIM_CFG, &wreq, sizeof(wreq),
+				      &rhdr, &rbuf);
+			if (st == 0 && rbuf &&
+			    rhdr.payload_len >= sizeof(struct sof_net_workload_sim_rsp)) {
+				const struct sof_net_workload_sim_rsp *wrsp =
+					(const struct sof_net_workload_sim_rsp *)rbuf;
+
+				printf("WORKLOAD_SIM_CFG -> mode=%u mem=%s sram=%u.%02ux dram=%u.%02ux (+%u cyc/w) overrides=%u\n",
+				       wrsp->mode,
+				       wrsp->default_mem_domain == 1 ? "DRAM" : "SRAM",
+				       wrsp->sram_factor_x100 / 100, wrsp->sram_factor_x100 % 100,
+				       wrsp->dram_factor_x100 / 100, wrsp->dram_factor_x100 % 100,
+				       wrsp->dram_cycles_per_word, wrsp->num_overrides);
+				for (uint32_t c = 0; c < wrsp->num_cores && c < 8; c++) {
+					printf("  [Core %u] freq=%u.%03u MHz active=%u util=%u.%02u%% overruns=%u LL=%u/%u kcps DP=%u/%u kcps\n",
+					       c, wrsp->cores[c].freq_hz / 1000000U,
+					       (wrsp->cores[c].freq_hz % 1000000U) / 1000U,
+					       wrsp->cores[c].active,
+					       wrsp->cores[c].total_util_x100 / 100,
+					       wrsp->cores[c].total_util_x100 % 100,
+					       wrsp->cores[c].ll_deadline_violations,
+					       wrsp->cores[c].ll_avg_kcps, wrsp->cores[c].ll_peak_kcps,
+					       wrsp->cores[c].dp_avg_kcps, wrsp->cores[c].dp_peak_kcps);
+				}
+			} else {
+				fprintf(stderr, "error: WORKLOAD_SIM_CFG failed (%d)\n", st);
+			}
+			free(rbuf);
+			return st < 0 ? 1 : 0;
+		}
+		return exec_joined_shell_cmd(sock, NULL, argc, argv, false);
+	}
+
+	if (strcmp(cmd, "llext-load") == 0) {
+		if (argc < 2) {
+			fprintf(stderr, "Usage: llext-load <file.llext|.so> [lib_id] [mod_name]\n");
+			return 1;
+		}
+		uint32_t dlen = 0;
+		uint8_t *dbytes = load_file_or_hex(argv[1], &dlen);
+
+		if (!dbytes || dlen == 0) {
+			fprintf(stderr, "error: cannot read module file '%s'\n", argv[1]);
+			free(dbytes);
+			return 1;
+		}
+		struct sof_net_llext_req lreq = {0};
+
+		lreq.mode = SOF_LLEXT_MODE_IPC4_DIRECT;
+		lreq.lib_id = (argc > 2) ? (uint32_t)atoi(argv[2]) : 1;
+		lreq.data_size = dlen;
+		lreq.issue_shell_cmd = 1;
+		snprintf(lreq.mod_name, sizeof(lreq.mod_name), "%s",
+			 (argc > 3) ? argv[3] : argv[1]);
+
+		uint8_t *req_buf = calloc(1, sizeof(lreq) + dlen);
+
+		memcpy(req_buf, &lreq, sizeof(lreq));
+		memcpy(req_buf + sizeof(lreq), dbytes, dlen);
+		free(dbytes);
+
+		st = rpc_call(sock, SOF_NET_OP_LLEXT_LOAD, req_buf, sizeof(lreq) + dlen, &rhdr, &rbuf);
+		free(req_buf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_llext_rsp)) {
+			const struct sof_net_llext_rsp *lrsp = (const struct sof_net_llext_rsp *)rbuf;
+
+			printf("%s", lrsp->shell_out);
+		} else {
+			fprintf(stderr, "error: LLEXT_LOAD failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "probes") == 0) {
+		const char *sub = (argc > 1) ? argv[1] : "avail";
+		struct sof_net_probe_req preq = {0};
+
+		if (strcmp(sub, "extract") == 0) {
+			preq.op = SOF_PROBE_OP_READ_BUFFER;
+			preq.stream_tag = (argc > 2) ? (uint32_t)strtoul(argv[2], NULL, 0) : 0;
+			preq.dma_buffer_size = 256;
+			st = rpc_call(sock, SOF_NET_OP_PROBE_CTL, &preq, sizeof(preq), &rhdr, &rbuf);
+			if (st == 0 && rbuf && rhdr.payload_len >= sizeof(preq)) {
+				const struct sof_net_probe_req *prsp =
+					(const struct sof_net_probe_req *)rbuf;
+				const int32_t *samps = (const int32_t *)(rbuf + sizeof(*prsp));
+				uint32_t nsamp = prsp->num_points;
+
+				printf("PROBE_EXTRACT(comp=0x%06x) -> %u samples (%u bytes)\n",
+				       prsp->stream_tag, nsamp, prsp->dma_buffer_size);
+				for (uint32_t i = 0; i < nsamp && i < 16; i++)
+					printf("  sample[%2u] = %d\n", i, samps[i]);
+				if (argc > 3 && prsp->dma_buffer_size > 0) {
+					FILE *fp = fopen(argv[3], "wb");
+
+					if (fp) {
+						fwrite(samps, 1, prsp->dma_buffer_size, fp);
+						fclose(fp);
+						printf("Saved %u probe bytes to %s\n",
+						       prsp->dma_buffer_size, argv[3]);
+					}
+				}
+			} else {
+				fprintf(stderr, "error: PROBE_EXTRACT failed (%d)\n", st);
+			}
+			free(rbuf);
+			return st < 0 ? 1 : 0;
+		}
+
+		if (strcmp(sub, "active") == 0)
+			preq.op = SOF_PROBE_OP_INFO_ACTIVE;
+		else if (strcmp(sub, "init") == 0)
+			preq.op = SOF_PROBE_OP_INIT;
+		else if (strcmp(sub, "deinit") == 0)
+			preq.op = SOF_PROBE_OP_DEINIT;
+		else
+			preq.op = SOF_PROBE_OP_INFO_AVAILABLE;
+		preq.num_points = 64;
+
+		st = rpc_call(sock, SOF_NET_OP_PROBE_CTL, &preq, sizeof(preq), &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(preq)) {
+			const struct sof_net_probe_req *prsp = (const struct sof_net_probe_req *)rbuf;
+			const struct sof_cdev_probe_point *pts =
+				(const struct sof_cdev_probe_point *)(rbuf + sizeof(*prsp));
+
+			printf("=== SOF Probe Points (%u found) ===\n", prsp->num_points);
+			for (uint32_t i = 0; i < prsp->num_points; i++) {
+				printf("  [%2u] buf_id=0x%06x pipe=%u purpose=%u widget='%s'\n",
+				       i, pts[i].buffer_id, pts[i].stream_tag,
+				       pts[i].purpose, pts[i].widget_name);
+			}
+		} else {
+			fprintf(stderr, "error: PROBE_CTL failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "pcm") == 0) {
+		const char *sub = (argc > 1) ? argv[1] : "status";
+		struct sof_net_pcm_req preq = {0};
+		uint8_t *play_data = NULL;
+		uint32_t play_len = 0;
+
+		snprintf(preq.device, sizeof(preq.device), "hw:0,0");
+		preq.rate = 48000;
+		preq.channels = 2;
+		preq.freq_hz = 1000;
+
+		if (strcmp(sub, "start-tone") == 0) {
+			preq.op = SOF_PCM_OP_START_TONE;
+			if (argc > 2)
+				snprintf(preq.device, sizeof(preq.device), "%s", argv[2]);
+			if (argc > 3)
+				preq.freq_hz = (uint32_t)atoi(argv[3]);
+			if (argc > 4)
+				preq.rate = (uint32_t)atoi(argv[4]);
+			if (argc > 5)
+				preq.channels = (uint32_t)atoi(argv[5]);
+		} else if (strcmp(sub, "stop-tone") == 0) {
+			preq.op = SOF_PCM_OP_STOP_TONE;
+		} else if (strcmp(sub, "play") == 0 && argc > 2) {
+			preq.op = SOF_PCM_OP_PLAY_BUFFER;
+			play_data = load_file_or_hex(argv[2], &play_len);
+			preq.data_size = play_len;
+			if (argc > 3)
+				snprintf(preq.device, sizeof(preq.device), "%s", argv[3]);
+			if (argc > 4)
+				preq.rate = (uint32_t)atoi(argv[4]);
+			if (argc > 5)
+				preq.channels = (uint32_t)atoi(argv[5]);
+		} else if (strcmp(sub, "capture") == 0) {
+			preq.op = SOF_PCM_OP_CAPTURE_BUFFER;
+			preq.duration_ms = (argc > 2) ? (uint32_t)atoi(argv[2]) : 100;
+		} else {
+			preq.op = SOF_PCM_OP_STATUS;
+		}
+
+		uint8_t *req_buf = calloc(1, sizeof(preq) + play_len);
+
+		memcpy(req_buf, &preq, sizeof(preq));
+		if (play_data && play_len > 0)
+			memcpy(req_buf + sizeof(preq), play_data, play_len);
+		free(play_data);
+
+		st = rpc_call(sock, SOF_NET_OP_PCM_CTL, req_buf, sizeof(preq) + play_len, &rhdr, &rbuf);
+		free(req_buf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_pcm_rsp)) {
+			const struct sof_net_pcm_rsp *prsp = (const struct sof_net_pcm_rsp *)rbuf;
+
+			printf("PCM_CTL -> dev=%s tone=%s (%u Hz) %uHz/%uch frames=%llu rms=%u peak=%u captured=%uB\n",
+			       prsp->active_device, prsp->tone_running ? "ON" : "OFF",
+			       prsp->freq_hz, prsp->rate, prsp->channels,
+			       (unsigned long long)prsp->frames_played,
+			       prsp->rms_level, prsp->peak_level, prsp->data_size);
+			if (preq.op == SOF_PCM_OP_CAPTURE_BUFFER && argc > 3 && prsp->data_size > 0) {
+				FILE *fp = fopen(argv[3], "wb");
+
+				if (fp) {
+					fwrite(rbuf + sizeof(*prsp), 1, prsp->data_size, fp);
+					fclose(fp);
+					printf("Saved %u captured bytes to %s\n",
+					       prsp->data_size, argv[3]);
+				}
+			}
+		} else {
+			fprintf(stderr, "error: PCM_CTL failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "cards") == 0) {
+		st = rpc_call(sock, SOF_NET_OP_CARD_LIST, NULL, 0, &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_card_list_hdr)) {
+			const struct sof_net_card_list_hdr *chdr =
+				(const struct sof_net_card_list_hdr *)rbuf;
+			const struct sof_net_card_info *cards =
+				(const struct sof_net_card_info *)(rbuf + sizeof(*chdr));
+			const struct sof_net_pcm_node_info *nodes =
+				(const struct sof_net_pcm_node_info *)(rbuf + sizeof(*chdr) +
+				chdr->num_cards * sizeof(*cards));
+
+			printf("=== Sound Cards (%u) & PCM/Compress Nodes (%u) ===\n",
+			       chdr->num_cards, chdr->num_pcm_nodes);
+			for (uint32_t i = 0; i < chdr->num_cards; i++) {
+				printf("  Card %u: %s (%s) tplg='%s' pcms=%u compr=%u kctls=%u\n",
+				       cards[i].card_id, cards[i].id, cards[i].name,
+				       cards[i].tplg_file, cards[i].num_pcm_streams,
+				       cards[i].num_compr_streams, cards[i].num_kcontrols);
+			}
+			for (uint32_t i = 0; i < chdr->num_pcm_nodes; i++) {
+				printf("  PCM c%ud%u%c: %-24s state=%-8s %uHz/%uch/%s\n",
+				       nodes[i].card_id, nodes[i].device_id,
+				       nodes[i].direction == SOF_STREAM_DIR_CAPTURE ? 'c' : 'p',
+				       nodes[i].name, nodes[i].state_str,
+				       nodes[i].active_rate, nodes[i].active_channels,
+				       nodes[i].active_format);
+			}
+		} else {
+			fprintf(stderr, "error: CARD_LIST failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "pcm-caps") == 0) {
+		struct sof_net_pcm_caps_req creq = {
+			.card_id     = (argc > 1) ? (uint32_t)atoi(argv[1]) : 0xFFFFFFFFU,
+			.device_id   = (argc > 2) ? (uint32_t)atoi(argv[2]) : 0xFFFFFFFFU,
+			.dir_mask    = SOF_CAPS_DIR_ALL,
+			.api_backend = SOF_AUDIO_API_ALSA,
+		};
+		st = rpc_call(sock, SOF_NET_OP_PCM_CAPS, &creq, sizeof(creq), &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_pcm_caps_hdr)) {
+			const struct sof_net_pcm_caps_hdr *chdr =
+				(const struct sof_net_pcm_caps_hdr *)rbuf;
+			const struct sof_net_pcm_caps *caps =
+				(const struct sof_net_pcm_caps *)(rbuf + sizeof(*chdr));
+
+			printf("=== PCM & Compress Capabilities (%u entries) ===\n",
+			       chdr->num_entries);
+			for (uint32_t i = 0; i < chdr->num_entries; i++) {
+				printf("  [c%ud%u %s] %-24s rates=%u..%uHz ch=%u..%u fmts=0x%llx\n",
+				       caps[i].card_id, caps[i].device_id,
+				       caps[i].direction == SOF_STREAM_DIR_CAPTURE ? "CAP" : "PB ",
+				       caps[i].name, caps[i].rate_min, caps[i].rate_max,
+				       caps[i].channels_min, caps[i].channels_max,
+				       (unsigned long long)caps[i].formats_mask);
+			}
+		} else {
+			fprintf(stderr, "error: PCM_CAPS failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "dapm") == 0) {
+		struct sof_net_dapm_req dreq = { .card_id = 0, .flags = 0 };
+
+		st = rpc_call(sock, SOF_NET_OP_DAPM_GRAPH, &dreq, sizeof(dreq), &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_dapm_graph_hdr)) {
+			const struct sof_net_dapm_graph_hdr *dhdr =
+				(const struct sof_net_dapm_graph_hdr *)rbuf;
+			size_t nodes_off = sizeof(*dhdr) +
+					   dhdr->num_components * sizeof(struct sof_net_dapm_comp_status);
+			size_t edges_off = nodes_off +
+					   dhdr->num_nodes * sizeof(struct sof_net_dapm_node);
+			const struct sof_net_dapm_node *nodes =
+				(const struct sof_net_dapm_node *)(rbuf + nodes_off);
+			const struct sof_net_dapm_edge *edges =
+				(const struct sof_net_dapm_edge *)(rbuf + edges_off);
+
+			printf("DAPM_GRAPH -> card='%s' tplg='%s' nodes=%u (%u ON) edges=%u (%u active) links=%u\n",
+			       dhdr->card_name, dhdr->tplg_file,
+			       dhdr->num_nodes, dhdr->num_powered_nodes,
+			       dhdr->num_edges, dhdr->num_active_edges,
+			       dhdr->num_dpcm_links);
+			if (argc > 1 && rhdr.payload_len >= edges_off + dhdr->num_edges * sizeof(*edges)) {
+				FILE *fp = fopen(argv[1], "w");
+
+				if (fp) {
+					fprintf(fp, "digraph DAPM {\n  rankdir=LR;\n");
+					for (uint32_t i = 0; i < dhdr->num_nodes; i++) {
+						fprintf(fp, "  \"%s\" [label=\"%s\\n(%s, pipe %d)\"];\n",
+							nodes[i].name, nodes[i].name,
+							nodes[i].widget_type, nodes[i].pipeline_id);
+					}
+					for (uint32_t i = 0; i < dhdr->num_edges; i++) {
+						fprintf(fp, "  \"%s\" -> \"%s\";\n",
+							edges[i].src_name, edges[i].dst_name);
+					}
+					fprintf(fp, "}\n");
+					fclose(fp);
+					printf("Saved DOT graph to %s\n", argv[1]);
+				}
+			}
+		} else {
+			fprintf(stderr, "error: DAPM_GRAPH failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "compr") == 0) {
+		const char *sub = (argc > 1) ? argv[1] : "caps";
+		struct sof_net_compr_req creq = {0};
+
+		if (strcmp(sub, "play") == 0)
+			creq.op = SOF_COMPR_OP_PLAY_BUFFER;
+		else if (strcmp(sub, "capture") == 0)
+			creq.op = SOF_COMPR_OP_CAPTURE_BUFFER;
+		else
+			creq.op = SOF_COMPR_OP_GET_CAPS;
+
+		creq.card_id = (argc > 2) ? (uint32_t)atoi(argv[2]) : 0;
+		creq.device_id = (argc > 3) ? (uint32_t)atoi(argv[3]) : 0;
+		creq.rate = 48000;
+		creq.channels = 2;
+
+		st = rpc_call(sock, SOF_NET_OP_COMPR_CTL, &creq, sizeof(creq), &rhdr, &rbuf);
+		if (st == 0 && rbuf && rhdr.payload_len >= sizeof(struct sof_net_compr_rsp)) {
+			const struct sof_net_compr_rsp *crsp =
+				(const struct sof_net_compr_rsp *)rbuf;
+
+			printf("COMPR_CTL(op=%u) -> status=%d codecs=%u codec0=0x%x xfer=%uB rate=%uHz\n",
+			       creq.op, crsp->status, crsp->num_codecs,
+			       crsp->codecs[0], crsp->bytes_transferred,
+			       crsp->sampling_rate);
+		} else {
+			fprintf(stderr, "error: COMPR_CTL failed (%d)\n", st);
+		}
+		free(rbuf);
+		return st < 0 ? 1 : 0;
+	}
+
+	if (strcmp(cmd, "kctl") == 0) {
+		const char *sub = (argc > 1) ? argv[1] : "list";
+
+		if (strcmp(sub, "list") == 0) {
+			struct sof_net_kctl_list_req kreq = {
+				.card_id = 0,
+				.api_backend = SOF_AUDIO_API_ALSA,
+			};
+			st = rpc_call(sock, SOF_NET_OP_KCTL_LIST, &kreq, sizeof(kreq), &rhdr, &rbuf);
+			if (st == 0 && rbuf &&
+			    rhdr.payload_len >= sizeof(struct sof_net_kctl_list_hdr)) {
+				const struct sof_net_kctl_list_hdr *khdr =
+					(const struct sof_net_kctl_list_hdr *)rbuf;
+				const struct sof_net_kctl_info *kinfo =
+					(const struct sof_net_kctl_info *)(rbuf + sizeof(*khdr));
+
+				printf("=== ALSA Kcontrols (%u entries) ===\n", khdr->num_kcontrols);
+				for (uint32_t i = 0; i < khdr->num_kcontrols; i++) {
+					printf("  [%2u] %-44s type=%u count=%u val0=%lld\n",
+					       kinfo[i].numid, kinfo[i].name, kinfo[i].type,
+					       kinfo[i].count, (long long)kinfo[i].values[0]);
+				}
+			} else {
+				fprintf(stderr, "error: KCTL_LIST failed (%d)\n", st);
+			}
+			free(rbuf);
+			return st < 0 ? 1 : 0;
+		}
+
+		if ((strcmp(sub, "get") == 0 || strcmp(sub, "set") == 0 ||
+		     strcmp(sub, "set-bytes") == 0) && argc > 2) {
+			struct sof_net_kctl_io_req kreq = {0};
+			uint16_t op = (strcmp(sub, "get") == 0) ?
+				      SOF_NET_OP_KCTL_GET : SOF_NET_OP_KCTL_SET;
+
+			if (isdigit((unsigned char)argv[2][0]))
+				kreq.numid = (uint32_t)atoi(argv[2]);
+			else
+				snprintf(kreq.name, sizeof(kreq.name), "%s", argv[2]);
+
+			if (strcmp(sub, "set") == 0) {
+				uint32_t cnt = 0;
+
+				for (int i = 3; i < argc && cnt < 8; i++)
+					kreq.values[cnt++] = strtoll(argv[i], NULL, 0);
+				kreq.count = cnt;
+			} else if (strcmp(sub, "set-bytes") == 0 && argc > 3) {
+				uint32_t blen = 0;
+				uint8_t *bdata = load_file_or_hex(argv[3], &blen);
+
+				if (bdata && blen > 0) {
+					if (blen > sizeof(kreq.bytes_data))
+						blen = sizeof(kreq.bytes_data);
+					memcpy(kreq.bytes_data, bdata, blen);
+					kreq.bytes_len = blen;
+				}
+				free(bdata);
+			}
+
+			st = rpc_call(sock, op, &kreq, sizeof(kreq), &rhdr, &rbuf);
+			if (st == 0 && rbuf &&
+			    rhdr.payload_len >= sizeof(struct sof_net_kctl_io_rsp)) {
+				const struct sof_net_kctl_io_rsp *krsp =
+					(const struct sof_net_kctl_io_rsp *)rbuf;
+
+				printf("KCTL %s [%u] '%s' -> val=[%lld, %lld] bytes=%u\n",
+				       sub, krsp->info.numid, krsp->info.name,
+				       (long long)krsp->info.values[0],
+				       (long long)krsp->info.values[1],
+				       krsp->bytes_len);
+			} else {
+				fprintf(stderr, "error: KCTL_%s failed (%d)\n", sub, st);
+			}
+			free(rbuf);
+			return st < 0 ? 1 : 0;
+		}
+	}
+
+	if (strcmp(cmd, "shell") == 0) {
+		if (argc < 2) {
+			fprintf(stderr, "Usage: shell <cmd...>\n");
+			return 1;
+		}
+		return exec_joined_shell_cmd(sock, NULL, argc - 1, argv + 1, false);
+	}
+
+	/* First-class testbench shell commands (run-test, tplg-load, tplg-unload, io-cfg, etc.) */
+	return exec_joined_shell_cmd(sock, NULL, argc, argv, strcmp(cmd, "run-test") == 0);
+}
+
+static int tokenize_line(char *line, char **argv, int max_args)
+{
+	int argc = 0;
+	char *p = line;
+
+	while (*p && argc < max_args) {
+		while (*p == ' ' || *p == '\t' || *p == '\r' || *p == '\n')
+			p++;
+		if (!*p || *p == '#')
+			break;
+		if (*p == '"' || *p == '\'') {
+			char q = *p++;
+
+			argv[argc++] = p;
+			while (*p && *p != q)
+				p++;
+			if (*p == q)
+				*p++ = '\0';
+		} else {
+			argv[argc++] = p;
+			while (*p && *p != ' ' && *p != '\t' && *p != '\r' && *p != '\n')
+				p++;
+			if (*p)
+				*p++ = '\0';
+		}
+	}
+	return argc;
+}
+
+static int run_interactive_stream(int sock, FILE *in_fp, bool show_prompt)
+{
+	char line[4096];
+	char *argv[128];
+	int rc = 0;
+
+	while (true) {
+		if (show_prompt) {
+			printf("sof-tb> ");
+			fflush(stdout);
+		}
+		if (!fgets(line, sizeof(line), in_fp))
+			break;
+		int l_argc = tokenize_line(line, argv, 128);
+
+		if (l_argc <= 0)
+			continue;
+		if (strcmp(argv[0], "exit") == 0)
+			break;
+		int cmd_rc = dispatch_command(sock, l_argc, argv);
+
+		if (cmd_rc != 0)
+			rc = cmd_rc;
+		if (strcmp(argv[0], "quit") == 0)
+			break;
+	}
+	return rc;
+}
+
+int main(int argc, char **argv)
+{
+	const char *host = "127.0.0.1";
+	int port = SOF_NET_DEFAULT_PORT;
+	const char *script_file = NULL;
+	int arg_idx = 1;
+
+	while (arg_idx < argc && argv[arg_idx][0] == '-') {
+		if (strcmp(argv[arg_idx], "-H") == 0 && arg_idx + 1 < argc) {
+			host = argv[arg_idx + 1];
+			arg_idx += 2;
+		} else if (strcmp(argv[arg_idx], "-p") == 0 && arg_idx + 1 < argc) {
+			port = atoi(argv[arg_idx + 1]);
+			arg_idx += 2;
+		} else if (strcmp(argv[arg_idx], "-f") == 0 && arg_idx + 1 < argc) {
+			script_file = argv[arg_idx + 1];
+			arg_idx += 2;
+		} else if (strcmp(argv[arg_idx], "-h") == 0 ||
+			   strcmp(argv[arg_idx], "--help") == 0) {
+			print_usage(argv[0]);
+			return 0;
+		} else {
+			break;
+		}
+	}
+
+	int sock = connect_server(host, port);
+
+	if (sock < 0) {
+		fprintf(stderr, "error: failed to connect to %s:%d\n", host, port);
+		return 1;
+	}
+
+	int ret = 0;
+
+	if (script_file) {
+		FILE *fp = fopen(script_file, "r");
+
+		if (!fp) {
+			fprintf(stderr, "error: cannot open script file '%s'\n", script_file);
+			close(sock);
+			return 1;
+		}
+		ret = run_interactive_stream(sock, fp, false);
+		fclose(fp);
+	} else if (arg_idx >= argc || strcmp(argv[arg_idx], "repl") == 0) {
+		ret = run_interactive_stream(sock, stdin, isatty(STDIN_FILENO));
+	} else {
+		ret = dispatch_command(sock, argc - arg_idx, argv + arg_idx);
+	}
+
+	close(sock);
+	return ret;
+}
diff --git a/tools/testbench/testbench.c b/tools/testbench/testbench.c
index 670f34c1ab27..122a74d843b1 100644
--- a/tools/testbench/testbench.c
+++ b/tools/testbench/testbench.c
@@ -14,6 +14,10 @@
 #include "testbench/trace.h"
 #include "testbench/file.h"
 #include "testbench/utils.h"
+#include "testbench/remote_server.h"
+#include "testbench/topology_ipc4.h"
+#include <platform/lib/telemetry_sched.h>
+#include <ipc4/module.h>
 
 #include <ctype.h>
 #include <getopt.h>
@@ -21,6 +25,7 @@
 #include <stdbool.h>
 #include <stdlib.h>
 #include <time.h>
+#include <unistd.h>
 
 #define TESTBENCH_NCH	2
 
@@ -93,21 +98,21 @@ static int parse_pipelines(char *pipelines, struct testbench_prm *tp)
 	char *token = strtok_r(pipelines, ",", &output_token);
 	int index;
 
-	for (index = 0; index < TB_MAX_OUTPUT_FILE_NUM && token; index++) {
-		/* get output file name with current index */
+	for (index = 0; index < TB_MAX_PIPELINES_NUM && token; index++) {
+		/* get pipeline id with current index */
 		tp->pipelines[index] = atoi(token);
 
-		/* next output */
+		/* next pipeline */
 		token = strtok_r(NULL, ",", &output_token);
 	}
 
-	if (index == TB_MAX_OUTPUT_FILE_NUM && token) {
-		fprintf(stderr, "error: max output file number is %d\n",
-			TB_MAX_OUTPUT_FILE_NUM);
+	if (index == TB_MAX_PIPELINES_NUM && token) {
+		fprintf(stderr, "error: max pipeline number is %d\n",
+			TB_MAX_PIPELINES_NUM);
 		return -EINVAL;
 	}
 
-	/* set total output file number */
+	/* set total pipeline number */
 	tp->pipeline_num = index;
 	return 0;
 }
@@ -115,21 +120,36 @@ static int parse_pipelines(char *pipelines, struct testbench_prm *tp)
 /* print usage for testbench */
 static void print_usage(char *executable)
 {
-	printf("Usage: %s <options> -i <input_file> ", executable);
+	printf("Usage: %s <options> -i <input_file1,input_file2,...> ", executable);
 	printf("-o <output_file1,output_file2,...>\n\n");
 	printf("Options for processing:\n");
-	printf("  -t <topology file>\n\n");
+	printf("  -t <topology file>\n");
+	printf("  -i <input_file1,input_file2,...> (up to %d comma-separated input files)\n",
+	       TB_MAX_INPUT_FILE_NUM);
+	printf("  -o <output_file1,output_file2,...> (up to %d comma-separated output files)\n\n",
+	       TB_MAX_OUTPUT_FILE_NUM);
 	printf("Options to control test:\n");
 	printf("  -d <level> Sets the traces print level:\n");
 	printf("     0 all traces are suppressed\n");
 	printf("     1 shows error traces\n");
 	printf("     2 shows warning traces and previous\n");
 	printf("     3 shows info traces and previous\n");
-	printf("     4 shows debug traces and previous, plus other testbench  debug messages\n");
-	printf("  -p <pipeline1,pipeline2,...>\n");
+	printf("     4 shows debug traces and previous, plus other testbench debug messages\n");
+	printf("  -p <pipeline1,pipeline2,...> (up to %d comma-separated pipeline IDs)\n",
+	       TB_MAX_PIPELINES_NUM);
 	printf("  -C <number of copy() iterations>\n");
 	printf("  -P <number of dynamic pipeline iterations>\n");
-	printf("  -s <script file to set controls, with amixer and sleep commands>\n\n");
+	printf("  -s <script file to set controls, with amixer and sleep commands>\n");
+	printf("  -S <port> Start sof-remote TCP server on <port> (default port: 9998)\n");
+	printf("  -W Keep testbench running continuously for remote network control\n");
+	printf("  -I Run testbench in interactive network server mode (default port: 9998)\n");
+	printf("  -A <platform|list> Apply hardware platform preset (tgl,tgl-h,mtl,arl,lnl,ptl,wcl,nvl,nvl-s)\n");
+	printf("  -N <num_cores> Set DSP core count (1..%d)\n", TB_TELEM_MAX_CORES);
+	printf("  -m <hpsram[,lpsram[,dram]]> Set platform memory sizes (e.g. 2816K,64K,16M)\n");
+	printf("  -w <0|1|2|off|virtual|realtime> Enable CPC workload execution time simulation\n");
+	printf("  -F <freq_mhz | core:freq_mhz,...> Set target DSP core clock frequency in MHz/kHz/Hz\n");
+	printf("  -M <sram|dram[:penalty_x100[:cycles_per_word]]> Set workload memory domain\n");
+	printf("  -T <max_events> Print per-iteration LL/DP module scheduling timeline (start/complete/deadline)\n\n");
 	printf("Options for input and output format override:\n");
 	printf("  -b <input_format>, S16_LE, S24_LE, or S32_LE\n");
 	printf("  -c <input channels>\n");
@@ -142,12 +162,195 @@ static void print_usage(char *executable)
 	printf("%s -r 48000 -c 2 -b S16_LE -i in.raw -o out.raw -t <test.tplg>\n\n", executable);
 }
 
+static void print_platform_presets(void)
+{
+	size_t count = 0, i;
+	const struct host_platform_preset *presets = host_platform_get_presets(&count);
+
+	printf("Available Hardware Platform Presets (-A <platform>):\n");
+	printf("  %-8s %-6s %-13s %-10s %-10s %-10s %s\n",
+	       "Name", "Cores", "Clock (MHz)", "HPSRAM", "LPSRAM", "DRAM/IMR", "Description");
+	printf("  ---------------------------------------------------------------------------------------------\n");
+	for (i = 0; i < count; i++) {
+		printf("  %-8s %-6u %7u.%03u   %6zu KB  %6zu KB  %6zu KB  %s (aliases: %s)\n",
+		       presets[i].name,
+		       presets[i].num_cores,
+		       presets[i].freq_hz / 1000000U,
+		       (presets[i].freq_hz % 1000000U) / 1000U,
+		       presets[i].hpsram_size_bytes / 1024UL,
+		       presets[i].lpsram_size_bytes / 1024UL,
+		       presets[i].dram_size_bytes / 1024UL,
+		       presets[i].desc,
+		       presets[i].aliases);
+	}
+}
+
+static uint32_t parse_freq_token_hz(const char *str)
+{
+	char *endp = NULL;
+	double val;
+
+	if (!str || !*str)
+		return (uint32_t)TB_DSP_NOMINAL_HZ;
+	val = strtod(str, &endp);
+	if (val <= 0.0)
+		return (uint32_t)TB_DSP_NOMINAL_HZ;
+
+	if (endp && (*endp == 'k' || *endp == 'K'))
+		return (uint32_t)(val * 1000.0 + 0.5);
+	if (endp && (*endp == 'm' || *endp == 'M'))
+		return (uint32_t)(val * 1000000.0 + 0.5);
+	if (val < 100000.0)
+		return (uint32_t)(val * 1000000.0 + 0.5);
+	return (uint32_t)(val + 0.5);
+}
+
+static void parse_core_freq_arg(const char *arg)
+{
+	char *copy = strdup(arg);
+	char *saveptr = NULL;
+	char *tok;
+
+	if (!copy)
+		return;
+
+	tok = strtok_r(copy, ",", &saveptr);
+	while (tok) {
+		char *colon = strchr(tok, ':');
+
+		if (colon) {
+			int core = atoi(tok);
+			uint32_t hz = parse_freq_token_hz(colon + 1);
+
+			host_workload_sim_set_core_freq(core, hz);
+		} else {
+			uint32_t hz = parse_freq_token_hz(tok);
+
+			host_workload_sim_set_core_freq(-1, hz);
+		}
+		tok = strtok_r(NULL, ",", &saveptr);
+	}
+	free(copy);
+}
+
+static size_t parse_mem_size_token(const char *str)
+{
+	char *endp = NULL;
+	double val;
+
+	if (!str || !*str)
+		return 0;
+	val = strtod(str, &endp);
+	if (val <= 0.0)
+		return 0;
+
+	if (endp && (*endp == 'm' || *endp == 'M'))
+		return (size_t)(val * 1024.0 * 1024.0 + 0.5);
+	if (endp && (*endp == 'k' || *endp == 'K'))
+		return (size_t)(val * 1024.0 + 0.5);
+	if (endp && (*endp == 'b' || *endp == 'B'))
+		return (size_t)(val + 0.5);
+	if (val <= 65536.0)
+		return (size_t)(val * 1024.0 + 0.5); /* Default unit: KB */
+	return (size_t)(val + 0.5);
+}
+
+static int parse_mem_cfg_arg(const char *arg)
+{
+	size_t hpsram = 0, lpsram = 0, dram = 0;
+	bool enforce = true;
+	char *copy, *saveptr = NULL, *tok;
+	int pos = 0;
+
+	if (!arg || !*arg)
+		return -EINVAL;
+
+	copy = strdup(arg);
+	if (!copy)
+		return -ENOMEM;
+
+	tok = strtok_r(copy, ",", &saveptr);
+	while (tok) {
+		char *eq = strchr(tok, '=');
+
+		if (eq) {
+			*eq = '\0';
+			const char *val = eq + 1;
+
+			if (strcasecmp(tok, "hpsram") == 0 || strcasecmp(tok, "sram") == 0 ||
+			    strcasecmp(tok, "hp") == 0) {
+				hpsram = parse_mem_size_token(val);
+			} else if (strcasecmp(tok, "lpsram") == 0 || strcasecmp(tok, "lp") == 0) {
+				lpsram = parse_mem_size_token(val);
+			} else if (strcasecmp(tok, "dram") == 0 || strcasecmp(tok, "imr") == 0 ||
+				   strcasecmp(tok, "l3") == 0) {
+				dram = parse_mem_size_token(val);
+			} else if (strcasecmp(tok, "strict") == 0 ||
+				   strcasecmp(tok, "enforce") == 0) {
+				enforce = (atoi(val) != 0 && strcasecmp(val, "off") != 0 &&
+					   strcasecmp(val, "false") != 0);
+			}
+		} else if (strcasecmp(tok, "nostrict") == 0) {
+			enforce = false;
+		} else if (strcasecmp(tok, "strict") == 0) {
+			enforce = true;
+		} else {
+			size_t sz = parse_mem_size_token(tok);
+
+			if (pos == 0)
+				hpsram = sz;
+			else if (pos == 1)
+				lpsram = sz;
+			else if (pos == 2)
+				dram = sz;
+			pos++;
+		}
+		tok = strtok_r(NULL, ",", &saveptr);
+	}
+	free(copy);
+
+	if (hpsram == 0 && lpsram == 0 && dram == 0) {
+		fprintf(stderr, "Error: invalid memory configuration '%s'\n", arg);
+		return -EINVAL;
+	}
+
+	host_platform_set_memory(hpsram, lpsram, dram, enforce);
+	return 0;
+}
+
+static void parse_mem_domain_arg(const char *arg)
+{
+	uint32_t domain = HOST_MEM_DOMAIN_SRAM;
+	uint32_t factor = 0;
+	uint32_t c_per_word = 0;
+	const char *colon;
+
+	if (strncasecmp(arg, "dram", 4) == 0 || strcmp(arg, "1") == 0)
+		domain = HOST_MEM_DOMAIN_DRAM;
+
+	colon = strchr(arg, ':');
+	if (colon) {
+		const char *colon2;
+
+		factor = (uint32_t)strtoul(colon + 1, NULL, 10);
+		colon2 = strchr(colon + 1, ':');
+		if (colon2)
+			c_per_word = (uint32_t)strtoul(colon2 + 1, NULL, 10);
+	}
+	host_workload_sim_set_mem_domain(domain, factor, c_per_word);
+}
+
 static int parse_input_args(int argc, char **argv, struct testbench_prm *tp)
 {
 	int option = 0;
 	int ret = 0;
+	bool w_explicit_off = false;
+	const char *opt_preset = NULL;
+	const char *opt_cores = NULL;
+	const char *opt_mem = NULL;
+	const char *opt_freq = NULL;
 
-	while ((option = getopt(argc, argv, "hd:i:o:t:b:r:R:c:n:C:P:p:s:")) != -1) {
+	while ((option = getopt(argc, argv, "hd:i:o:t:b:r:R:c:n:C:P:p:s:S:WIA:N:m:w:F:M:T:")) != -1) {
 		switch (option) {
 		/* input sample file */
 		case 'i':
@@ -222,6 +425,77 @@ static int parse_input_args(int argc, char **argv, struct testbench_prm *tp)
 			tp->control_file = strdup(optarg);
 			break;
 
+		/* start sof-remote TCP server on port */
+		case 'S':
+			tp->server_port = atoi(optarg);
+			if (tp->server_port <= 0)
+				tp->server_port = 9998;
+			break;
+
+		/* keep testbench running continuously for remote control */
+		case 'W':
+		case 'I':
+			tp->server_wait = true;
+			if (tp->server_port <= 0)
+				tp->server_port = 9998;
+			break;
+
+		/* hardware platform preset */
+		case 'A':
+			if (strcasecmp(optarg, "list") == 0 || strcasecmp(optarg, "help") == 0) {
+				print_platform_presets();
+				exit(EXIT_SUCCESS);
+			}
+			opt_preset = optarg;
+			break;
+
+		/* DSP core count */
+		case 'N':
+			opt_cores = optarg;
+			break;
+
+		/* DSP memory capacities (HPSRAM, LPSRAM, DRAM) */
+		case 'm':
+			opt_mem = optarg;
+			break;
+
+		/* workload execution time simulation mode */
+		case 'w':
+			if (strcmp(optarg, "0") == 0 || strcasecmp(optarg, "off") == 0 ||
+			    strcasecmp(optarg, "disable") == 0) {
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_OFF);
+				w_explicit_off = true;
+			} else if (strcmp(optarg, "2") == 0 ||
+				   strcasecmp(optarg, "realtime") == 0 ||
+				   strcasecmp(optarg, "pace") == 0) {
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_REALTIME);
+				w_explicit_off = false;
+			} else {
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+				w_explicit_off = false;
+			}
+			break;
+
+		/* target DSP core clock frequency in MHz */
+		case 'F':
+			opt_freq = optarg;
+			break;
+
+		/* workload execution memory domain (sram vs dram) */
+		case 'M':
+			parse_mem_domain_arg(optarg);
+			if (!w_explicit_off &&
+			    host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+				host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+			break;
+
+		/* print per-iteration LL/DP module scheduling timeline */
+		case 'T':
+			tp->sched_trace_limit = atoi(optarg);
+			if (tp->sched_trace_limit <= 0)
+				tp->sched_trace_limit = 64;
+			break;
+
 		/* print usage */
 		case 'h':
 			print_usage(argv[0]);
@@ -237,6 +511,40 @@ static int parse_input_args(int argc, char **argv, struct testbench_prm *tp)
 			return ret;
 	}
 
+	/* Apply platform preset first, then explicit -N / -m / -F overrides regardless of order */
+	if (opt_preset) {
+		if (host_platform_apply_preset(opt_preset) < 0) {
+			fprintf(stderr, "Error: unknown platform preset '%s' (use -A list)\n",
+				opt_preset);
+			return -EINVAL;
+		}
+		if (!w_explicit_off && host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+			host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+	}
+
+	if (opt_cores) {
+		int nc = atoi(opt_cores);
+
+		if (nc < 1 || nc > TB_TELEM_MAX_CORES ||
+		    host_platform_set_core_count((uint32_t)nc) < 0) {
+			fprintf(stderr, "Error: core count (-N) must be between 1 and %d\n",
+				TB_TELEM_MAX_CORES);
+			return -EINVAL;
+		}
+	}
+
+	if (opt_mem) {
+		ret = parse_mem_cfg_arg(opt_mem);
+		if (ret < 0)
+			return ret;
+	}
+
+	if (opt_freq) {
+		parse_core_freq_arg(opt_freq);
+		if (!w_explicit_off && host_workload_sim_get_mode() == HOST_WORKLOAD_SIM_OFF)
+			host_workload_sim_set_mode(HOST_WORKLOAD_SIM_VIRTUAL);
+	}
+
 	return ret;
 }
 
@@ -295,7 +603,8 @@ static void test_pipeline_stats(struct testbench_prm *tp, long long delta_t,
 	printf("\n");
 	if (tp->total_cycles) {
 		pipeline_cycles = tp->total_cycles - file_cycles;
-		pipeline_mcps = (float)pipeline_cycles * tp->fs_out / frames_out / 1e6;
+		pipeline_mcps = frames_out > 0 ?
+				((float)pipeline_cycles * tp->fs_out / frames_out / 1e6) : 0.0f;
 		if (tb_check_trace(LOG_LEVEL_DEBUG))
 			printf("Warning: Use -d 3 or smaller value to avoid traces to increase MCPS.\n");
 
@@ -308,6 +617,270 @@ static void test_pipeline_stats(struct testbench_prm *tp, long long delta_t,
 	if (delta_t)
 		printf("Total execution time: %lld us, %.2f x realtime\n\n", delta_t,
 		       (float)frames_out / tp->fs_out * 1000000 / delta_t);
+
+	/* Print Per-Core, Per-Pipeline, and Per-Module (LL + DP + Buffer) Telemetry */
+	{
+		struct host_sched_telemetry *st = host_telem_get();
+		uint32_t u;
+
+		if (st && (st->num_pipes > 0 || st->num_mods > 0)) {
+			const char *mode_str =
+				(st->sim_cfg.mode == HOST_WORKLOAD_SIM_REALTIME) ? "REALTIME-PACED" :
+				(st->sim_cfg.mode == HOST_WORKLOAD_SIM_VIRTUAL)  ? "VIRTUAL-SIM" :
+										   "HOST-MEASURED";
+			const char *mem_str =
+				(st->sim_cfg.default_mem_domain == HOST_MEM_DOMAIN_DRAM) ? "DRAM" :
+											   "SRAM";
+
+			printf("--- Per-Core LL & DP Scheduler Telemetry [Platform=%s Cores=%u HPSRAM=%zu/%zuKB LPSRAM=%zu/%zuKB Mode=%s Mem=%s DRAM_Factor=%u.%02ux] ---\n",
+			       st->hw_cfg.platform_name,
+			       st->hw_cfg.num_cores,
+			       st->hw_cfg.hpsram_peak_bytes / 1024UL,
+			       st->hw_cfg.hpsram_size_bytes / 1024UL,
+			       st->hw_cfg.lpsram_peak_bytes / 1024UL,
+			       st->hw_cfg.lpsram_size_bytes / 1024UL,
+			       mode_str, mem_str,
+			       st->sim_cfg.dram_factor_x100 / 100,
+			       st->sim_cfg.dram_factor_x100 % 100);
+			for (u = 0; u < st->hw_cfg.num_cores && u < TB_TELEM_MAX_CORES; u++) {
+				struct host_core_telem *ct = &st->cores[u];
+
+				if (!ct->active)
+					continue;
+				printf("  Core %u (%u.%03u MHz): util=%u.%02u%% overruns=%u | LL: ticks=%u tasks=%u avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus | DP: runs=%u thr=%u avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus\n",
+				       u, ct->freq_hz / 1000000U,
+				       (ct->freq_hz % 1000000U) / 1000U,
+				       ct->total_util_x100 / 100, ct->total_util_x100 % 100,
+				       ct->ll_deadline_violations,
+				       ct->ll_tick_count, ct->ll_active_tasks,
+				       (unsigned long long)ct->ll_avg_cycles,
+				       (unsigned long long)ct->ll_peak_cycles,
+				       (unsigned long long)ct->ll_total_cycles,
+				       ct->ll_avg_kcps, ct->ll_peak_kcps,
+				       (unsigned long long)(ct->ll_avg_exec_ns / 1000ULL),
+				       (unsigned long long)(ct->ll_avg_exec_ns % 1000ULL),
+				       (unsigned long long)(ct->ll_peak_exec_ns / 1000ULL),
+				       (unsigned long long)(ct->ll_peak_exec_ns % 1000ULL),
+				       ct->dp_run_count, ct->dp_active_threads,
+				       (unsigned long long)ct->dp_avg_cycles,
+				       (unsigned long long)ct->dp_peak_cycles,
+				       (unsigned long long)ct->dp_total_cycles,
+				       ct->dp_avg_kcps, ct->dp_peak_kcps,
+				       (unsigned long long)(ct->dp_avg_exec_ns / 1000ULL),
+				       (unsigned long long)(ct->dp_avg_exec_ns % 1000ULL),
+				       (unsigned long long)(ct->dp_peak_exec_ns / 1000ULL),
+				       (unsigned long long)(ct->dp_peak_exec_ns % 1000ULL));
+			}
+
+			printf("\n--- Per-Pipeline Scheduling Telemetry (%u active) ---\n",
+			       st->num_pipes);
+			for (u = 0; u < st->num_pipes; u++) {
+				struct host_pipe_telem *pt = &st->pipes[u];
+
+				if (!pt->active)
+					continue;
+				printf("  Pipe %2u: core=%u prio=%u per=%uus mem=%s mods=%uLL/%uDP copies=%llu avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus xruns=%u\n",
+				       pt->pipeline_id, pt->core_id, pt->priority, pt->period_us,
+				       pt->mem_domain == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+				       pt->num_ll_modules, pt->num_dp_modules,
+				       (unsigned long long)pt->copy_iterations,
+				       (unsigned long long)pt->avg_cycles,
+				       (unsigned long long)pt->peak_cycles,
+				       (unsigned long long)pt->total_cycles,
+				       pt->avg_kcps, pt->peak_kcps,
+				       (unsigned long long)(pt->avg_exec_ns / 1000ULL),
+				       (unsigned long long)(pt->avg_exec_ns % 1000ULL),
+				       (unsigned long long)(pt->peak_exec_ns / 1000ULL),
+				       (unsigned long long)(pt->peak_exec_ns % 1000ULL),
+				       pt->xrun_count);
+			}
+
+			printf("\n--- Per-Module LL & DP Scheduling + Entry/Exit Buffer Telemetry (%u active) ---\n",
+			       st->num_mods);
+			for (u = 0; u < st->num_mods; u++) {
+				struct host_mod_telem *mt = &st->mods[u];
+				const char *wname = "comp";
+
+				if (!mt->active)
+					continue;
+
+				if (tp->widget_list.next) {
+					struct list_item *it;
+
+					list_for_item(it, &tp->widget_list) {
+						struct tplg_comp_info *ci =
+							container_of(it, struct tplg_comp_info, item);
+						uint32_t cid = (uint32_t)IPC4_COMP_ID(ci->module_id,
+										      ci->instance_id);
+						if (cid == mt->comp_id) {
+							if (ci->name)
+								wname = ci->name;
+							break;
+						}
+					}
+				} else if (tp->info) {
+					int k;
+
+					for (k = 0; k < tp->info_elems; k++) {
+						uint32_t cid = (uint32_t)IPC4_COMP_ID(
+							tp->info[k].module_id,
+							tp->info[k].instance_id);
+						if (cid == mt->comp_id) {
+							if (tp->info[k].name)
+								wname = tp->info[k].name;
+							break;
+						}
+					}
+				}
+
+				printf("  [0x%06x %-24s] pipe=%u core=%u %s mem=%s iters=%llu avg=%llu peak=%llu tot=%llu cyc (%u/%u kcps) exec=%llu.%03llu/%llu.%03lluus last=%llu.%03llu->%llu.%03lluus(dl=%llu.%03lluus) ibs=%u obs=%u cpc=%u(viol=%u)",
+				       mt->comp_id, wname, mt->pipeline_id, mt->core_id,
+				       mt->proc_domain == COMP_PROCESSING_DOMAIN_DP ? "DP" : "LL",
+				       mt->mem_domain == HOST_MEM_DOMAIN_DRAM ? "DRAM" : "SRAM",
+				       (unsigned long long)mt->iterations,
+				       (unsigned long long)mt->avg_cycles,
+				       (unsigned long long)mt->peak_cycles,
+				       (unsigned long long)mt->total_cycles,
+				       mt->avg_kcps, mt->peak_kcps,
+				       (unsigned long long)(mt->avg_exec_ns / 1000ULL),
+				       (unsigned long long)(mt->avg_exec_ns % 1000ULL),
+				       (unsigned long long)(mt->peak_exec_ns / 1000ULL),
+				       (unsigned long long)(mt->peak_exec_ns % 1000ULL),
+				       (unsigned long long)(mt->last_start_ns / 1000ULL),
+				       (unsigned long long)(mt->last_start_ns % 1000ULL),
+				       (unsigned long long)(mt->last_complete_ns / 1000ULL),
+				       (unsigned long long)(mt->last_complete_ns % 1000ULL),
+				       (unsigned long long)(mt->last_deadline_ns / 1000ULL),
+				       (unsigned long long)(mt->last_deadline_ns % 1000ULL),
+				       mt->ibs, mt->obs, mt->effective_cpc, mt->cpc_violations);
+				if (mt->proc_domain == COMP_PROCESSING_DOMAIN_DP) {
+					printf(" ll_sync=%llu(%llu cyc)",
+					       (unsigned long long)mt->ll_ring_sync_iterations,
+					       (unsigned long long)mt->ll_ring_sync_total_cycles);
+				}
+				if (mt->num_in_pins > 0 && mt->in_pins[0].active) {
+					struct host_mod_pin_telem *pin = &mt->in_pins[0];
+
+					printf(" | IN0: %u->%uB xfer=%uB(tot=%lluB) rms=%d.%02ddBFS",
+					       pin->dp_ring_size ? pin->dp_ring_entry_avail :
+								   pin->entry_avail_bytes,
+					       pin->dp_ring_size ? pin->dp_ring_exit_avail :
+								   pin->exit_avail_bytes,
+					       pin->last_bytes_transferred,
+					       (unsigned long long)pin->total_bytes_transferred,
+					       pin->entry_rms_dbfs_x100 / 100,
+					       abs(pin->entry_rms_dbfs_x100 % 100));
+				}
+				if (mt->num_out_pins > 0 && mt->out_pins[0].active) {
+					struct host_mod_pin_telem *pin = &mt->out_pins[0];
+
+					printf(" | OUT0: %u->%uB xfer=%uB(tot=%lluB) rms=%d.%02ddBFS",
+					       pin->dp_ring_size ? pin->dp_ring_entry_avail :
+								   pin->entry_avail_bytes,
+					       pin->dp_ring_size ? pin->dp_ring_exit_avail :
+								   pin->exit_avail_bytes,
+					       pin->last_bytes_transferred,
+					       (unsigned long long)pin->total_bytes_transferred,
+					       pin->exit_rms_dbfs_x100 / 100,
+					       abs(pin->exit_rms_dbfs_x100 % 100));
+				}
+				printf("\n");
+			}
+			printf("\n");
+
+			if (tp->sched_trace_limit > 0 && st->trace_count > 0) {
+				uint32_t max_ev = (uint32_t)tp->sched_trace_limit;
+				struct host_sched_trace_event *ev_buf;
+				uint64_t total_ev = st->trace_total_events;
+				uint32_t avail_ev = st->trace_count;
+				uint32_t n_ev, e;
+
+				if (max_ev > TB_TELEM_TRACE_CAPACITY)
+					max_ev = TB_TELEM_TRACE_CAPACITY;
+				ev_buf = calloc(max_ev, sizeof(*ev_buf));
+				if (ev_buf) {
+					n_ev = host_telem_trace_read(ev_buf, max_ev, 0,
+								     -1, -1, -1, -1);
+					printf("--- Per-Iteration LL & DP Module Scheduling Timeline (showing %u of %llu events, ring=%u) ---\n",
+					       n_ev, (unsigned long long)total_ev, avail_ev);
+					printf("  %-5s %-5s %-5s %-4s %-4s %-7s %-32s %12s %12s %10s %12s %21s %13s %11s\n",
+					       "Seq", "Tick", "Iter", "Core", "Pipe", "Domain",
+					       "Module", "Start(us)", "Complete(us)", "Dur(us)",
+					       "Deadline(us)", "Start->End(cyc)", "Cyc/Budget",
+					       "In->Out(B)");
+					for (e = 0; e < n_ev; e++) {
+						struct host_sched_trace_event *ev = &ev_buf[e];
+						const char *ename = "comp";
+						const char *dom =
+							(ev->event_type == HOST_SCHED_EVT_DP_RUN) ? "DP-RUN" :
+							(ev->event_type == HOST_SCHED_EVT_DP_SYNC) ? "DP-SYNC" :
+												     "LL-COPY";
+						uint64_t dur_ns = (ev->complete_ns >= ev->start_ns) ?
+								  (ev->complete_ns - ev->start_ns) : 0;
+						char mod_col[48];
+						char cyc_col[48];
+						char bud_col[32];
+						char io_col[32];
+
+						if (tp->widget_list.next) {
+							struct list_item *it;
+
+							list_for_item(it, &tp->widget_list) {
+								struct tplg_comp_info *ci =
+									container_of(it, struct tplg_comp_info, item);
+								uint32_t cid = (uint32_t)IPC4_COMP_ID(
+									ci->module_id, ci->instance_id);
+								if (cid == ev->comp_id) {
+									if (ci->name)
+										ename = ci->name;
+									break;
+								}
+							}
+						} else if (tp->info) {
+							int k;
+
+							for (k = 0; k < tp->info_elems; k++) {
+								uint32_t cid = (uint32_t)IPC4_COMP_ID(
+									tp->info[k].module_id,
+									tp->info[k].instance_id);
+								if (cid == ev->comp_id) {
+									if (tp->info[k].name)
+										ename = tp->info[k].name;
+									break;
+								}
+							}
+						}
+
+						snprintf(mod_col, sizeof(mod_col), "0x%06x %.22s",
+							 ev->comp_id, ename);
+						snprintf(cyc_col, sizeof(cyc_col), "%llu->%llu",
+							 (unsigned long long)ev->start_cycles,
+							 (unsigned long long)ev->complete_cycles);
+						snprintf(bud_col, sizeof(bud_col), "%u/%u%s",
+							 ev->duration_cycles, ev->cpc_budget,
+							 ev->cpc_violation ? "!" : "");
+						snprintf(io_col, sizeof(io_col), "%u->%u",
+							 ev->bytes_in, ev->bytes_out);
+
+						printf("  %-5u %-5u %-5u C%-3u P%-3u %-7s %-32s %8llu.%03llu %8llu.%03llu %6llu.%03llu %8llu.%03llu %21s %13s %11s\n",
+						       ev->seq_id, ev->ll_tick_nr, ev->mod_iter_nr,
+						       ev->core_id, ev->pipeline_id, dom, mod_col,
+						       (unsigned long long)(ev->start_ns / 1000ULL),
+						       (unsigned long long)(ev->start_ns % 1000ULL),
+						       (unsigned long long)(ev->complete_ns / 1000ULL),
+						       (unsigned long long)(ev->complete_ns % 1000ULL),
+						       (unsigned long long)(dur_ns / 1000ULL),
+						       (unsigned long long)(dur_ns % 1000ULL),
+						       (unsigned long long)(ev->deadline_ns / 1000ULL),
+						       (unsigned long long)(ev->deadline_ns % 1000ULL),
+						       cyc_col, bud_col, io_col);
+					}
+					printf("\n");
+					free(ev_buf);
+				}
+			}
+		}
+	}
 }
 
 /*
@@ -317,13 +890,11 @@ static void test_pipeline_stats(struct testbench_prm *tp, long long delta_t,
 static int pipline_test(struct testbench_prm *tp)
 {
 	struct tb_heap_usage_record heap_usage_records[TB_NUM_WIDGETS_SUPPORTED];
-	struct file_state *out_stat;
 	struct timespec td0 = {0}, td1 = {0};
 	long long delta_t = 0;
 	int64_t next_control_ns;
 	int64_t time_ns;
-	float samples_to_ns;
-	int err;
+	int err = 0;
 	int heap_usage_records_count = 0;
 	int dp_count = 0;
 
@@ -337,35 +908,49 @@ static int pipline_test(struct testbench_prm *tp)
 		printf("		           Test Start %d\n", dp_count);
 		printf("==========================================================\n");
 
-		err = tb_load_topology(tp);
-		if (err < 0) {
-			fprintf(stderr, "error: topology load %d failed %d\n", dp_count, err);
-			break;
-		}
+		host_telem_reset();
 
-		err = tb_set_up_all_pipelines(tp);
-		if (err < 0) {
-			fprintf(stderr, "error: pipelines set up %d failed %d\n", dp_count, err);
-			break;
+		if (tp->tplg_file) {
+			err = tb_load_topology(tp);
+			if (err < 0) {
+				fprintf(stderr, "error: topology load %d failed %d\n", dp_count, err);
+				break;
+			}
+
+			err = tb_set_up_all_pipelines(tp);
+			if (err < 0) {
+				fprintf(stderr, "error: pipelines set up %d failed %d\n", dp_count, err);
+				break;
+			}
+
+			err = tb_set_running_state(tp);
+			if (err < 0) {
+				fprintf(stderr, "error: pipelines state set %d failed %d\n", dp_count, err);
+				break;
+			}
+
+			err = tb_find_file_components(tp); /* Track file comp status during copying */
+			if (err < 0) {
+				fprintf(stderr, "error: file component find failed %d\n", err);
+				break;
+			}
 		}
 
-		err = tb_set_running_state(tp);
-		if (err < 0) {
-			fprintf(stderr, "error: pipelines state set %d failed %d\n", dp_count, err);
-			break;
+		if (tp->server_port > 0) {
+			err = tb_remote_server_start(tp);
+			if (err < 0) {
+				fprintf(stderr, "error: remote server start failed %d\n", err);
+				break;
+			}
 		}
 
-		err = tb_find_file_components(tp); /* Track file comp status during copying */
-		if (err < 0) {
-			fprintf(stderr, "error: file component find failed %d\n", err);
+		if (!tp->fw[0].state && !tp->server_wait) {
+			fprintf(stderr, "error: no active output file component found\n");
+			tb_remote_server_stop();
 			break;
 		}
-
-		/* Use first file writer to create simulation time. Calculate coefficient
-		 * to calculate current time from file write samples count
-		 */
-		out_stat = tp->fw[0].state;
-		samples_to_ns = 1.0e9 / ((float)out_stat->channels * out_stat->rate);
+		tp->has_output_file = (tp->fw[0].state != NULL);
+		tp->last_output_time_ns = 0;
 
 		/* Apply initial controls time to call again controls handler */
 		err = tb_read_controls(tp, &next_control_ns);
@@ -385,8 +970,8 @@ static int pipline_test(struct testbench_prm *tp)
 			if (tb_schedule_pipeline_check_state(tp))
 				break;
 
-			if (next_control_ns) {
-				time_ns = (int64_t)(samples_to_ns * out_stat->n);
+			if (next_control_ns && tp->has_output_file) {
+				time_ns = tp->last_output_time_ns;
 				if (time_ns >= next_control_ns) {
 					err = tb_read_controls(tp, &next_control_ns);
 					if (err) {
@@ -401,33 +986,41 @@ static int pipline_test(struct testbench_prm *tp)
 			}
 		}
 
-		tb_schedule_pipeline_check_state(tp); /* Once more to flush out remaining data */
+		if (!tp->server_wait)
+			tb_schedule_pipeline_check_state(tp); /* Once more to flush out remaining data */
 		tb_gettime(&td1);
 		delta_t = (td1.tv_sec - td0.tv_sec) * 1000000;
 		delta_t += (td1.tv_nsec - td0.tv_nsec) / 1000;
 		tb_collect_heap_usage(tp, heap_usage_records, &heap_usage_records_count);
 
 out:
-		err = tb_set_reset_state(tp);
-		if (err < 0) {
-			fprintf(stderr, "error: pipeline reset %d failed %d\n",
-				dp_count, err);
-			break;
-		}
+		if (tp->server_port > 0)
+			tb_remote_server_stop();
 
-		test_pipeline_stats(tp, delta_t, heap_usage_records, heap_usage_records_count);
+		if (tp->tplg_file) {
+			test_pipeline_stats(tp, delta_t, heap_usage_records,
+					    heap_usage_records_count);
 
-		err = tb_free_all_pipelines(tp);
-		if (err < 0) {
-			fprintf(stderr, "error: free pipelines %d failed %d\n", dp_count, err);
-			break;
-		}
+			err = tb_set_reset_state(tp);
+			if (err < 0) {
+				fprintf(stderr, "error: pipeline reset %d failed %d\n",
+					dp_count, err);
+				break;
+			}
 
-		tb_free_topology(tp);
+			err = tb_free_all_pipelines(tp);
+			if (err < 0) {
+				fprintf(stderr, "error: free pipelines %d failed %d\n",
+					dp_count, err);
+				break;
+			}
+
+			tb_free_topology(tp);
+		}
 		dp_count++;
 	}
 
-	return 0;
+	return err < 0 ? err : 0;
 }
 
 int main(int argc, char **argv)
@@ -439,6 +1032,15 @@ int main(int argc, char **argv)
 	if (!tp)
 		return EXIT_FAILURE;
 
+	list_init(&tp->widget_list);
+	list_init(&tp->route_list);
+	list_init(&tp->pcm_list);
+	list_init(&tp->pipeline_list);
+	for (i = 0; i < TB_MAX_INPUT_FILE_NUM; i++)
+		tp->fr[i].id = -1;
+	for (i = 0; i < TB_MAX_OUTPUT_FILE_NUM; i++)
+		tp->fw[i].id = -1;
+
 	/* initialize input and output sample rates, files, etc. */
 	tp->channels_in = TESTBENCH_NCH;
 	tp->copy_check = false;
@@ -457,11 +1059,73 @@ int main(int argc, char **argv)
 	if (!tp->channels_out)
 		tp->channels_out = tp->channels_in;
 
+	if (tp->server_port > 0) {
+#if !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+		snprintf(tp->server_tmp_dir, sizeof(tp->server_tmp_dir), "/tmp/sof-tb-XXXXXX");
+		if (!mkdtemp(tp->server_tmp_dir)) {
+			perror("mkdtemp");
+			ret = EXIT_FAILURE;
+			goto out;
+		}
+#endif
+		if (!tp->fs_in)
+			tp->fs_in = 48000;
+		if (!tp->bits_in) {
+			tp->bits_in = strdup("S16_LE");
+			tp->frame_fmt = tplg_find_format(tp->bits_in);
+		}
+		if (!tp->input_file_num) {
+			char in_path[128];
+			FILE *sfp;
+
+			snprintf(in_path, sizeof(in_path), "%s/srv_in.raw",
+				 tp->server_tmp_dir[0] ? tp->server_tmp_dir : "/tmp");
+			sfp = fopen(in_path, "wb");
+			if (sfp) {
+				int16_t wave[1920];
+				int s;
+
+				for (s = 0; s < 1920; s += 2) {
+					/* 1 kHz sine wave at 48 kHz (48-sample period) */
+					static const int16_t lut48[12] = {
+						0, 2129, 4186, 6103, 7812, 9256,
+						10386, 11163, 11560, 11560, 11163, 10386
+					};
+					int idx = (s / 2) % 48;
+					int q = idx / 12;
+					int pos = idx % 12;
+					int16_t v = (q == 0) ? lut48[pos] :
+						    (q == 1) ? lut48[11 - pos] :
+						    (q == 2) ? -lut48[pos] : -lut48[11 - pos];
+
+					wave[s] = v;
+					wave[s + 1] = v;
+				}
+				for (i = 0; i < 20; i++)
+					fwrite(wave, 1, sizeof(wave), sfp);
+				fclose(sfp);
+			}
+			for (i = 0; i < TB_MAX_INPUT_FILE_NUM; i++)
+				tp->input_file[i] = strdup(in_path);
+			tp->input_file_num = TB_MAX_INPUT_FILE_NUM;
+		}
+		if (!tp->output_file_num) {
+			for (i = 0; i < TB_MAX_OUTPUT_FILE_NUM; i++) {
+				char path[128];
+
+				snprintf(path, sizeof(path), "%s/srv_out_%d.raw",
+					 tp->server_tmp_dir[0] ? tp->server_tmp_dir : "/tmp", i);
+				tp->output_file[i] = strdup(path);
+			}
+			tp->output_file_num = TB_MAX_OUTPUT_FILE_NUM;
+		}
+	}
+
 	if (!tp->fs_out)
 		tp->fs_out = tp->fs_in;
 
 	/* check mandatory args */
-	if (!tp->tplg_file) {
+	if (!tp->tplg_file && tp->server_port <= 0) {
 		fprintf(stderr, "topology file not specified, use -t file.tplg\n");
 		print_usage(argv[0]);
 		ret = EXIT_FAILURE;
@@ -507,11 +1171,10 @@ int main(int argc, char **argv)
 	}
 
 	/* build, run and teardown pipelines */
-	pipline_test(tp);
+	ret = pipline_test(tp) < 0 ? EXIT_FAILURE : EXIT_SUCCESS;
 
 	/* free other core FW services */
 	tb_free(sof_get());
-	ret = EXIT_SUCCESS;
 
 out:
 	/* free all other data */
@@ -527,6 +1190,24 @@ int main(int argc, char **argv)
 	for (i = 0; i < tp->input_file_num; i++)
 		free(tp->input_file[i]);
 
+#if !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
+	if (tp->server_tmp_dir[0]) {
+		char path[128];
+
+		snprintf(path, sizeof(path), "%s/srv_in.raw", tp->server_tmp_dir);
+		unlink(path);
+		for (i = 0; i < TB_MAX_OUTPUT_FILE_NUM; i++) {
+			snprintf(path, sizeof(path), "%s/srv_out_%d.raw", tp->server_tmp_dir, i);
+			unlink(path);
+		}
+		for (i = 0; i <= 16; i++) {
+			snprintf(path, sizeof(path), "%s/llext_%d.so", tp->server_tmp_dir, i);
+			unlink(path);
+		}
+		rmdir(tp->server_tmp_dir);
+	}
+#endif
+
 	free(tp->pipeline_string);
 	free(tp);
 	return ret;
diff --git a/tools/testbench/topology_ipc4.c b/tools/testbench/topology_ipc4.c
index 02dd66346bbd..1d0939fb1945 100644
--- a/tools/testbench/topology_ipc4.c
+++ b/tools/testbench/topology_ipc4.c
@@ -35,6 +35,24 @@
 static const struct sof_topology_token ipc4_comp_tokens[] = {
 	{SOF_TKN_COMP_IS_PAGES, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
 		offsetof(struct ipc4_base_module_cfg, is_pages)},
+	{SOF_TKN_COMP_CPC, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
+		offsetof(struct ipc4_base_module_cfg, cpc)},
+};
+
+static const struct sof_topology_token ipc4_comp_sched_domain_tokens[] = {
+	{SOF_TKN_COMP_SCHED_DOMAIN, SND_SOC_TPLG_TUPLE_TYPE_STRING, tplg_token_get_comp_domain,
+		offsetof(struct tplg_comp_info, proc_domain)},
+};
+
+static const struct sof_topology_token ipc4_comp_domain_word_tokens[] = {
+	{SOF_TKN_COMP_CORE_ID, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
+		offsetof(struct tplg_comp_info, core_id)},
+	{SOF_TKN_COMP_DOMAIN_ID, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
+		offsetof(struct tplg_comp_info, domain_id)},
+	{SOF_TKN_COMP_STACK_BYTES, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
+		offsetof(struct tplg_comp_info, stack_bytes)},
+	{SOF_TKN_COMP_HEAP_BYTES, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
+		offsetof(struct tplg_comp_info, heap_bytes)},
 };
 
 /*
@@ -74,6 +92,55 @@ static int tb_mq_cmd_tx_rx(struct tb_mq_desc *ipc_tx, struct tb_mq_desc *ipc_rx,
 	return 0;
 }
 
+static uint32_t tb_default_cpc_for_widget_name(const char *name, uint32_t proc_domain)
+{
+	if (!name)
+		return (proc_domain == COMP_PROCESSING_DOMAIN_DP) ? 48000 : 12000;
+	if (strncmp(name, "host-copier", 11) == 0 ||
+	    strncmp(name, "dai-copier", 10) == 0 ||
+	    strncmp(name, "module-copier", 13) == 0 ||
+	    strncmp(name, "alh-dai-copier", 14) == 0)
+		return 1647;
+	if (strncmp(name, "gain", 4) == 0 || strncmp(name, "volume", 6) == 0)
+		return 10183;
+	if (strncmp(name, "mixin", 5) == 0)
+		return 910;
+	if (strncmp(name, "mixout", 6) == 0)
+		return 5000;
+	if (strncmp(name, "eqiir", 5) == 0 || strncmp(name, "eq-iir", 6) == 0)
+		return 18500;
+	if (strncmp(name, "eqfir", 5) == 0 || strncmp(name, "eq-fir", 6) == 0)
+		return 26000;
+	if (strncmp(name, "src", 3) == 0)
+		return 24000;
+	if (strncmp(name, "asrc", 4) == 0)
+		return 32000;
+	if (strncmp(name, "multiband_drc", 13) == 0)
+		return 48000;
+	if (strncmp(name, "drc", 3) == 0)
+		return 22000;
+	if (strncmp(name, "tdfb", 4) == 0)
+		return 35000;
+	if (strncmp(name, "crossover", 9) == 0)
+		return 16000;
+	if (strncmp(name, "dcblock", 7) == 0)
+		return 6400;
+	if (strncmp(name, "micsel", 6) == 0 || strncmp(name, "mux", 3) == 0 ||
+	    strncmp(name, "demux", 5) == 0)
+		return 29000;
+	if (strncmp(name, "aria", 4) == 0)
+		return 5000;
+	if (strncmp(name, "stft", 4) == 0)
+		return 64000;
+	if (strncmp(name, "mfcc", 4) == 0)
+		return 42000;
+	if (strncmp(name, "kpb", 3) == 0)
+		return 3500;
+	if (strncmp(name, "smart_amp", 9) == 0)
+		return 38000;
+	return (proc_domain == COMP_PROCESSING_DOMAIN_DP) ? 48000 : 12000;
+}
+
 static int tb_parse_ipc4_comp_tokens(struct testbench_prm *tp,
 				     struct ipc4_base_module_cfg *base_cfg)
 {
@@ -88,6 +155,20 @@ static int tb_parse_ipc4_comp_tokens(struct testbench_prm *tp,
 	if (ret < 0)
 		return ret;
 
+	ret = sof_parse_token_sets(comp_info, ipc4_comp_sched_domain_tokens,
+				   ARRAY_SIZE(ipc4_comp_sched_domain_tokens), array, size, 1, 0);
+	if (ret < 0)
+		return ret;
+
+	ret = sof_parse_token_sets(comp_info, ipc4_comp_domain_word_tokens,
+				   ARRAY_SIZE(ipc4_comp_domain_word_tokens), array, size, 1, 0);
+	if (ret < 0)
+		return ret;
+
+	if (base_cfg->cpc == 0)
+		base_cfg->cpc = tb_default_cpc_for_widget_name(comp_info->name,
+							       comp_info->proc_domain);
+
 	return sof_parse_tokens(&comp_info->uuid, comp_ext_tokens,
 			       ARRAY_SIZE(comp_ext_tokens), array, size);
 }
@@ -101,6 +182,8 @@ static void tb_setup_widget_ipc_msg(struct tplg_comp_info *comp_info)
 	module_init->primary.r.instance_id = comp_info->instance_id;
 	module_init->primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_MODULE_MSG;
 	module_init->primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+	module_init->extension.r.proc_domain = comp_info->proc_domain;
+	module_init->extension.r.core_id = comp_info->core_id;
 }
 
 int tb_set_up_widget_ipc(struct testbench_prm *tp, struct tplg_comp_info *comp_info)
@@ -113,6 +196,7 @@ int tb_set_up_widget_ipc(struct testbench_prm *tp, struct tplg_comp_info *comp_i
 
 	module_init->extension.r.param_block_size = comp_info->ipc_size >> 2;
 	module_init->extension.r.ppl_instance_id = comp_info->pipe_info->instance_id;
+	module_init->extension.r.core_id = comp_info->core_id;
 
 	size = sizeof(*module_init) + comp_info->ipc_size;
 	msg = calloc(size, 1);
@@ -137,14 +221,135 @@ int tb_set_up_widget_ipc(struct testbench_prm *tp, struct tplg_comp_info *comp_i
 	return 0;
 }
 
+static int tb_get_queue_id(struct tplg_comp_info *comp_info,
+			   struct tplg_comp_info *buddy_comp_info, bool is_output)
+{
+	struct tplg_pins_info *pins = &comp_info->pins_info;
+	uint32_t num_pins = is_output ? pins->num_output_pins : pins->num_input_pins;
+	char **pin_binding = is_output ? pins->output_pin_binding : pins->input_pin_binding;
+	uint32_t *pin_mask = is_output ? &pins->output_pin_mask : &pins->input_pin_mask;
+	int i;
+
+	if (num_pins <= 1)
+		return 0;
+
+	if (pin_binding && pin_binding[0] &&
+	    strncmp(pin_binding[0], "NotConnected", strlen("NotConnected"))) {
+		for (i = 0; i < num_pins; i++) {
+			if (pin_binding[i] && !strcmp(pin_binding[i], buddy_comp_info->name)) {
+				*pin_mask |= BIT(i);
+				return i;
+			}
+		}
+	}
+
+	for (i = 0; i < SOF_WIDGET_MAX_NUM_PINS; i++) {
+		if (!(*pin_mask & BIT(i))) {
+			*pin_mask |= BIT(i);
+			return i;
+		}
+	}
+
+	fprintf(stderr, "error: no free %s queue ID for %s\n",
+		is_output ? "output" : "input", comp_info->name);
+	return -EINVAL;
+}
+
+static void tb_put_queue_id(struct tplg_comp_info *comp_info, int queue_id, bool is_output)
+{
+	struct tplg_pins_info *pins = &comp_info->pins_info;
+	uint32_t *pin_mask = is_output ? &pins->output_pin_mask : &pins->input_pin_mask;
+
+	if (queue_id >= 0 && queue_id < SOF_WIDGET_MAX_NUM_PINS)
+		*pin_mask &= ~BIT(queue_id);
+}
+
+static void tb_copy_audio_format(struct ipc4_audio_format *dst,
+				 const struct sof_ipc4_audio_format *src);
+static struct sof_ipc4_pin_format *tb_find_pin_format(struct sof_ipc4_pin_format *fmts,
+						      uint32_t num_formats, uint32_t pin_index,
+						      uint32_t target_rate,
+						      uint32_t target_channels,
+						      uint32_t target_valid_bits);
+
+static int tb_copier_set_sink_format(struct testbench_prm *tp,
+				     struct tplg_comp_info *src_comp_info, int sink_id)
+{
+	struct {
+		struct ipc4_module_large_config config;
+		struct ipc4_copier_config_set_sink_format sink_fmt;
+	} msg = { 0 };
+	struct ipc4_message_reply reply;
+	struct sof_ipc4_pin_format *pin_fmt;
+	int ret;
+
+	msg.config.primary.r.type = SOF_IPC4_MOD_LARGE_CONFIG_SET;
+	msg.config.primary.r.msg_tgt = SOF_IPC4_MESSAGE_TARGET_MODULE_MSG;
+	msg.config.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
+	msg.config.primary.r.module_id = src_comp_info->module_id;
+	msg.config.primary.r.instance_id = src_comp_info->instance_id;
+	msg.config.extension.r.data_off_size = sizeof(msg.sink_fmt);
+	msg.config.extension.r.large_param_id = IPC4_COPIER_MODULE_CFG_PARAM_SET_SINK_FORMAT;
+	msg.config.extension.r.init_block = 1;
+	msg.config.extension.r.final_block = 1;
+
+	msg.sink_fmt.sink_id = sink_id;
+	msg.sink_fmt.source_fmt = src_comp_info->basecfg.audio_fmt;
+	pin_fmt = tb_find_pin_format(src_comp_info->available_fmt.output_pin_fmts,
+				     src_comp_info->available_fmt.num_output_formats,
+				     (uint32_t)sink_id,
+				     src_comp_info->out_audio_fmt.sampling_frequency,
+				     src_comp_info->out_audio_fmt.channels_count,
+				     src_comp_info->out_audio_fmt.valid_bit_depth);
+	if (pin_fmt)
+		tb_copy_audio_format(&msg.sink_fmt.sink_fmt, &pin_fmt->audio_fmt);
+	else
+		msg.sink_fmt.sink_fmt = src_comp_info->out_audio_fmt;
+
+	ret = tb_mq_cmd_tx_rx(&tp->ipc_tx, &tp->ipc_rx, &msg, sizeof(msg), &reply, sizeof(reply));
+	if (ret < 0 || reply.primary.r.status != IPC4_SUCCESS) {
+		fprintf(stderr, "error: failed to set copier sink format for %s sink %d\n",
+			src_comp_info->name, sink_id);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 int tb_set_up_route(struct testbench_prm *tp, struct tplg_route_info *route_info)
 {
 	struct tplg_comp_info *src_comp_info = route_info->source;
 	struct tplg_comp_info *sink_comp_info = route_info->sink;
 	struct ipc4_module_bind_unbind bu = {{0}};
 	struct ipc4_message_reply reply;
+	int src_queue, dst_queue;
 	int ret;
 
+	if (route_info->set_up)
+		return 0;
+
+	src_queue = tb_get_queue_id(src_comp_info, sink_comp_info, true);
+	if (src_queue < 0)
+		return src_queue;
+
+	dst_queue = tb_get_queue_id(sink_comp_info, src_comp_info, false);
+	if (dst_queue < 0) {
+		tb_put_queue_id(src_comp_info, src_queue, true);
+		return dst_queue;
+	}
+
+	route_info->src_queue_id = src_queue;
+	route_info->dst_queue_id = dst_queue;
+
+	if (src_comp_info->module_id == TB_COPIER_MODULE_ID && src_queue > 0) {
+		ret = tb_copier_set_sink_format(tp, src_comp_info, src_queue);
+		if (ret < 0) {
+			tb_put_queue_id(src_comp_info, src_queue, true);
+			tb_put_queue_id(sink_comp_info, dst_queue, false);
+			return ret;
+		}
+	}
+
 	bu.primary.r.module_id = src_comp_info->module_id;
 	bu.primary.r.instance_id = src_comp_info->instance_id;
 	bu.primary.r.type = SOF_IPC4_MOD_BIND;
@@ -153,25 +358,29 @@ int tb_set_up_route(struct testbench_prm *tp, struct tplg_route_info *route_info
 
 	bu.extension.r.dst_module_id = sink_comp_info->module_id;
 	bu.extension.r.dst_instance_id = sink_comp_info->instance_id;
-
-	/* FIXME: assign queue ID for components with multiple inputs/outputs */
-	bu.extension.r.dst_queue = 0;
-	bu.extension.r.src_queue = 0;
+	bu.extension.r.dst_queue = dst_queue;
+	bu.extension.r.src_queue = src_queue;
 
 	ret = tb_mq_cmd_tx_rx(&tp->ipc_tx, &tp->ipc_rx, &bu, sizeof(bu), &reply, sizeof(reply));
 	if (ret < 0) {
 		fprintf(stderr, "error: can't set up route %s -> %s\n", src_comp_info->name,
 			sink_comp_info->name);
+		tb_put_queue_id(src_comp_info, src_queue, true);
+		tb_put_queue_id(sink_comp_info, dst_queue, false);
 		return ret;
 	}
 
 	if (reply.primary.r.status != IPC4_SUCCESS) {
 		fprintf(stderr, "route %s -> %s ID set up failed with status %d\n",
 			src_comp_info->name, sink_comp_info->name, reply.primary.r.status);
+		tb_put_queue_id(src_comp_info, src_queue, true);
+		tb_put_queue_id(sink_comp_info, dst_queue, false);
 		return -EINVAL;
 	}
 
-	tplg_debug("route %s -> %s set up\n", src_comp_info->name, sink_comp_info->name);
+	route_info->set_up = true;
+	tplg_debug("route %s (q %d) -> %s (q %d) set up\n",
+		   src_comp_info->name, src_queue, sink_comp_info->name, dst_queue);
 
 	return 0;
 }
@@ -187,7 +396,9 @@ int tb_set_up_pipeline(struct testbench_prm *tp, struct tplg_pipeline_info *pipe
 	msg.primary.r.rsp = SOF_IPC4_MESSAGE_DIR_MSG_REQUEST;
 	pipe_info->instance_id = tp->instance_ids[SND_SOC_TPLG_DAPM_SCHEDULER]++;
 	msg.primary.r.instance_id = pipe_info->instance_id;
+	msg.primary.r.ppl_priority = pipe_info->priority;
 	msg.primary.r.ppl_mem_size = pipe_info->mem_usage;
+	msg.extension.r.core_id = pipe_info->core_id;
 	ret = tb_mq_cmd_tx_rx(&tp->ipc_tx, &tp->ipc_rx, &msg, sizeof(msg), &reply, sizeof(reply));
 	if (ret < 0) {
 		fprintf(stderr, "error: can't set up pipeline %s\n", pipe_info->name);
@@ -265,15 +476,95 @@ int tb_is_single_format(struct sof_ipc4_pin_format *fmts, int num_formats)
 	return true;
 }
 
+static void tb_copy_audio_format(struct ipc4_audio_format *dst,
+				 const struct sof_ipc4_audio_format *src)
+{
+	dst->sampling_frequency = src->sampling_frequency;
+	dst->depth = src->bit_depth;
+	dst->ch_map = src->ch_map;
+	dst->ch_cfg = src->ch_cfg;
+	dst->interleaving_style = src->interleaving_style;
+	dst->channels_count = src->fmt_cfg & MASK(7, 0);
+	dst->valid_bit_depth = (src->fmt_cfg & MASK(15, 8)) >> 8;
+	dst->s_type = (src->fmt_cfg & MASK(23, 16)) >> 16;
+}
+
+static struct sof_ipc4_pin_format *tb_find_pin_format(struct sof_ipc4_pin_format *fmts,
+						      uint32_t num_formats, uint32_t pin_index,
+						      uint32_t target_rate,
+						      uint32_t target_channels,
+						      uint32_t target_valid_bits)
+{
+	struct sof_ipc4_pin_format *fmt;
+	int i;
+
+	if (!fmts || !num_formats)
+		return NULL;
+
+	if (pin_index == 0 && tb_is_single_format(fmts, num_formats))
+		return &fmts[0];
+
+	/* 1. Exact match on pin_index, rate, channels, valid_bits */
+	for (i = 0; i < num_formats; i++) {
+		uint32_t rate, channels, valid_bits;
+
+		fmt = &fmts[i];
+		if (fmt->pin_index != pin_index)
+			continue;
+
+		rate = fmt->audio_fmt.sampling_frequency;
+		channels = fmt->audio_fmt.fmt_cfg & MASK(7, 0);
+		valid_bits = (fmt->audio_fmt.fmt_cfg & MASK(15, 8)) >> 8;
+		if (rate == target_rate && channels == target_channels &&
+		    valid_bits == target_valid_bits)
+			return fmt;
+	}
+
+	/* 2. Match on pin_index, rate, channels (when bit depth is converted upstream) */
+	for (i = 0; i < num_formats; i++) {
+		uint32_t rate, channels;
+
+		fmt = &fmts[i];
+		if (fmt->pin_index != pin_index)
+			continue;
+
+		rate = fmt->audio_fmt.sampling_frequency;
+		channels = fmt->audio_fmt.fmt_cfg & MASK(7, 0);
+		if (rate == target_rate && channels == target_channels)
+			return fmt;
+	}
+
+	/* 3. Match on pin_index, channels (when rate is converted upstream) */
+	for (i = 0; i < num_formats; i++) {
+		uint32_t channels;
+
+		fmt = &fmts[i];
+		if (fmt->pin_index != pin_index)
+			continue;
+
+		channels = fmt->audio_fmt.fmt_cfg & MASK(7, 0);
+		if (channels == target_channels)
+			return fmt;
+	}
+
+	/* 4. First format matching pin_index */
+	for (i = 0; i < num_formats; i++) {
+		if (fmts[i].pin_index == pin_index)
+			return &fmts[i];
+	}
+
+	return NULL;
+}
+
 int tb_match_audio_format(struct testbench_prm *tp, struct tplg_comp_info *comp_info,
 			  struct tb_config *config)
 {
 	struct sof_ipc4_available_audio_format *available_fmt = &comp_info->available_fmt;
 	struct ipc4_base_module_cfg *base_cfg = &comp_info->basecfg;
 	struct sof_ipc4_pin_format *fmt;
+	struct sof_ipc4_pin_format *out_fmt = NULL;
 	int config_valid_bits;
 	int sample_bytes;
-	int i;
 
 	switch (config->format) {
 	case SOF_IPC_FRAME_S16_LE:
@@ -289,52 +580,65 @@ int tb_match_audio_format(struct testbench_prm *tp, struct tplg_comp_info *comp_
 		return -EINVAL;
 	}
 
-	if (tb_is_single_format(available_fmt->input_pin_fmts,
-				available_fmt->num_input_formats)) {
-		fmt = &available_fmt->input_pin_fmts[0];
-		goto out;
+	fmt = tb_find_pin_format(available_fmt->input_pin_fmts,
+				 available_fmt->num_input_formats, 0,
+				 config->rate, config->channels, config_valid_bits);
+	if (!fmt) {
+		fprintf(stderr,
+			"Cannot find matching format for rate %d channels %d valid_bits %d for %s\n",
+			config->rate, config->channels, config_valid_bits, comp_info->name);
+		return -EINVAL;
 	}
 
-	for (i = 0; i < available_fmt->num_input_formats; i++) {
-		uint32_t rate, channels, valid_bits;
-
-		fmt = &available_fmt->input_pin_fmts[i];
+	if (available_fmt->num_output_formats > 0) {
+		out_fmt = tb_find_pin_format(available_fmt->output_pin_fmts,
+					     available_fmt->num_output_formats, 0,
+					     config->rate, config->channels, config_valid_bits);
+	}
 
-		rate = fmt->audio_fmt.sampling_frequency;
-		channels = fmt->audio_fmt.fmt_cfg & MASK(7, 0);
-		valid_bits = (fmt->audio_fmt.fmt_cfg & MASK(15, 8)) >> 8;
+	/*
+	 * For capture DAI_OUT (represented by a FILE_READ component in testbench),
+	 * input_pin_fmts describes the hardware DAI link while output_pin_fmts
+	 * describes the SOF pipeline buffer. If output_pin_fmts matches the requested
+	 * testbench format, use it for base_cfg->audio_fmt so the buffer format
+	 * matches the file reader and downstream capture pipeline.
+	 */
+	if (comp_info->type == SND_SOC_TPLG_DAPM_DAI_OUT && out_fmt) {
+		uint32_t out_valid_bits = (out_fmt->audio_fmt.fmt_cfg & MASK(15, 8)) >> 8;
+		uint32_t in_valid_bits = (fmt->audio_fmt.fmt_cfg & MASK(15, 8)) >> 8;
 
-		if (rate == config->rate && channels == config->channels &&
-		    valid_bits == config_valid_bits)
-			break;
+		if (in_valid_bits != config_valid_bits && out_valid_bits == config_valid_bits)
+			fmt = out_fmt;
 	}
 
-	if (i == available_fmt->num_input_formats) {
-		fprintf(stderr,
-			"Cannot find matching format for rate %d channels %d valid_bits %d for %s\n",
-		       config->rate, config->channels, config_valid_bits, comp_info->name);
-		return -EINVAL;
+	tb_copy_audio_format(&base_cfg->audio_fmt, &fmt->audio_fmt);
+	if (fmt->buffer_size > 0) {
+		base_cfg->ibs = fmt->buffer_size;
+	} else {
+		sample_bytes = fmt->audio_fmt.bit_depth >> 3;
+		base_cfg->ibs = 2 * tp->period_frames * base_cfg->audio_fmt.channels_count *
+				sample_bytes;
 	}
-out:
 
-	base_cfg->audio_fmt.sampling_frequency = fmt->audio_fmt.sampling_frequency;
-	base_cfg->audio_fmt.depth = fmt->audio_fmt.bit_depth;
-	base_cfg->audio_fmt.ch_map = fmt->audio_fmt.ch_map;
-	base_cfg->audio_fmt.ch_cfg = fmt->audio_fmt.ch_cfg;
-	base_cfg->audio_fmt.interleaving_style = fmt->audio_fmt.interleaving_style;
-	base_cfg->audio_fmt.channels_count = fmt->audio_fmt.fmt_cfg & MASK(7, 0);
-	base_cfg->audio_fmt.valid_bit_depth =
-		(fmt->audio_fmt.fmt_cfg & MASK(15, 8)) >> 8;
-	base_cfg->audio_fmt.s_type =
-		(fmt->audio_fmt.fmt_cfg & MASK(23, 16)) >> 16;
-	sample_bytes = fmt->audio_fmt.bit_depth >> 3;
-	base_cfg->ibs = 2 * tp->period_frames * base_cfg->audio_fmt.channels_count * sample_bytes;
-	base_cfg->obs = base_cfg->ibs;
+	if (out_fmt) {
+		tb_copy_audio_format(&comp_info->out_audio_fmt, &out_fmt->audio_fmt);
+		if (out_fmt->buffer_size > 0) {
+			base_cfg->obs = out_fmt->buffer_size;
+		} else {
+			sample_bytes = out_fmt->audio_fmt.bit_depth >> 3;
+			base_cfg->obs = 2 * tp->period_frames *
+					comp_info->out_audio_fmt.channels_count * sample_bytes;
+		}
+	} else {
+		comp_info->out_audio_fmt = base_cfg->audio_fmt;
+		base_cfg->obs = base_cfg->ibs;
+	}
 
 	return 0;
 }
 
-static int tb_set_pin_formats(struct tplg_comp_info *comp_info,
+static int tb_set_pin_formats(struct testbench_prm *tp,
+			      struct tplg_comp_info *comp_info,
 			      struct ipc4_base_module_cfg *base_cfg,
 			      struct ipc4_base_module_cfg_ext *base_cfg_ext,
 			      enum tb_pin_type pin_type)
@@ -344,9 +648,10 @@ static int tb_set_pin_formats(struct tplg_comp_info *comp_info,
 	struct sof_ipc4_pin_format *pin_format;
 	struct sof_ipc4_pin_format *base_cfg_ext_pin_formats =
 		(struct sof_ipc4_pin_format *)base_cfg_ext->pin_formats;
+	uint32_t target_rate, target_channels, target_valid_bits;
 	int format_list_count;
 	int num_pins;
-	int i, j;
+	int i;
 	int pin_format_offset = 0;
 
 	switch (pin_type) {
@@ -354,21 +659,30 @@ static int tb_set_pin_formats(struct tplg_comp_info *comp_info,
 		num_pins = base_cfg_ext->nb_input_pins;
 		formats_array = comp_info->available_fmt.input_pin_fmts;
 		format_list_count = comp_info->available_fmt.num_input_formats;
+		target_rate = base_cfg->audio_fmt.sampling_frequency;
+		target_channels = base_cfg->audio_fmt.channels_count;
+		target_valid_bits = base_cfg->audio_fmt.valid_bit_depth;
 		break;
 	case TB_PIN_TYPE_OUTPUT:
 		num_pins = base_cfg_ext->nb_output_pins;
 		pin_format_offset = base_cfg_ext->nb_input_pins;
 		formats_array = comp_info->available_fmt.output_pin_fmts;
 		format_list_count = comp_info->available_fmt.num_output_formats;
+		target_rate = comp_info->out_audio_fmt.sampling_frequency;
+		target_channels = comp_info->out_audio_fmt.channels_count;
+		target_valid_bits = comp_info->out_audio_fmt.valid_bit_depth;
 		break;
 	default:
 		fprintf(stderr, "Error: Illegal pin type %d for %s\n", pin_type, comp_info->name);
+		return -EINVAL;
 	}
 
 	for (i = pin_format_offset; i < num_pins + pin_format_offset; i++) {
+		uint32_t pin_index = i - pin_format_offset;
+
 		pin_format = &base_cfg_ext_pin_formats[i];
 
-		if (i == pin_format_offset) {
+		if (pin_index == 0) {
 			if (pin_type == TB_PIN_TYPE_INPUT) {
 				pin_format->buffer_size = base_cfg->ibs;
 				/* Note: Copy "struct ipc4_audio_format" to
@@ -381,31 +695,29 @@ static int tb_set_pin_formats(struct tplg_comp_info *comp_info,
 				       sizeof(pin_format->audio_fmt));
 			} else {
 				pin_format->buffer_size = base_cfg->obs;
-				/* TODO: Using workaround, need to find out how to do this. This
-				 * is copied kernel function sof_ipc4_process_set_pin_formats()
-				 * from process->output_format. It's set in
-				 * sof_ipc4_prepare_process_module().
-				 */
-				memcpy(&pin_format->audio_fmt, &base_cfg->audio_fmt,
+				memcpy(&pin_format->audio_fmt, &comp_info->out_audio_fmt,
 				       sizeof(pin_format->audio_fmt));
 			}
 			continue;
 		}
 
-		for (j = 0; j < format_list_count; j++) {
-			pin_format_item = &formats_array[j];
-			if (pin_format_item->pin_index == i - pin_format_offset) {
-				*pin_format = *pin_format_item;
-				break;
-			}
-		}
-
-		if (j == format_list_count) {
-			fprintf(stderr, "%s pin %d format not found for %s\n",
+		pin_format_item = tb_find_pin_format(formats_array, format_list_count, pin_index,
+						     target_rate, target_channels,
+						     target_valid_bits);
+		if (!pin_format_item) {
+			fprintf(stderr, "%s pin %u format not found for %s\n",
 				(pin_type == TB_PIN_TYPE_INPUT) ? "input" : "output",
-				i - pin_format_offset, comp_info->name);
+				pin_index, comp_info->name);
 			return -EINVAL;
 		}
+
+		*pin_format = *pin_format_item;
+		if (pin_format->buffer_size == 0) {
+			uint32_t channels = pin_format->audio_fmt.fmt_cfg & MASK(7, 0);
+			uint32_t sample_bytes = pin_format->audio_fmt.bit_depth >> 3;
+
+			pin_format->buffer_size = 2 * tp->period_frames * channels * sample_bytes;
+		}
 	}
 
 	return 0;
@@ -443,17 +755,37 @@ int tb_set_up_widget_base_config(struct testbench_prm *tp, struct tplg_comp_info
 	/* copy the basecfg into the ipc payload */
 	memcpy(comp_info->ipc_payload, &comp_info->basecfg, sizeof(struct ipc4_base_module_cfg));
 
+	if (comp_info->type == SND_SOC_TPLG_DAPM_BUFFER) {
+		struct ipc4_copier_module_cfg *copier = comp_info->ipc_payload;
+
+		copier->out_fmt = comp_info->out_audio_fmt;
+	}
+
+	if (comp_info->type == SND_SOC_TPLG_DAPM_SRC) {
+		struct ipc4_config_src *src = comp_info->ipc_payload;
+
+		if (!src->sink_rate)
+			src->sink_rate = comp_info->out_audio_fmt.sampling_frequency;
+	}
+
+	if (comp_info->type == SND_SOC_TPLG_DAPM_ASRC) {
+		struct ipc4_asrc_module_cfg *asrc = comp_info->ipc_payload;
+
+		if (!asrc->out_freq)
+			asrc->out_freq = comp_info->out_audio_fmt.sampling_frequency;
+	}
+
 	/* Copy ext config for process type */
 	if (comp_info->module_id == TB_PROCESS_MODULE_ID) {
 		base_cfg = comp_info->ipc_payload;
 		base_cfg_ext = comp_info->ipc_payload + sizeof(*base_cfg);
 		base_cfg_ext->nb_input_pins = pins->num_input_pins;
 		base_cfg_ext->nb_output_pins = pins->num_output_pins;
-		ret = tb_set_pin_formats(comp_info, base_cfg, base_cfg_ext, TB_PIN_TYPE_INPUT);
+		ret = tb_set_pin_formats(tp, comp_info, base_cfg, base_cfg_ext, TB_PIN_TYPE_INPUT);
 		if (ret)
 			return ret;
 
-		ret = tb_set_pin_formats(comp_info, base_cfg, base_cfg_ext, TB_PIN_TYPE_OUTPUT);
+		ret = tb_set_pin_formats(tp, comp_info, base_cfg, base_cfg_ext, TB_PIN_TYPE_OUTPUT);
 		if (ret)
 			return ret;
 	}
@@ -488,9 +820,9 @@ int tb_pipelines_set_state(struct testbench_prm *tp, int state, int dir)
 	int i;
 
 	if (dir == SOF_IPC_STREAM_CAPTURE)
-		pipeline_list = &tp->pcm_info->capture_pipeline_list;
+		pipeline_list = &tp->capture_pipeline_list;
 	else
-		pipeline_list = &tp->pcm_info->playback_pipeline_list;
+		pipeline_list = &tp->playback_pipeline_list;
 
 	pipe_state.primary.r.ppl_state = state;
 	pipe_state.primary.r.type = SOF_IPC4_GLB_SET_PIPELINE_STATE;
@@ -530,7 +862,7 @@ int tb_pipelines_set_state(struct testbench_prm *tp, int state, int dir)
 
 static int tb_new_src(struct testbench_prm *tp)
 {
-	struct ipc4_config_src src;
+	struct ipc4_config_src src = { 0 };
 	struct tplg_context *ctx = &tp->tplg;
 	struct tplg_comp_info *comp_info = ctx->current_comp_info;
 	struct snd_soc_tplg_ctl_hdr *tplg_ctl;
@@ -577,7 +909,7 @@ static int tb_new_src(struct testbench_prm *tp)
 
 static int tb_new_asrc(struct testbench_prm *tp)
 {
-	struct ipc4_asrc_module_cfg asrc;
+	struct ipc4_asrc_module_cfg asrc = { 0 };
 	struct tplg_context *ctx = &tp->tplg;
 	struct tplg_comp_info *comp_info = ctx->current_comp_info;
 	struct snd_soc_tplg_ctl_hdr *tplg_ctl;
@@ -699,8 +1031,11 @@ static int tb_new_pipeline(struct testbench_prm *tp)
 		goto out;
 	}
 
+	pipe_info->core_id = pipeline.core;
+	pipe_info->priority = pipeline.priority;
 	list_item_append(&pipe_info->item, &tp->pipeline_list);
-	tplg_debug("loading pipeline %s\n", pipe_info->name);
+	tplg_debug("loading pipeline %s core %d priority %d\n",
+		   pipe_info->name, pipe_info->core_id, pipe_info->priority);
 out:
 	free(tplg_ctl);
 	return ret;
@@ -708,23 +1043,35 @@ static int tb_new_pipeline(struct testbench_prm *tp)
 
 static int tb_new_buffer(struct testbench_prm *tp)
 {
-	struct ipc4_copier_module_cfg *copier = calloc(sizeof(struct ipc4_copier_module_cfg), 1);
+	struct ipc4_copier_module_cfg *copier;
 	struct tplg_context *ctx = &tp->tplg;
 	struct tplg_comp_info *comp_info = ctx->current_comp_info;
+	size_t uuid_offset;
 	int ret;
 
-	if (!copier)
+	comp_info->ipc_size = sizeof(struct ipc4_copier_module_cfg);
+	uuid_offset = comp_info->ipc_size;
+	comp_info->ipc_size += sizeof(struct sof_uuid);
+	comp_info->ipc_payload = calloc(comp_info->ipc_size, 1);
+	if (!comp_info->ipc_payload)
 		return -ENOMEM;
 
-	comp_info->ipc_payload = copier;
+	copier = comp_info->ipc_payload;
+	comp_info->instance_id = tp->instance_ids[SND_SOC_TPLG_DAPM_BUFFER]++;
+	comp_info->module_id = TB_COPIER_MODULE_ID;
 
-	ret = tplg_new_buffer(ctx, copier, sizeof(copier), NULL, 0);
+	ret = tplg_new_buffer(ctx, copier, sizeof(*copier), NULL, 0);
 	if (ret < 0) {
-		fprintf(stderr, "error: failed to create pipeline\n");
-		free(copier);
+		fprintf(stderr, "error: failed to create buffer\n");
+		free(comp_info->ipc_payload);
+		comp_info->ipc_payload = NULL;
+		return ret;
 	}
 
-	return ret;
+	memcpy(comp_info->ipc_payload + uuid_offset, &comp_info->uuid, sizeof(struct sof_uuid));
+	tb_setup_widget_ipc_msg(comp_info);
+
+	return 0;
 }
 
 int tb_new_aif_in_out(struct testbench_prm *tp, int dir)
@@ -760,7 +1107,8 @@ int tb_new_aif_in_out(struct testbench_prm *tp, int dir)
 				return -EINVAL;
 			}
 			file->config.fn = tp->input_file[tp->input_file_index];
-			tp->fr[tp->input_file_index].id = comp_info->module_id;
+			tp->fr[tp->input_file_index].id = IPC4_COMP_ID(comp_info->module_id,
+								       comp_info->instance_id);
 			tp->fr[tp->input_file_index].instance_id = comp_info->instance_id;
 			tp->fr[tp->input_file_index].pipeline_id = ctx->pipeline_id;
 			tp->input_file_index++;
@@ -783,7 +1131,8 @@ int tb_new_aif_in_out(struct testbench_prm *tp, int dir)
 				return -EINVAL;
 			}
 			file->config.fn = tp->output_file[tp->output_file_index];
-			tp->fw[tp->output_file_index].id = comp_info->module_id;
+			tp->fw[tp->output_file_index].id = IPC4_COMP_ID(comp_info->module_id,
+									comp_info->instance_id);
 			tp->fw[tp->output_file_index].instance_id = comp_info->instance_id;
 			tp->fw[tp->output_file_index].pipeline_id = ctx->pipeline_id;
 			tp->output_file_index++;
@@ -829,7 +1178,8 @@ int tb_new_dai_in_out(struct testbench_prm *tp, int dir)
 				return -EINVAL;
 			}
 			file->config.fn = tp->output_file[tp->output_file_index];
-			tp->fw[tp->output_file_index].id = comp_info->module_id;
+			tp->fw[tp->output_file_index].id = IPC4_COMP_ID(comp_info->module_id,
+									comp_info->instance_id);
 			tp->fw[tp->output_file_index].instance_id = comp_info->instance_id;
 			tp->fw[tp->output_file_index].pipeline_id = ctx->pipeline_id;
 			tp->output_file_index++;
@@ -851,7 +1201,8 @@ int tb_new_dai_in_out(struct testbench_prm *tp, int dir)
 				return -EINVAL;
 			}
 			file->config.fn = tp->input_file[tp->input_file_index];
-			tp->fr[tp->input_file_index].id = comp_info->module_id;
+			tp->fr[tp->input_file_index].id = IPC4_COMP_ID(comp_info->module_id,
+								       comp_info->instance_id);
 			tp->fr[tp->input_file_index].instance_id = comp_info->instance_id;
 			tp->fr[tp->input_file_index].pipeline_id = ctx->pipeline_id;
 			tp->input_file_index++;
@@ -1410,6 +1761,18 @@ int tb_parse_topology(struct testbench_prm *tp)
 	ctx->ipc_major = 4;
 	ctx->ctl_arg = tp;
 	ctx->ctl_cb = tb_kcontrol_cb_new;
+	tb_configure_audio_params(tp);
+	tp->input_file_index = 0;
+	tp->output_file_index = 0;
+	memset(tp->fr, 0, sizeof(tp->fr));
+	memset(tp->fw, 0, sizeof(tp->fw));
+	for (i = 0; i < TB_MAX_INPUT_FILE_NUM; i++)
+		tp->fr[i].id = -1;
+	for (i = 0; i < TB_MAX_OUTPUT_FILE_NUM; i++)
+		tp->fw[i].id = -1;
+	tp->glb_ctx.num_ctls = 0;
+	tp->glb_ctx.size = 0;
+	free(tp->glb_ctx.ctl);
 	tp->glb_ctx.ctl = calloc(TB_MAX_CTLS, sizeof(struct tb_ctl));
 	if (!tp->glb_ctx.ctl) {
 		fprintf(stderr, "error: failed to allocate for controls.\n");
@@ -1525,6 +1888,9 @@ int tb_parse_topology(struct testbench_prm *tp)
 			pipe_info = container_of(pipe_item, struct tplg_pipeline_info, item);
 			if (pipe_info->id == comp_info->pipeline_id) {
 				comp_info->pipe_info = pipe_info;
+				if (comp_info->proc_domain == COMP_PROCESSING_DOMAIN_LL)
+					comp_info->core_id = pipe_info->core_id;
+				comp_info->module_init.extension.r.core_id = comp_info->core_id;
 				break;
 			}
 		}
@@ -1655,6 +2021,13 @@ int tb_free_route(struct testbench_prm *tp, struct tplg_route_info *route_info)
 	struct ipc4_message_reply reply;
 	int ret;
 
+	if (!route_info->set_up)
+		return 0;
+
+	tb_put_queue_id(src_comp_info, route_info->src_queue_id, true);
+	tb_put_queue_id(sink_comp_info, route_info->dst_queue_id, false);
+	route_info->set_up = false;
+
 	/* only unbind when widgets belong to separate pipelines */
 	if (src_comp_info->pipeline_id == sink_comp_info->pipeline_id)
 		return 0;
@@ -1667,25 +2040,25 @@ int tb_free_route(struct testbench_prm *tp, struct tplg_route_info *route_info)
 
 	bu.extension.r.dst_module_id = sink_comp_info->module_id;
 	bu.extension.r.dst_instance_id = sink_comp_info->instance_id;
-
-	/* FIXME: assign queue ID for components with multiple inputs/outputs */
-	bu.extension.r.dst_queue = 0;
-	bu.extension.r.src_queue = 0;
+	bu.extension.r.dst_queue = route_info->dst_queue_id;
+	bu.extension.r.src_queue = route_info->src_queue_id;
 
 	ret = tb_mq_cmd_tx_rx(&tp->ipc_tx, &tp->ipc_rx, &bu, sizeof(bu), &reply, sizeof(reply));
 	if (ret < 0) {
-		fprintf(stderr, "error: can't set up route %s -> %s\n", src_comp_info->name,
+		fprintf(stderr, "error: can't free route %s -> %s\n", src_comp_info->name,
 			sink_comp_info->name);
 		return ret;
 	}
 
 	if (reply.primary.r.status != IPC4_SUCCESS) {
-		fprintf(stderr, "route %s -> %s ID set up failed with status %d\n",
+		fprintf(stderr, "route %s -> %s unbind failed with status %d\n",
 			src_comp_info->name, sink_comp_info->name, reply.primary.r.status);
 		return -EINVAL;
 	}
 
-	tplg_debug("route %s -> %s freed\n", src_comp_info->name, sink_comp_info->name);
+	tplg_debug("route %s (q %d) -> %s (q %d) freed\n",
+		   src_comp_info->name, route_info->src_queue_id,
+		   sink_comp_info->name, route_info->dst_queue_id);
 
 	return 0;
 }
diff --git a/tools/testbench/utils.c b/tools/testbench/utils.c
index 5d37caf4099c..61e8a5739a90 100644
--- a/tools/testbench/utils.c
+++ b/tools/testbench/utils.c
@@ -21,8 +21,9 @@
 #include "testbench/utils.h"
 #include "testbench/trace.h"
 #include "testbench/file.h"
+#include "testbench/remote_server.h"
 
-#if defined __XCC__
+#if defined(__XCC__)
 #include <xtensa/tie/xt_timer.h>
 #endif
 
@@ -177,17 +178,36 @@ bool tb_is_pipeline_enabled(struct testbench_prm *tp, int pipeline_id)
 
 bool tb_schedule_pipeline_check_state(struct testbench_prm *tp)
 {
-	uint64_t cycles0, cycles1;
+	struct timespec td0 = {0}, td1 = {0};
+	uint64_t cycles0, cycles1, delta_ns = 0;
+	bool file_eof;
 
+	tb_remote_tick_begin(tp);
+	tb_gettime(&td0);
 	tb_getcycles(&cycles0);
 
-	schedule_ll_run_tasks();
+	if (!sof_get() || !sof_get()->ipc || !list_is_empty(&sof_get()->ipc->comp_list))
+		schedule_ll_run_tasks();
 
 	tb_getcycles(&cycles1);
+	tb_gettime(&td1);
 	tp->total_cycles += cycles1 - cycles0;
+	delta_ns = (uint64_t)(td1.tv_sec - td0.tv_sec) * 1000000000ULL +
+		   (uint64_t)(td1.tv_nsec - td0.tv_nsec);
+	file_eof = tb_is_file_component_at_eof(tp);
+	if (tp->fw[0].state && tp->fw[0].state->channels > 0 && tp->fw[0].state->rate > 0) {
+		double samples_to_ns = 1.0e9 / ((double)tp->fw[0].state->channels *
+						tp->fw[0].state->rate);
+		tp->last_output_time_ns = (int64_t)(samples_to_ns * tp->fw[0].state->n);
+		tp->has_output_file = true;
+	} else {
+		tp->last_output_time_ns = 0;
+		tp->has_output_file = false;
+	}
+	tb_remote_tick_end(tp, cycles1 - cycles0, delta_ns);
 
 	/* Check if all file components are running */
-	return tb_is_file_component_at_eof(tp);
+	return !tb_remote_should_continue(tp, file_eof);
 }
 
 struct ipc_data {
@@ -252,7 +272,7 @@ bool tb_check_trace(unsigned int log_level)
 
 void tb_gettime(struct timespec *td)
 {
-#if !defined __XCC__
+#if !defined(__XCC__) && !defined(__XTENSA__) && !defined(CONFIG_XT_SIMULATOR)
 	clock_gettime(CLOCK_MONOTONIC, td);
 #else
 	td->tv_nsec = 0;
@@ -262,8 +282,13 @@ void tb_gettime(struct timespec *td)
 
 void tb_getcycles(uint64_t *cycles)
 {
-#if defined __XCC__
+#if defined(__XCC__)
 	*cycles = XT_RSR_CCOUNT();
+#elif defined(__XTENSA__)
+	uint32_t ccount = 0;
+
+	__asm__ __volatile__("rsr.ccount %0" : "=a"(ccount));
+	*cycles = ccount;
 #else
 	*cycles = 0;
 #endif
@@ -593,3 +618,38 @@ int tb_read_controls(struct testbench_prm *tp, int64_t *sleep_ns)
 	free(raw_line);
 	return ret;
 }
+
+int tb_apply_control_line(struct testbench_prm *tp, const char *raw_line)
+{
+	const char *amixer_cmd = "amixer ";
+	const char *cset_cmd = "cset ";
+	const char *sofctl_cmd = "sof-ctl ";
+	char *dup_raw;
+	char *line;
+	int ret = -EINVAL;
+
+	if (!raw_line)
+		return -EINVAL;
+
+	dup_raw = strdup(raw_line);
+	if (!dup_raw)
+		return -ENOMEM;
+
+	line = calloc(1, strlen(raw_line) + 16);
+	if (!line) {
+		free(dup_raw);
+		return -ENOMEM;
+	}
+
+	tb_trim_line(line, dup_raw);
+	if (strncmp(line, amixer_cmd, strlen(amixer_cmd)) == 0 ||
+	    strncmp(line, cset_cmd, strlen(cset_cmd)) == 0) {
+		ret = tb_parse_amixer(tp, line);
+	} else if (strncmp(line, sofctl_cmd, strlen(sofctl_cmd)) == 0) {
+		ret = tb_parse_sofctl(tp, line);
+	}
+
+	free(line);
+	free(dup_raw);
+	return ret;
+}
diff --git a/tools/testbench/utils_ipc4.c b/tools/testbench/utils_ipc4.c
index 6fed07e7b89b..6aa42096ce68 100644
--- a/tools/testbench/utils_ipc4.c
+++ b/tools/testbench/utils_ipc4.c
@@ -11,6 +11,7 @@
 #include <sof/schedule/edf_schedule.h>
 #include <sof/schedule/ll_schedule.h>
 #include <sof/schedule/ll_schedule_domain.h>
+#include <sof/schedule/dp_schedule.h>
 #include <ipc/stream.h>
 
 #include <stdbool.h>
@@ -33,18 +34,74 @@ LOG_MODULE_REGISTER(testbench, CONFIG_SOF_LOG_LEVEL);
 
 /* testbench helper functions for pipeline setup and trigger */
 
-int tb_setup(struct sof *sof, struct testbench_prm *tp)
+int tb_configure_audio_params(struct testbench_prm *tp)
 {
-	struct ll_schedule_domain domain = {0};
 	int bits;
 	int krate;
 
+	if (!tp)
+		return -EINVAL;
+
+	if (!tp->fs_in)
+		tp->fs_in = 48000;
+	if (!tp->fs_out)
+		tp->fs_out = tp->fs_in;
+	if (!tp->channels_in)
+		tp->channels_in = 2;
+	if (!tp->channels_out)
+		tp->channels_out = tp->channels_in;
+
+	/* setup IPC4 audio format */
+	tp->num_configs = 1;
+	krate = tp->fs_in / 1000;
+	switch (tp->frame_fmt) {
+	case SOF_IPC_FRAME_S16_LE:
+		bits = 16;
+		break;
+	case SOF_IPC_FRAME_S24_4LE:
+		bits = 24;
+		break;
+	case SOF_IPC_FRAME_S32_LE:
+		bits = 32;
+		break;
+	default:
+		fprintf(stderr, "error: unsupported frame format %d\n", tp->frame_fmt);
+		return -EINVAL;
+	}
+
+	/* TODO 44.1 kHz like rates */
+	snprintf(tp->config[0].name, TB_MAX_CONFIG_NAME_SIZE, "%dk%dc%db",
+		 krate, tp->channels_in, bits);
+	tp->num_configs = 1;
+	tp->config[0].buffer_frames = 2 * krate;
+	tp->config[0].buffer_time = 0;
+	tp->config[0].period_frames = krate;
+	tp->config[0].period_time = 0;
+	tp->config[0].rate = tp->fs_in;
+	tp->config[0].channels = tp->channels_in;
+	tp->config[0].format = tp->frame_fmt;
+	tp->period_frames = krate;
+
+	/* TODO: Need to set this later for larger topologies with multiple PCMs. The
+	 * pipelines are determined based on just the PCM ID for the device that we
+	 * want to start playback/capture on.
+	 */
+	tp->pcm_id = 0;
+
+	return 0;
+}
+
+int tb_setup(struct sof *sof, struct testbench_prm *tp)
+{
+	struct ll_schedule_domain domain = {0};
+
 	/* init components */
 	sys_comp_init(sof);
 
 	/* Module adapter components */
 	sys_comp_module_aria_interface_init();
 	sys_comp_module_asrc_interface_init();
+	sys_comp_module_copier_interface_init();
 	sys_comp_module_crossover_interface_init();
 	sys_comp_module_dcblock_interface_init();
 	sys_comp_module_demux_interface_init();
@@ -54,6 +111,9 @@ int tb_setup(struct sof *sof, struct testbench_prm *tp)
 	sys_comp_module_eq_iir_interface_init();
 	sys_comp_module_file_interface_init();
 	sys_comp_module_gain_interface_init();
+#if CONFIG_COMP_GOOGLE_CTC_AUDIO_PROCESSING
+	sys_comp_module_google_ctc_audio_processing_interface_init();
+#endif
 	sys_comp_module_google_rtc_audio_processing_interface_init();
 	sys_comp_module_igo_nr_interface_init();
 	sys_comp_module_level_multiplier_interface_init();
@@ -67,9 +127,11 @@ int tb_setup(struct sof *sof, struct testbench_prm *tp)
 	sys_comp_module_selector_interface_init();
 	sys_comp_module_sound_dose_interface_init();
 	sys_comp_module_src_interface_init();
+	sys_comp_module_src_lite_interface_init();
 	sys_comp_module_stft_process_interface_init();
 	sys_comp_module_tdfb_interface_init();
 	sys_comp_module_template_interface_init();
+	sys_comp_module_tone_interface_init();
 	sys_comp_module_volume_interface_init();
 
 	/* other necessary initializations */
@@ -99,67 +161,39 @@ int tb_setup(struct sof *sof, struct testbench_prm *tp)
 		return -EINVAL;
 	}
 
-	tb_debug_print("ipc and scheduler initialized\n");
-
-	/* setup IPC4 audio format */
-	tp->num_configs = 1;
-	krate = tp->fs_in / 1000;
-	switch (tp->frame_fmt) {
-	case SOF_IPC_FRAME_S16_LE:
-		bits = 16;
-		break;
-	case SOF_IPC_FRAME_S24_4LE:
-		bits = 24;
-		break;
-	case SOF_IPC_FRAME_S32_LE:
-		bits = 32;
-		break;
-	default:
-		fprintf(stderr, "error: unsupported frame format %d\n", tp->frame_fmt);
+	/* init DP scheduler */
+	if (scheduler_dp_init() < 0) {
+		fprintf(stderr, "error: dp scheduler init\n");
 		return -EINVAL;
 	}
 
-	/* TODO 44.1 kHz like rates */
-	snprintf(tp->config[0].name, TB_MAX_CONFIG_NAME_SIZE, "%dk%dc%db",
-		 krate, tp->channels_in, bits);
-	tp->num_configs = 1;
-	tp->config[0].buffer_frames = 2 * krate;
-	tp->config[0].buffer_time = 0;
-	tp->config[0].period_frames = krate;
-	tp->config[0].period_time = 0;
-	tp->config[0].rate = tp->fs_in;
-	tp->config[0].channels = tp->channels_in;
-	tp->config[0].format = tp->frame_fmt;
-	tp->period_frames = krate;
-
-	/* TODO: Need to set this later for larger topologies with multiple PCMs. The
-	 * pipelines are determined based on just the PCM ID for the device that we
-	 * want to start playback/capture on.
-	 */
-	tp->pcm_id = 0;
+	tb_debug_print("ipc and scheduler initialized\n");
 
-	return 0;
+	return tb_configure_audio_params(tp);
 }
 
-static int tb_prepare_widget(struct testbench_prm *tp, struct tplg_pcm_info *pcm_info,
+static int tb_prepare_widget(struct testbench_prm *tp,
 			     struct tplg_comp_info *comp_info, int dir)
 {
 	struct tplg_pipeline_list *pipeline_list;
 	int ret, i;
 
 	if (dir)
-		pipeline_list = &pcm_info->capture_pipeline_list;
+		pipeline_list = &tp->capture_pipeline_list;
 	else
-		pipeline_list = &pcm_info->playback_pipeline_list;
+		pipeline_list = &tp->playback_pipeline_list;
 
-	/* populate base config */
-	ret = tb_set_up_widget_base_config(tp, comp_info);
-	if (ret < 0)
-		return ret;
+	if (!comp_info->prepared) {
+		/* populate base config */
+		ret = tb_set_up_widget_base_config(tp, comp_info);
+		if (ret < 0)
+			return ret;
 
-	tb_pipeline_update_resource_usage(tp, comp_info);
+		tb_pipeline_update_resource_usage(tp, comp_info);
+		comp_info->prepared = true;
+	}
 
-	/* add pipeline to pcm pipeline_list if needed */
+	/* add pipeline to pipeline_list if needed */
 	for (i = 0; i < pipeline_list->count; i++) {
 		struct tplg_pipeline_info *pipe_info = pipeline_list->pipelines[i];
 
@@ -180,7 +214,7 @@ static int tb_prepare_widget(struct testbench_prm *tp, struct tplg_pcm_info *pcm
 	return 0;
 }
 
-static int tb_prepare_widgets_playback(struct testbench_prm *tp, struct tplg_pcm_info *pcm_info,
+static int tb_prepare_widgets_playback(struct testbench_prm *tp,
 				       struct tplg_comp_info *starting_comp_info,
 				       struct tplg_comp_info *current_comp_info)
 {
@@ -191,25 +225,33 @@ static int tb_prepare_widgets_playback(struct testbench_prm *tp, struct tplg_pcm
 	list_for_item(item, &tp->route_list) {
 		struct tplg_route_info *route_info = container_of(item, struct tplg_route_info,
 								  item);
+		bool sink_already_prepared;
 
 		if (route_info->source != current_comp_info)
 			continue;
 
+		if (!tb_is_pipeline_enabled(tp, route_info->source->pipeline_id) ||
+		    !tb_is_pipeline_enabled(tp, route_info->sink->pipeline_id))
+			continue;
+
 		/* set up source widget if it is the starting widget */
 		if (starting_comp_info == current_comp_info) {
-			ret = tb_prepare_widget(tp, pcm_info, current_comp_info, 0);
+			ret = tb_prepare_widget(tp, current_comp_info, 0);
 			if (ret < 0)
 				return ret;
 		}
 
+		sink_already_prepared = route_info->sink->prepared;
+
 		/* set up the sink widget */
-		ret = tb_prepare_widget(tp, pcm_info, route_info->sink, 0);
+		ret = tb_prepare_widget(tp, route_info->sink, 0);
 		if (ret < 0)
 			return ret;
 
 		/* and then continue down the path */
-		if (route_info->sink->type != SND_SOC_TPLG_DAPM_DAI_IN) {
-			ret = tb_prepare_widgets_playback(tp, pcm_info, starting_comp_info,
+		if (!sink_already_prepared &&
+		    route_info->sink->type != SND_SOC_TPLG_DAPM_DAI_IN) {
+			ret = tb_prepare_widgets_playback(tp, starting_comp_info,
 							  route_info->sink);
 			if (ret < 0)
 				return ret;
@@ -219,7 +261,7 @@ static int tb_prepare_widgets_playback(struct testbench_prm *tp, struct tplg_pcm
 	return 0;
 }
 
-static int tb_prepare_widgets_capture(struct testbench_prm *tp, struct tplg_pcm_info *pcm_info,
+static int tb_prepare_widgets_capture(struct testbench_prm *tp,
 				      struct tplg_comp_info *starting_comp_info,
 				      struct tplg_comp_info *current_comp_info)
 {
@@ -230,25 +272,33 @@ static int tb_prepare_widgets_capture(struct testbench_prm *tp, struct tplg_pcm_
 	list_for_item(item, &tp->route_list) {
 		struct tplg_route_info *route_info = container_of(item, struct tplg_route_info,
 								  item);
+		bool source_already_prepared;
 
 		if (route_info->sink != current_comp_info)
 			continue;
 
+		if (!tb_is_pipeline_enabled(tp, route_info->source->pipeline_id) ||
+		    !tb_is_pipeline_enabled(tp, route_info->sink->pipeline_id))
+			continue;
+
 		/* set up sink widget if it is the starting widget */
 		if (starting_comp_info == current_comp_info) {
-			ret = tb_prepare_widget(tp, pcm_info, current_comp_info, 1);
+			ret = tb_prepare_widget(tp, current_comp_info, 1);
 			if (ret < 0)
 				return ret;
 		}
 
+		source_already_prepared = route_info->source->prepared;
+
 		/* set up the source widget */
-		ret = tb_prepare_widget(tp, pcm_info, route_info->source, 1);
+		ret = tb_prepare_widget(tp, route_info->source, 1);
 		if (ret < 0)
 			return ret;
 
 		/* and then continue up the path */
-		if (route_info->source->type != SND_SOC_TPLG_DAPM_DAI_OUT) {
-			ret = tb_prepare_widgets_capture(tp, pcm_info, starting_comp_info,
+		if (!source_already_prepared &&
+		    route_info->source->type != SND_SOC_TPLG_DAPM_DAI_OUT) {
+			ret = tb_prepare_widgets_capture(tp, starting_comp_info,
 							 route_info->source);
 			if (ret < 0)
 				return ret;
@@ -266,15 +316,19 @@ static int tb_set_up_widget(struct testbench_prm *tp, struct tplg_comp_info *com
 	int ret;
 	int i;
 
+	if (comp_info->set_up)
+		return 0;
+
 	pipe_info->usage_count++;
 
 	/* first set up pipeline if needed, only done once for the first pipeline widget */
-	if (pipe_info->usage_count == 1) {
+	if (!pipe_info->set_up) {
 		ret = tb_set_up_pipeline(tp, pipe_info);
 		if (ret < 0) {
 			pipe_info->usage_count--;
 			return ret;
 		}
+		pipe_info->set_up = true;
 	}
 
 	/* now set up the widget */
@@ -307,6 +361,8 @@ static int tb_set_up_widget(struct testbench_prm *tp, struct tplg_comp_info *com
 		}
 	}
 
+	comp_info->set_up = true;
+
 	return 0;
 }
 
@@ -321,8 +377,13 @@ static int tb_set_up_widgets_playback(struct testbench_prm *tp,
 	list_for_item(item, &tp->route_list) {
 		struct tplg_route_info *route_info = container_of(item, struct tplg_route_info,
 								  item);
+		bool sink_already_set_up;
 
-		if (route_info->source != current_comp_info)
+		if (route_info->source != current_comp_info || route_info->set_up)
+			continue;
+
+		if (!tb_is_pipeline_enabled(tp, route_info->source->pipeline_id) ||
+		    !tb_is_pipeline_enabled(tp, route_info->sink->pipeline_id))
 			continue;
 
 		/* set up source widget if it is the starting widget */
@@ -332,6 +393,8 @@ static int tb_set_up_widgets_playback(struct testbench_prm *tp,
 				return ret;
 		}
 
+		sink_already_set_up = route_info->sink->set_up;
+
 		/* set up the sink widget */
 		ret = tb_set_up_widget(tp, route_info->sink);
 		if (ret < 0)
@@ -343,7 +406,8 @@ static int tb_set_up_widgets_playback(struct testbench_prm *tp,
 			return ret;
 
 		/* and then continue down the path */
-		if (route_info->sink->type != SND_SOC_TPLG_DAPM_DAI_IN) {
+		if (!sink_already_set_up &&
+		    route_info->sink->type != SND_SOC_TPLG_DAPM_DAI_IN) {
 			ret = tb_set_up_widgets_playback(tp, starting_comp_info, route_info->sink);
 			if (ret < 0)
 				return ret;
@@ -360,22 +424,29 @@ static int tb_set_up_widgets_capture(struct testbench_prm *tp,
 	struct list_item *item;
 	int ret;
 
-	/* for playback */
+	/* for capture */
 	list_for_item(item, &tp->route_list) {
 		struct tplg_route_info *route_info = container_of(item, struct tplg_route_info,
 								  item);
+		bool source_already_set_up;
 
-		if (route_info->sink != current_comp_info)
+		if (route_info->sink != current_comp_info || route_info->set_up)
 			continue;
 
-		/* set up source widget if it is the starting widget */
+		if (!tb_is_pipeline_enabled(tp, route_info->source->pipeline_id) ||
+		    !tb_is_pipeline_enabled(tp, route_info->sink->pipeline_id))
+			continue;
+
+		/* set up sink widget if it is the starting widget */
 		if (starting_comp_info == current_comp_info) {
 			ret = tb_set_up_widget(tp, current_comp_info);
 			if (ret < 0)
 				return ret;
 		}
 
-		/* set up the sink widget */
+		source_already_set_up = route_info->source->set_up;
+
+		/* set up the source widget */
 		ret = tb_set_up_widget(tp, route_info->source);
 		if (ret < 0)
 			return ret;
@@ -385,8 +456,9 @@ static int tb_set_up_widgets_capture(struct testbench_prm *tp,
 		if (ret < 0)
 			return ret;
 
-		/* and then continue down the path */
-		if (route_info->source->type != SND_SOC_TPLG_DAPM_DAI_OUT) {
+		/* and then continue up the path */
+		if (!source_already_set_up &&
+		    route_info->source->type != SND_SOC_TPLG_DAPM_DAI_OUT) {
 			ret = tb_set_up_widgets_capture(tp, starting_comp_info, route_info->source);
 			if (ret < 0)
 				return ret;
@@ -403,51 +475,44 @@ static int tb_set_up_pipelines(struct testbench_prm *tp, int dir)
 	struct list_item *item;
 	int ret;
 
+	/* First pass: prepare widgets and calculate pipeline memory usage across all enabled PCMs */
 	list_for_item(item, &tp->pcm_list) {
 		pcm_info = container_of(item, struct tplg_pcm_info, item);
+		host = dir ? pcm_info->capture_host : pcm_info->playback_host;
 
-		if (pcm_info->id == tp->pcm_id) {
-			if (dir)
-				host = pcm_info->capture_host;
-			else
-				host = pcm_info->playback_host;
-			break;
-		}
-	}
+		if (!host || !tb_is_pipeline_enabled(tp, host->pipeline_id))
+			continue;
 
-	if (!host) {
-		fprintf(stderr, "No host component found for PCM ID: %d\n", tp->pcm_id);
-		return -EINVAL;
+		tp->pcm_info = pcm_info;
+		if (dir)
+			ret = tb_prepare_widgets_capture(tp, host, host);
+		else
+			ret = tb_prepare_widgets_playback(tp, host, host);
+		if (ret < 0)
+			return ret;
 	}
 
-	if (!tb_is_pipeline_enabled(tp, host->pipeline_id))
-		return 0;
-
-	tp->pcm_info = pcm_info; /* TODO must be an array for multiple PCMs */
+	/* Second pass: create pipelines, instantiate widgets, and bind routes */
+	list_for_item(item, &tp->pcm_list) {
+		pcm_info = container_of(item, struct tplg_pcm_info, item);
+		host = dir ? pcm_info->capture_host : pcm_info->playback_host;
 
-	if (dir) {
-		ret = tb_prepare_widgets_capture(tp, pcm_info, host, host);
-		if (ret < 0)
-			return ret;
+		if (!host || !tb_is_pipeline_enabled(tp, host->pipeline_id))
+			continue;
 
-		ret = tb_set_up_widgets_capture(tp, host, host);
+		tp->pcm_info = pcm_info;
+		if (dir)
+			ret = tb_set_up_widgets_capture(tp, host, host);
+		else
+			ret = tb_set_up_widgets_playback(tp, host, host);
 		if (ret < 0)
 			return ret;
-
-		tb_debug_print("Setting up capture pipelines complete\n");
-
-		return 0;
 	}
 
-	ret = tb_prepare_widgets_playback(tp, pcm_info, host, host);
-	if (ret < 0)
-		return ret;
-
-	ret = tb_set_up_widgets_playback(tp, host, host);
-	if (ret < 0)
-		return ret;
-
-	tb_debug_print("Setting up playback pipelines complete\n");
+	if (dir)
+		tb_debug_print("Setting up capture pipelines complete\n");
+	else
+		tb_debug_print("Setting up playback pipelines complete\n");
 
 	return 0;
 }
@@ -483,7 +548,11 @@ static int tb_free_widgets_playback(struct testbench_prm *tp,
 	/* for playback */
 	list_for_item(item, &tp->route_list) {
 		route_info = container_of(item, struct tplg_route_info, item);
-		if (route_info->source != current_comp_info)
+		if (route_info->source != current_comp_info || !route_info->set_up)
+			continue;
+
+		if (!tb_is_pipeline_enabled(tp, route_info->source->pipeline_id) ||
+		    !tb_is_pipeline_enabled(tp, route_info->sink->pipeline_id))
 			continue;
 
 		/* Widgets will be freed when the pipeline is deleted, so just unbind modules */
@@ -510,10 +579,14 @@ static int tb_free_widgets_capture(struct testbench_prm *tp,
 	struct list_item *item;
 	int ret;
 
-	/* for playback */
+	/* for capture */
 	list_for_item(item, &tp->route_list) {
 		route_info = container_of(item, struct tplg_route_info, item);
-		if (route_info->sink != current_comp_info)
+		if (route_info->sink != current_comp_info || !route_info->set_up)
+			continue;
+
+		if (!tb_is_pipeline_enabled(tp, route_info->source->pipeline_id) ||
+		    !tb_is_pipeline_enabled(tp, route_info->sink->pipeline_id))
 			continue;
 
 		/* Widgets will be freed when the pipeline is deleted, so just unbind modules */
@@ -521,8 +594,8 @@ static int tb_free_widgets_capture(struct testbench_prm *tp,
 		if (ret < 0)
 			return ret;
 
-		/* and then continue down the path */
-		if (route_info->sink->type != SND_SOC_TPLG_DAPM_DAI_OUT) {
+		/* and then continue up the path */
+		if (route_info->source->type != SND_SOC_TPLG_DAPM_DAI_OUT) {
 			ret = tb_free_widgets_capture(tp, starting_comp_info, route_info->source);
 			if (ret < 0)
 				return ret;
@@ -540,6 +613,11 @@ static int tb_free_pipelines(struct testbench_prm *tp, int dir)
 	struct tplg_comp_info *host = NULL;
 	int ret, i;
 
+	if (dir)
+		pipeline_list = &tp->capture_pipeline_list;
+	else
+		pipeline_list = &tp->playback_pipeline_list;
+
 	list_for_item(item, &tp->pcm_list) {
 		pcm_info = container_of(item, struct tplg_pcm_info, item);
 		if (dir)
@@ -551,40 +629,71 @@ static int tb_free_pipelines(struct testbench_prm *tp, int dir)
 			continue;
 
 		if (dir) {
-			pipeline_list = &tp->pcm_info->capture_pipeline_list;
 			ret = tb_free_widgets_capture(tp, host, host);
 			if (ret < 0) {
 				fprintf(stderr, "failed to free widgets for capture PCM\n");
 				return ret;
 			}
 		} else {
-			pipeline_list = &tp->pcm_info->playback_pipeline_list;
 			ret = tb_free_widgets_playback(tp, host, host);
 			if (ret < 0) {
 				fprintf(stderr, "failed to free widgets for playback PCM\n");
 				return ret;
 			}
 		}
-		for (i = 0; i < pipeline_list->count; i++) {
-			struct tplg_pipeline_info *pipe_info = pipeline_list->pipelines[i];
+	}
 
-			ret = tb_delete_pipeline(tp, pipe_info);
-			if (ret < 0)
-				return ret;
-		}
+	for (i = 0; i < pipeline_list->count; i++) {
+		struct tplg_pipeline_info *pipe_info = pipeline_list->pipelines[i];
+
+		if (!pipe_info->set_up)
+			continue;
+
+		ret = tb_delete_pipeline(tp, pipe_info);
+		if (ret < 0)
+			return ret;
+		pipe_info->set_up = false;
 	}
 
-	tp->instance_ids[SND_SOC_TPLG_DAPM_SCHEDULER] = 0;
+	pipeline_list->count = 0;
 	return 0;
 }
 
 int tb_free_all_pipelines(struct testbench_prm *tp)
 {
+	struct list_item *item;
+
 	tb_debug_print("freeing playback direction\n");
 	tb_free_pipelines(tp, SOF_IPC_STREAM_PLAYBACK);
 
 	tb_debug_print("freeing capture direction\n");
 	tb_free_pipelines(tp, SOF_IPC_STREAM_CAPTURE);
+
+	/* Ensure any remaining set-up routes or pipelines are cleaned up */
+	if (tp->route_list.next) {
+		list_for_item(item, &tp->route_list) {
+			struct tplg_route_info *route_info =
+				container_of(item, struct tplg_route_info, item);
+
+			if (route_info->set_up)
+				tb_free_route(tp, route_info);
+		}
+	}
+	if (tp->pipeline_list.next) {
+		list_for_item(item, &tp->pipeline_list) {
+			struct tplg_pipeline_info *pipe_info =
+				container_of(item, struct tplg_pipeline_info, item);
+
+			if (pipe_info->set_up) {
+				tb_delete_pipeline(tp, pipe_info);
+				pipe_info->set_up = false;
+			}
+		}
+	}
+
+	tp->playback_pipeline_list.count = 0;
+	tp->capture_pipeline_list.count = 0;
+	memset(tp->instance_ids, 0, sizeof(tp->instance_ids));
 	return 0;
 }
 
@@ -597,41 +706,78 @@ void tb_free_topology(struct testbench_prm *tp)
 	struct tplg_context *ctx = &tp->tplg;
 	struct sof_ipc4_available_audio_format *available_fmts;
 	struct list_item *item, *_item;
-
-	list_for_item_safe(item, _item, &tp->pcm_list) {
-		pcm_info = container_of(item, struct tplg_pcm_info, item);
-		list_item_del(item);
-		free(pcm_info->name);
-		free(pcm_info);
+	uint32_t i;
+
+	if (tp->pcm_list.next) {
+		list_for_item_safe(item, _item, &tp->pcm_list) {
+			pcm_info = container_of(item, struct tplg_pcm_info, item);
+			list_item_del(item);
+			free(pcm_info->name);
+			free(pcm_info);
+		}
 	}
 
-	list_for_item_safe(item, _item, &tp->widget_list) {
-		comp_info = container_of(item, struct tplg_comp_info, item);
-		available_fmts = &comp_info->available_fmt;
-		list_item_del(item);
-		free(available_fmts->output_pin_fmts);
-		free(available_fmts->input_pin_fmts);
-		free(comp_info->name);
-		free(comp_info->stream_name);
-		free(comp_info->ipc_payload);
-		free(comp_info);
+	if (tp->widget_list.next) {
+		list_for_item_safe(item, _item, &tp->widget_list) {
+			comp_info = container_of(item, struct tplg_comp_info, item);
+			available_fmts = &comp_info->available_fmt;
+			list_item_del(item);
+			if (comp_info->pins_info.input_pin_binding) {
+				for (i = 0; i < comp_info->pins_info.num_input_pins; i++)
+					free(comp_info->pins_info.input_pin_binding[i]);
+				free(comp_info->pins_info.input_pin_binding);
+			}
+			if (comp_info->pins_info.output_pin_binding) {
+				for (i = 0; i < comp_info->pins_info.num_output_pins; i++)
+					free(comp_info->pins_info.output_pin_binding[i]);
+				free(comp_info->pins_info.output_pin_binding);
+			}
+			free(available_fmts->output_pin_fmts);
+			free(available_fmts->input_pin_fmts);
+			free(comp_info->name);
+			free(comp_info->stream_name);
+			free(comp_info->ipc_payload);
+			free(comp_info);
+		}
 	}
 
-	list_for_item_safe(item, _item, &tp->route_list) {
-		route_info = container_of(item, struct tplg_route_info, item);
-		list_item_del(item);
-		free(route_info);
+	if (tp->route_list.next) {
+		list_for_item_safe(item, _item, &tp->route_list) {
+			route_info = container_of(item, struct tplg_route_info, item);
+			list_item_del(item);
+			free(route_info);
+		}
 	}
 
-	list_for_item_safe(item, _item, &tp->pipeline_list) {
-		pipe_info = container_of(item, struct tplg_pipeline_info, item);
-		list_item_del(item);
-		free(pipe_info->name);
-		free(pipe_info);
+	if (tp->pipeline_list.next) {
+		list_for_item_safe(item, _item, &tp->pipeline_list) {
+			pipe_info = container_of(item, struct tplg_pipeline_info, item);
+			list_item_del(item);
+			free(pipe_info->name);
+			free(pipe_info);
+		}
 	}
 
+	list_init(&tp->pcm_list);
+	list_init(&tp->widget_list);
+	list_init(&tp->route_list);
+	list_init(&tp->pipeline_list);
+
 	free(ctx->tplg_base);
+	ctx->tplg_base = NULL;
 	free(tp->glb_ctx.ctl);
+	tp->glb_ctx.ctl = NULL;
+	tp->glb_ctx.num_ctls = 0;
+	tp->glb_ctx.size = 0;
+	tp->playback_pipeline_list.count = 0;
+	tp->capture_pipeline_list.count = 0;
+	memset(tp->instance_ids, 0, sizeof(tp->instance_ids));
+	memset(tp->fr, 0, sizeof(tp->fr));
+	memset(tp->fw, 0, sizeof(tp->fw));
+	for (i = 0; i < TB_MAX_INPUT_FILE_NUM; i++)
+		tp->fr[i].id = -1;
+	for (i = 0; i < TB_MAX_OUTPUT_FILE_NUM; i++)
+		tp->fw[i].id = -1;
 	tb_debug_print("freed all pipelines, widgets, routes and pcms\n");
 }
 
@@ -712,31 +858,60 @@ void tb_collect_heap_usage(struct testbench_prm *tp, struct tb_heap_usage_record
 	size_t hwm;
 	int count = 0;
 
-	list_for_item(item, &tp->widget_list) {
-		struct tplg_comp_info *info = container_of(item, struct tplg_comp_info, item);
-		uint32_t comp_id = IPC4_COMP_ID(info->module_id, info->instance_id);
-		struct comp_dev *dev = ipc4_get_comp_dev(comp_id);
-
-		if (!dev || !dev->mod)
-			continue;
-
-		/* In testbench environment, skip AIF/DAI because they are not real components. */
-		if (info->type == SND_SOC_TPLG_DAPM_AIF_IN ||
-		    info->type == SND_SOC_TPLG_DAPM_AIF_OUT ||
-		    info->type == SND_SOC_TPLG_DAPM_DAI_IN ||
-		    info->type == SND_SOC_TPLG_DAPM_DAI_OUT)
-			continue;
+	if (tp && tp->widget_list.next && !list_is_empty(&tp->widget_list)) {
+		list_for_item(item, &tp->widget_list) {
+			struct tplg_comp_info *info = container_of(item, struct tplg_comp_info, item);
+			uint32_t comp_id = IPC4_COMP_ID(info->module_id, info->instance_id);
+			struct comp_dev *dev = ipc4_get_comp_dev(comp_id);
+
+			if (!dev || !dev->mod)
+				continue;
+
+			/* In testbench environment, skip AIF/DAI because they are not real components. */
+			if (info->type == SND_SOC_TPLG_DAPM_AIF_IN ||
+			    info->type == SND_SOC_TPLG_DAPM_AIF_OUT ||
+			    info->type == SND_SOC_TPLG_DAPM_DAI_IN ||
+			    info->type == SND_SOC_TPLG_DAPM_DAI_OUT)
+				continue;
+
+			if (count >= TB_NUM_WIDGETS_SUPPORTED) {
+				fprintf(stderr, "Error: Too many components for heap records, max %d.\n",
+					TB_NUM_WIDGETS_SUPPORTED);
+				break;
+			}
 
-		if (count >= TB_NUM_WIDGETS_SUPPORTED) {
-			fprintf(stderr, "Error: Too many components for heap records, max %d.\n",
-				TB_NUM_WIDGETS_SUPPORTED);
-			break;
+			module_adapter_heap_usage(dev->mod, &hwm);
+			records[count].module_name = info->name;
+			records[count].heap_max = hwm;
+			count++;
+		}
+	} else if (sof_get() && sof_get()->ipc && sof_get()->ipc->comp_list.next) {
+		list_for_item(item, &sof_get()->ipc->comp_list) {
+			struct ipc_comp_dev *icd = container_of(item, struct ipc_comp_dev, list);
+			uint32_t mid;
+
+			if (icd->type != COMP_TYPE_COMPONENT || !icd->cd || !icd->cd->mod)
+				continue;
+			mid = IPC4_MOD_ID(icd->id);
+			if (mid == TB_FILE_OUT_AIF_MODULE_ID ||
+			    mid == TB_FILE_IN_AIF_MODULE_ID ||
+			    mid == TB_FILE_OUT_DAI_MODULE_ID ||
+			    mid == TB_FILE_IN_DAI_MODULE_ID)
+				continue;
+			if (count >= TB_NUM_WIDGETS_SUPPORTED)
+				break;
+			module_adapter_heap_usage(icd->cd->mod, &hwm);
+			records[count].module_name =
+				(mid == TB_COPIER_MODULE_ID)  ? "module-copier" :
+				(mid == TB_MIXIN_MODULE_ID)   ? "mixin" :
+				(mid == TB_MIXOUT_MODULE_ID)  ? "mixout" :
+				(mid == TB_PGA_MODULE_ID)     ? "gain" :
+				(mid == TB_SRC_MODULE_ID)     ? "src" :
+				(mid == TB_ASRC_MODULE_ID)    ? "asrc" :
+				(mid == TB_PROCESS_MODULE_ID) ? "process" : "module";
+			records[count].heap_max = hwm;
+			count++;
 		}
-
-		module_adapter_heap_usage(dev->mod, &hwm);
-		records[count].module_name = info->name;
-		records[count].heap_max = hwm;
-		count++;
 	}
 
 	*count_out = count;
diff --git a/tools/tplg_parser/CMakeLists.txt b/tools/tplg_parser/CMakeLists.txt
index f7a447a6e6c2..5bdc45dd04f0 100644
--- a/tools/tplg_parser/CMakeLists.txt
+++ b/tools/tplg_parser/CMakeLists.txt
@@ -7,7 +7,11 @@ project(SOF_TPLG_PARSER C)
 include(../../scripts/cmake/misc.cmake)
 include(CheckCCompilerFlag)
 
-set(default_asoc_h "/usr/include/alsa/sound/uapi/asoc.h")
+if(EXISTS "/usr/include/alsa/sound/uapi/asoc.h")
+	set(default_asoc_h "/usr/include/alsa/sound/uapi/asoc.h")
+else()
+	set(default_asoc_h "/usr/include/sound/asoc.h")
+endif()
 
 set(sof_source_directory "${PROJECT_SOURCE_DIR}/../..")
 
@@ -63,6 +67,12 @@ target_compile_options(sof_tplg_parser PRIVATE
 	-g -O -Wall -Werror -fPIC -DPIC
 	-Wmissing-prototypes ${implicit_fallthrough}
 	-DCONFIG_LIBRARY -D${tplg_ipc})
+if(CMAKE_C_COMPILER MATCHES "xt-|xtensa-")
+	target_compile_options(sof_tplg_parser PRIVATE
+		-U__INT32_TYPE__ -D__INT32_TYPE__=int
+		-U__UINT32_TYPE__ "-D__UINT32_TYPE__=unsigned int"
+		-Wno-format)
+endif()
 
 target_link_libraries(sof_tplg_parser PRIVATE -lm)
 
diff --git a/tools/tplg_parser/audio_formats.c b/tools/tplg_parser/audio_formats.c
index 39a54e7f6100..d9d6a59eab5f 100644
--- a/tools/tplg_parser/audio_formats.c
+++ b/tools/tplg_parser/audio_formats.c
@@ -75,6 +75,71 @@ static const struct sof_topology_token ipc4_comp_pin_tokens[] = {
 		tplg_token_get_uint32_t, offsetof(struct tplg_pins_info, num_output_pins)},
 };
 
+static const struct sof_topology_token ipc4_comp_input_pin_binding_tokens[] = {
+	{SOF_TKN_COMP_INPUT_PIN_BINDING_WNAME, SND_SOC_TPLG_TUPLE_TYPE_STRING,
+		tplg_token_get_string, 0},
+};
+
+static const struct sof_topology_token ipc4_comp_output_pin_binding_tokens[] = {
+	{SOF_TKN_COMP_OUTPUT_PIN_BINDING_WNAME, SND_SOC_TPLG_TUPLE_TYPE_STRING,
+		tplg_token_get_string, 0},
+};
+
+static int tplg_parse_pin_binding(struct tplg_context *ctx, bool is_output)
+{
+	struct snd_soc_tplg_vendor_array *array = &ctx->widget->priv.array[0];
+	struct tplg_comp_info *comp_info = ctx->current_comp_info;
+	struct tplg_pins_info *pins = &comp_info->pins_info;
+	const struct sof_topology_token *tokens;
+	char *pin_binding[SOF_WIDGET_MAX_NUM_PINS] = { 0 };
+	int size = ctx->widget->priv.size;
+	uint32_t num_pins;
+	char **pb;
+	int ret, i;
+
+	if (is_output) {
+		num_pins = pins->num_output_pins;
+		tokens = ipc4_comp_output_pin_binding_tokens;
+	} else {
+		num_pins = pins->num_input_pins;
+		tokens = ipc4_comp_input_pin_binding_tokens;
+	}
+
+	if (num_pins <= 1)
+		return 0;
+
+	if (num_pins > SOF_WIDGET_MAX_NUM_PINS) {
+		fprintf(stderr, "widget: %s: invalid num_pins %u\n",
+			ctx->widget->name, num_pins);
+		return -EINVAL;
+	}
+
+	ret = sof_parse_token_sets(pin_binding, tokens, 1, array, size,
+				   num_pins, sizeof(char *));
+	if (ret < 0)
+		goto err;
+
+	if (pin_binding[0]) {
+		pb = calloc(num_pins, sizeof(char *));
+		if (!pb) {
+			ret = -ENOMEM;
+			goto err;
+		}
+		memcpy(pb, pin_binding, num_pins * sizeof(char *));
+		if (is_output)
+			pins->output_pin_binding = pb;
+		else
+			pins->input_pin_binding = pb;
+	}
+
+	return 0;
+
+err:
+	for (i = 0; i < num_pins; i++)
+		free(pin_binding[i]);
+	return ret;
+}
+
 int tplg_parse_widget_audio_formats(struct tplg_context *ctx)
 {
 	struct snd_soc_tplg_vendor_array *array = &ctx->widget->priv.array[0];
@@ -155,9 +220,25 @@ int tplg_parse_widget_audio_formats(struct tplg_context *ctx)
 
 	ret = sof_parse_token_sets(&comp_info->pins_info, ipc4_comp_pin_tokens,
 				   ARRAY_SIZE(ipc4_comp_pin_tokens), array, size, 1, 0);
-	if (ret < 0)
+	if (ret < 0) {
 		fprintf(stderr, "widget: %s: Failed to parse ipc4_comp_pin_tokens\n",
 			ctx->widget->name);
+		return ret;
+	}
 
-	return ret;
+	ret = tplg_parse_pin_binding(ctx, false);
+	if (ret < 0) {
+		fprintf(stderr, "widget: %s: Failed to parse input pin bindings\n",
+			ctx->widget->name);
+		return ret;
+	}
+
+	ret = tplg_parse_pin_binding(ctx, true);
+	if (ret < 0) {
+		fprintf(stderr, "widget: %s: Failed to parse output pin bindings\n",
+			ctx->widget->name);
+		return ret;
+	}
+
+	return 0;
 }
diff --git a/tools/tplg_parser/include/linux/types.h b/tools/tplg_parser/include/linux/types.h
index b06e50b3c8f4..8eb83658df55 100644
--- a/tools/tplg_parser/include/linux/types.h
+++ b/tools/tplg_parser/include/linux/types.h
@@ -14,6 +14,16 @@
 
 /* There are minimum types needed for alsa/sound/uapi/asoc.h */
 
+#define __SOUND_ASOUND_H
+
+#ifndef __DECLARE_FLEX_ARRAY
+#define __DECLARE_FLEX_ARRAY(TYPE, NAME)	\
+	struct { \
+		struct { } __empty_ ## NAME; \
+		TYPE NAME[]; \
+	}
+#endif
+
 typedef int64_t __le64;
 typedef int32_t __le32;
 typedef int16_t __le16;
diff --git a/tools/tplg_parser/include/sound/asound.h b/tools/tplg_parser/include/sound/asound.h
new file mode 100644
index 000000000000..6a1ede6da0cb
--- /dev/null
+++ b/tools/tplg_parser/include/sound/asound.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+#ifndef __SOUND_ASOUND_H
+#define __SOUND_ASOUND_H
+
+#ifndef SNDRV_CTL_ELEM_ID_NAME_MAXLEN
+#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN	44
+#endif
+
+#endif /* __SOUND_ASOUND_H */
diff --git a/tools/tplg_parser/include/tplg_parser/topology.h b/tools/tplg_parser/include/tplg_parser/topology.h
index b37d14444d14..4fbb0ff272a6 100644
--- a/tools/tplg_parser/include/tplg_parser/topology.h
+++ b/tools/tplg_parser/include/tplg_parser/topology.h
@@ -56,6 +56,13 @@ static inline void tplg_debug(char *fmt, ...) {}
 #define TPLG_PARSER_FUZZER_DEV 2
 #define TPLG_MAX_PCM_PIPELINES	16
 
+#ifndef COMP_PROCESSING_DOMAIN_LL
+#define COMP_PROCESSING_DOMAIN_LL 0
+#endif
+#ifndef COMP_PROCESSING_DOMAIN_DP
+#define COMP_PROCESSING_DOMAIN_DP 1
+#endif
+
 #define MOVE_POINTER_BY_BYTES(p, b) ((typeof(p))((uint8_t *)(p) + (b)))
 
 struct testbench_prm;
@@ -109,13 +116,22 @@ struct tplg_pipeline_info {
 	int instance_id;
 	int usage_count;
 	int mem_usage;
+	int core_id;
+	int priority;
+	bool set_up;
 	char *name;
 	struct list_item item; /* item in a list */
 };
 
+#define SOF_WIDGET_MAX_NUM_PINS	8
+
 struct tplg_pins_info {
 	uint32_t num_input_pins;
 	uint32_t num_output_pins;
+	char **input_pin_binding;
+	char **output_pin_binding;
+	uint32_t input_pin_mask;
+	uint32_t output_pin_mask;
 };
 
 struct tplg_comp_info {
@@ -123,6 +139,7 @@ struct tplg_comp_info {
 	struct sof_ipc4_available_audio_format available_fmt; /* available formats in tplg */
 	struct ipc4_module_init_instance module_init;
 	struct ipc4_base_module_cfg basecfg;
+	struct ipc4_audio_format out_audio_fmt;
 	struct tplg_pipeline_info *pipe_info;
 	struct sof_uuid uuid;
 	struct tplg_pins_info pins_info;
@@ -135,11 +152,21 @@ struct tplg_comp_info {
 	int ipc_size;
 	int instance_id;
 	int module_id;
+	int core_id;
+	uint32_t proc_domain;
+	uint32_t domain_id;
+	uint32_t stack_bytes;
+	uint32_t heap_bytes;
+	bool prepared;
+	bool set_up;
 };
 
 struct tplg_route_info {
 	struct tplg_comp_info *source;
 	struct tplg_comp_info *sink;
+	int src_queue_id;
+	int dst_queue_id;
+	bool set_up;
 	struct list_item item; /* item in a list */
 };
 
@@ -272,6 +299,12 @@ int tplg_token_get_uint32_t(void *elem, void *object, uint32_t offset,
 int tplg_token_get_comp_format(void *elem, void *object, uint32_t offset,
 			       uint32_t size);
 
+int tplg_token_get_string(void *elem, void *object, uint32_t offset,
+			  uint32_t size);
+
+int tplg_token_get_comp_domain(void *elem, void *object, uint32_t offset,
+			       uint32_t size);
+
 int tplg_token_get_uuid(void *elem, void *object, uint32_t offset, uint32_t size);
 
 int sof_parse_tokens(void *object,
diff --git a/tools/tplg_parser/pipeline.c b/tools/tplg_parser/pipeline.c
index 4bdd4ee45094..34175194e1c5 100644
--- a/tools/tplg_parser/pipeline.c
+++ b/tools/tplg_parser/pipeline.c
@@ -62,6 +62,8 @@ static int pipeline_ipc3_build(struct tplg_context *ctx, void *_pipeline)
 
 /* Pipeline - IPC4 */
 static const struct sof_topology_token pipeline4_tokens[] = {
+	{SOF_TKN_SCHED_PRIORITY, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
+		offsetof(struct sof_ipc_pipe_new, priority)},
 	{SOF_TKN_SCHED_CORE, SND_SOC_TPLG_TUPLE_TYPE_WORD, tplg_token_get_uint32_t,
 		offsetof(struct sof_ipc_pipe_new, core)},
 };
diff --git a/tools/tplg_parser/tokens.c b/tools/tplg_parser/tokens.c
index f736f7ed4bbd..d33bd737aa38 100644
--- a/tools/tplg_parser/tokens.c
+++ b/tools/tplg_parser/tokens.c
@@ -83,6 +83,33 @@ int tplg_token_get_comp_format(void *elem, void *object, uint32_t offset,
 	return 0;
 }
 
+int tplg_token_get_string(void *elem, void *object, uint32_t offset,
+			  uint32_t size)
+{
+	struct snd_soc_tplg_vendor_string_elem *velem = elem;
+	char **dst = (char **)((uint8_t *)object + offset);
+
+	*dst = strdup(velem->string);
+	if (!*dst)
+		return -ENOMEM;
+
+	return 0;
+}
+
+int tplg_token_get_comp_domain(void *elem, void *object, uint32_t offset,
+			       uint32_t size)
+{
+	struct snd_soc_tplg_vendor_string_elem *velem = elem;
+	uint32_t *val = (uint32_t *)((uint8_t *)object + offset);
+
+	if (strcasecmp(velem->string, "DP") == 0)
+		*val = COMP_PROCESSING_DOMAIN_DP;
+	else
+		*val = COMP_PROCESSING_DOMAIN_LL;
+
+	return 0;
+}
+
 int sof_parse_token_sets(void *object, const struct sof_topology_token *tokens,
 			 int count, struct snd_soc_tplg_vendor_array *array,
 			 int priv_size, int num_sets, int object_size)
diff --git a/zephyr/Kconfig b/zephyr/Kconfig
index 867100623b42..b48e7b5f0a26 100644
--- a/zephyr/Kconfig
+++ b/zephyr/Kconfig
@@ -238,48 +238,6 @@ config DMA_DOMAIN_SEM_LIMIT
 	  that SEM_LIMIT covers the maximum number of tasks your system will be
 	  executing at some point (worst case).
 
-config PIPELINE_2_0
-	bool "Enable pipeline 2.0 changes"
-	depends on IPC_MAJOR_4
-	default y if ACE
-	help
-	  This flag enables changes to new pipeline structure, known as pipeline2_0
-	  It is required for certain new features, like DP_SCHEDULER.
-
-config ZEPHYR_DP_SCHEDULER
-	bool "use Zephyr thread based DP scheduler"
-	default y if ACE
-	depends on IPC_MAJOR_4
-	depends on ZEPHYR_SOF_MODULE
-	depends on ACE
-	depends on PIPELINE_2_0
-	imply XTENSA_HIFI_SHARING if XTENSA_HIFI
-	help
-	  Enable Data Processing preemptive scheduler based on
-	  Zephyr preemptive threads.
-	  DP modules can be located in dieffrent cores than LL pipeline modules, may have
-	  different tick (i.e. 300ms for speech reccognition, etc.)
-
-config ZEPHYR_DP_SCHEDULER_MIN_STACK_SIZE
-       int "Minimum stack size for DP processing thread"
-       default 512
-       help
-         Defines the minimum stack size allowed for DP processing
-         threads despite what is requested in the module init IPC
-         ext_init payload. If the stack size requested in the IPC is
-         smaller than this, then the value defined here takes over.
-
-config CROSS_CORE_STREAM
-	bool "Enable cross-core connected pipelines"
-	default y if IPC_MAJOR_4
-	help
-	  Enables support for pipelines from different cores to be
-	  connected together cross-core. So stream can travel from one
-	  core to another. Note, this is different from "multicore"
-	  support. In SOF "multicore" support means different streams
-	  can be processed on different cores, however, each stream
-	  is processed entirely on single core.
-
 config SOF_BOOT_TEST_ALLOWED
 	bool "Enable SOF boot-time testing"
 	help