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Reduce floating-point exception handling overhead - #243
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Combine the host exception checks and only clear exceptions when needed. On Apple ARM64, use ACLE intrinsics to read and update FPSR directly, preserving unrelated status bits. Skip these checks when FE_ALL_EXCEPT is zero. On an M2 Max, the FPU replay benchmark drops from 32.6 ns/instruction to 21.3 ns with combined checks and 17.9 ns with the ARM64 helpers, giving roughly 1.5x and 1.8x throughput respectively.
Complement bench1's integer workload with a replay through the real FPU opcode dispatcher. The 512 instruction and register snapshots are based on observed FPU operations while running GLTeapot on BeOS PR1. Report median host time per instruction and provide a checksum mode for checking that different implementations produce the same results, without guest boot, display updates, or timer overhead.
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Picks up dingusdev/dingusppc#243 which reduces the overhead of FPU exception handling (though it's mostly a no-op for Emscripten, which does not support them, see emscripten-core/emscripten#11087). For #219
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No-op code wise, just picking up the merge of dingusdev/dingusppc#243
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I noticed while running the BeOS GL Teapot demo that we were spending a lot of time dealing with FPU exception flags (
std::fetestexceptandstd::feclearexcept). Make this more efficient by querying for all flags at once, and only clearing them if any are set (this is all conditional onFE_ALL_EXCEPTbeing available - it's not for Emscripten). We can also use some ARM64 instructions to further speed things up on Apple Silicon.To make this easier to measure in isolation, add an FPU-centric benchmark based on the recorded operations from the teapot demo.